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https://github.com/hathach/tinyusb.git
synced 2025-03-29 10:20:57 +00:00
add class code to hcd_pipe_open to facilitate usb_complete callback
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96c92afb32
commit
8457585464
@ -124,6 +124,7 @@ void verify_control_open_qhd(ehci_qhd_t *p_qhd)
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{
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verify_open_qhd(p_qhd, 0, control_max_packet_size);
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TEST_ASSERT_EQUAL(0, p_qhd->class_code);
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TEST_ASSERT_EQUAL(1, p_qhd->data_toggle_control);
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TEST_ASSERT_EQUAL(0, p_qhd->interrupt_smask);
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TEST_ASSERT_EQUAL(0, p_qhd->non_hs_interrupt_cmask);
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@ -195,7 +196,7 @@ tusb_descriptor_endpoint_t const desc_ept_bulk_in =
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.bInterval = 0
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};
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void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint)
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void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint, uint8_t class_code)
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{
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verify_open_qhd(p_qhd, desc_endpoint->bEndpointAddress, desc_endpoint->wMaxPacketSize);
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@ -209,6 +210,7 @@ void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const *
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TEST_ASSERT_EQUAL(desc_endpoint->bEndpointAddress & 0x80 ? EHCI_PID_IN : EHCI_PID_OUT, p_qhd->pid_non_control);
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TEST_ASSERT_EQUAL(class_code, p_qhd->class_code);
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//------------- async list check -------------//
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TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
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TEST_ASSERT_FALSE(async_head->next.terminate);
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@ -222,13 +224,13 @@ void test_open_bulk_qhd_data(void)
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tusb_descriptor_endpoint_t const * desc_endpoint = &desc_ept_bulk_in;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint);
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pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl.xfer_type);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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verify_bulk_open_qhd(p_qhd, desc_endpoint);
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verify_bulk_open_qhd(p_qhd, desc_endpoint, TUSB_CLASS_MSC);
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//------------- async list check -------------//
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TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
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@ -248,7 +250,7 @@ tusb_descriptor_endpoint_t const desc_ept_interrupt_out =
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.wMaxPacketSize = 16,
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.bInterval = 1
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};
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void verify_int_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint)
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void verify_int_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint, uint8_t class_code)
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{
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verify_open_qhd(p_qhd, desc_endpoint->bEndpointAddress, desc_endpoint->wMaxPacketSize);
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@ -272,14 +274,14 @@ void test_open_interrupt_qhd_hs(void)
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pipe_handle_t pipe_hdl;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out);
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pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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verify_int_qhd(p_qhd, &desc_ept_interrupt_out);
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verify_int_qhd(p_qhd, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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TEST_ASSERT_EQUAL(0xFF, p_qhd->interrupt_smask);
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//TEST_ASSERT_EQUAL(0, p_qhd->non_hs_interrupt_cmask); cmask in high speed is ignored
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@ -293,14 +295,14 @@ void test_open_interrupt_qhd_non_hs(void)
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usbh_device_info_pool[dev_addr].speed = TUSB_SPEED_FULL;
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//------------- Code Under TEST -------------//
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pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out);
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pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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verify_int_qhd(p_qhd, &desc_ept_interrupt_out);
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verify_int_qhd(p_qhd, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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TEST_ASSERT_EQUAL(1, p_qhd->interrupt_smask);
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TEST_ASSERT_EQUAL(0x1c, p_qhd->non_hs_interrupt_cmask);
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@ -322,6 +324,6 @@ tusb_descriptor_endpoint_t const desc_ept_iso_in =
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void test_open_isochronous(void)
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{
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pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in);
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pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in, TUSB_CLASS_AUDIO);
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TEST_ASSERT_EQUAL(0, pipe_hdl.dev_addr);
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}
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@ -101,7 +101,7 @@ void setUp(void)
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}
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async_head = get_async_head( hostid );
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pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in);
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pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl_bulk.xfer_type);
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@ -360,7 +360,7 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
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//--------------------------------------------------------------------+
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// BULK/INT/ISO PIPE API
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//--------------------------------------------------------------------+
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * p_endpoint_desc)
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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{
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pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 };
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@ -377,6 +377,7 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const *
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].qhd[index];
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init_qhd(p_qhd, dev_addr, p_endpoint_desc->wMaxPacketSize, p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
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p_qhd->class_code = class_code;
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ehci_qhd_t * list_head;
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@ -195,14 +195,13 @@ typedef struct {
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//--------------------------------------------------------------------+
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uint8_t used;
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uint8_t pid_non_control;
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uint8_t class_code;
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uint8_t list_index;
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uint8_t reserved;
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ehci_qtd_t *p_qtd_list_head; // head of the scheduled TD list
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ehci_qtd_t *p_qtd_list_tail; // tail of the scheduled TD list
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uint32_t reserved_2;
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}ATTR_ALIGNED(32) ehci_qhd_t;
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/// Highspeed Isochronous Transfer Descriptor (section 3.3)
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@ -79,7 +79,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) A
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tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc) ATTR_WARN_UNUSED_RESULT;
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT;
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tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) ATTR_WARN_UNUSED_RESULT;
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@ -53,7 +53,7 @@
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#define ENUM_QUEUE_DEPTH 5
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// TODO fix number of class driver
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class_driver_t const class_host_drivers[TUSB_CLASS_MAX_CONSEC_NUMBER] =
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class_driver_t const usbh_class_drivers[TUSB_CLASS_MAX_CONSEC_NUMBER] =
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{
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[TUSB_CLASS_HID] = {
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.init = hidh_init,
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@ -109,8 +109,8 @@ tusb_error_t usbh_init(void)
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//------------- class init -------------//
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for (uint8_t class_code = 1; class_code < TUSB_CLASS_MAX_CONSEC_NUMBER; class_code++)
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{
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if (class_host_drivers[class_code].init)
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class_host_drivers[class_code].init();
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if (usbh_class_drivers[class_code].init)
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usbh_class_drivers[class_code].init();
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}
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return TUSB_ERROR_NONE;
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@ -273,11 +273,11 @@ OSAL_TASK_DECLARE(usbh_enumeration_task)
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TASK_ASSERT( false ); // corrupted data, abort enumeration
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} else if ( class_code < TUSB_CLASS_MAX_CONSEC_NUMBER)
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{
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if ( class_host_drivers[class_code].install_subtask )
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if ( usbh_class_drivers[class_code].install_subtask )
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{
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uint16_t length;
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OSAL_SUBTASK_INVOKED_AND_WAIT ( // parameters in task/sub_task must be static storage (static or global)
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class_host_drivers[ ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass ].install_subtask(new_addr, p_desc, &length) );
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usbh_class_drivers[ ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass ].install_subtask(new_addr, p_desc, &length) );
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p_desc += length;
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}
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} else // unsupported class (not enable or yet implemented)
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@ -102,11 +102,6 @@ typedef struct { // TODO internal structure, re-order members
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} usbh_device_info_t;
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extern usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address
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//--------------------------------------------------------------------+
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// ADDRESS 0 API
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//--------------------------------------------------------------------+
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//tusb_error_t hcd_addr0_open(usbh_device_addr0_t *dev_addr0) ATTR_WARN_UNUSED_RESULT;
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//NOTE addr0 close is not needed tusb_error_t hcd_addr0_close(usbh_device_addr0_t *dev_addr0) ATTR_WARN_UNUSED_RESULT;
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#ifdef __cplusplus
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}
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