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clean up

Browse Source 
add some doxygen work
finalize device disconnection & suspend
- suspend & resume & remote wake up is not supported yet
This commit is contained in:
hathach 2013-11-22 15:16:24 +07:00
parent d1ef89a154
commit 83f1d660ce
24 changed files with 219 additions and 236 deletions
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5
demos/bsp/boards/lpcxpresso/board_lpcxpresso1347.c
View File

@ -53,11 +53,6 @@ void board_init(void)
#if CFG_UART_ENABLE
UARTInit(CFG_UART_BAUDRATE);
#endif
#if CFG_PRINTF_TARGET == PRINTF_TARGET_SWO
LPC_IOCON->PIO0_9 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO0_9 |= 0x03; /* UART RXD */
#endif
}
//--------------------------------------------------------------------+

18
demos/bsp/boards/lpcxpresso/board_lpcxpresso1769.c
View File

@ -50,12 +50,13 @@ void board_init(void)
// Leds Init
GPIO_SetDir(CFG_LED_PORT, BIT_(CFG_LED_PIN), 1);
//------------- USB -------------//
PINSEL_ConfigPin( &(PINSEL_CFG_Type) { .Portnum = 2, .Pinnum = 9, .Funcnum = 1 } );
// lpcxpresso base board USB device : if base board J14 is inserted at 1-2, 1k5 resistor is controlled by P0_21 (active low)
GPIO_SetDir(0, BIT_(21), 1);
GPIO_ClearValue(0, BIT_(21));
//------------- USB Device -------------//
// VBUS sense is wrongly connected to P0_5 (instead of P1_30). So we need to always pull P1_30 to high
// so that USB device block can work. However, Device Controller (thus tinyusb) cannot able to determine
// if device is disconnected or not
PINSEL_ConfigPin( &(PINSEL_CFG_Type) {
.Portnum = 1, .Pinnum = 30,
.Funcnum = 2, .Pinmode = PINSEL_PINMODE_PULLUP} );
#if CFG_UART_ENABLE
//------------- UART init -------------//
@ -81,11 +82,6 @@ void board_init(void)
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
#endif
#if CFG_PRINTF_TARGET == PRINTF_TARGET_SWO
LPC_IOCON->PIO0_9 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO0_9 |= 0x03; /* UART RXD */
#endif
}
//--------------------------------------------------------------------+

3
demos/bsp/boards/microbuilder/board_lpc4357usb.c
View File

@ -94,9 +94,6 @@ void board_init(void)
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
#endif
#if CFG_PRINTF_TARGET == PRINTF_TARGET_SWO
#endif
}
//--------------------------------------------------------------------+

110
demos/device/device_os_none/.cproject
View File

@ -1,5 +1,7 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<?fileVersion 4.0.0?>
<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
<storageModule moduleId="org.eclipse.cdt.core.settings">
<cconfiguration id="com.crt.advproject.config.exe.debug.856400198">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198" moduleId="org.eclipse.cdt.core.settings" name="Board LPCXpresso1347">
@ -72,7 +74,7 @@
<option id="gnu.c.link.option.paths.1465143173" name="Library search path (-L)" superClass="gnu.c.link.option.paths"/>
<option id="gnu.c.link.option.libs.447978281" name="Libraries (-l)" superClass="gnu.c.link.option.libs"/>
<option id="com.crt.advproject.link.gcc.hdrlib.1111642583" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.nohost" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.multicore.slave.1875369133" superClass="com.crt.advproject.link.gcc.multicore.slave"/>
<option id="com.crt.advproject.link.gcc.multicore.slave.1875369133" name="Multicore slave" superClass="com.crt.advproject.link.gcc.multicore.slave"/>
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.1234316494" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@ -89,6 +91,7 @@
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="scannerConfiguration"/>
</cconfiguration>
<cconfiguration id="com.crt.advproject.config.exe.debug.856400198.534940316">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198.534940316" moduleId="org.eclipse.cdt.core.settings" name="Board rf1ghznode">
@ -177,6 +180,7 @@
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="scannerConfiguration"/>
</cconfiguration>
<cconfiguration id="com.crt.advproject.config.exe.debug.856400198.1273868481">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198.1273868481" moduleId="org.eclipse.cdt.core.settings" name="Board EA4357">
@ -253,7 +257,7 @@
<option id="gnu.c.link.option.libs.1195892209" name="Libraries (-l)" superClass="gnu.c.link.option.libs"/>
<option id="com.crt.advproject.link.gcc.hdrlib.2063456418" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.nohost" valueType="enumerated"/>
<option id="com.crt.advproject.link.fpu.764700776" name="Floating point" superClass="com.crt.advproject.link.fpu" value="com.crt.advproject.link.fpu.fpv4" valueType="enumerated"/>
<option id="com.crt.advproject.link.gcc.multicore.slave.1805648374" superClass="com.crt.advproject.link.gcc.multicore.slave"/>
<option id="com.crt.advproject.link.gcc.multicore.slave.1805648374" name="Multicore slave" superClass="com.crt.advproject.link.gcc.multicore.slave"/>
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.1656058909" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@ -270,6 +274,7 @@
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="scannerConfiguration"/>
</cconfiguration>
<cconfiguration id="com.crt.advproject.config.exe.debug.856400198.2062223128">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198.2062223128" moduleId="org.eclipse.cdt.core.settings" name="Board LPCXpresso1769">
@ -358,6 +363,7 @@
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
<storageModule moduleId="scannerConfiguration"/>
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
@ -366,53 +372,73 @@
<storageModule moduleId="com.crt.config">
<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
&lt;TargetConfig&gt;&#13;
&lt;Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC1347" property_count="5" version="60000"/&gt;&#13;
&lt;infoList vendor="NXP"&gt;&#13;
&lt;info chip="LPC1347" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x08020543" name="LPC1347" stub="crt_emu_lpc11_13_nxp"&gt;&#13;
&lt;chip&gt;&#13;
&lt;name&gt;LPC1347&lt;/name&gt;&#13;
&lt;family&gt;LPC13xx (12bit ADC)&lt;/family&gt;&#13;
&lt;Properties property_0="" property_3="NXP" property_4="LPC1769" property_count="5" version="1"/&gt;&#13;
&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC1769" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml"&gt;&lt;chip&gt;&lt;name&gt;LPC1769&lt;/name&gt;&#13;
&lt;family&gt;LPC17xx&lt;/family&gt;&#13;
&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
&lt;clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/&gt;&#13;
&lt;clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/&gt;&#13;
&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
&lt;memory id="RAM" type="RAM"/&gt;&#13;
&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamPeriph2" location="0x20000000" size="0x800"/&gt;&#13;
&lt;prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_MPU" determined="infoFile" id="MPU" location="0xe000ed90"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_ITM" determined="infoFile" id="ITM" location="0xe0000000"/&gt;&#13;
&lt;peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/&gt;&#13;
&lt;peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/&gt;&#13;
&lt;peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/&gt;&#13;
&lt;peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/&gt;&#13;
&lt;peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/&gt;&#13;
&lt;peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/&gt;&#13;
&lt;peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/&gt;&#13;
&lt;peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/&gt;&#13;
&lt;peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/&gt;&#13;
&lt;peripheralInstance derived_from="RITIMER" determined="infoFile" id="RITIMER" location="0x40064000"/&gt;&#13;
&lt;peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/&gt;&#13;
&lt;memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/&gt;&#13;
&lt;prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/&gt;&#13;
&lt;prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_NVIC" id="NVIC" location="0xE000E000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM0&amp;amp;0x1" id="TIMER0" location="0x40004000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM1&amp;amp;0x1" id="TIMER1" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM2&amp;amp;0x1" id="TIMER2" location="0x40090000"/&gt;&#13;
&lt;peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM3&amp;amp;0x1" id="TIMER3" location="0x40094000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_RIT" enable="SYSCTL.PCONP.PCRIT&amp;amp;0x1" id="RIT" location="0x400B0000"/&gt;&#13;
&lt;peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO0" location="0x2009C000"/&gt;&#13;
&lt;peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO1" location="0x2009C020"/&gt;&#13;
&lt;peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO2" location="0x2009C040"/&gt;&#13;
&lt;peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO3" location="0x2009C060"/&gt;&#13;
&lt;peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&amp;amp;0x1" id="GPIO4" location="0x2009C080"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_I2S" enable="SYSCTL.PCONP&amp;amp;0x08000000" id="I2S" location="0x400A8000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_SYSCTL" id="SYSCTL" location="0x400FC000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_DAC" enable="PCB.PINSEL1.P0_26&amp;amp;0x2=2" id="DAC" location="0x4008C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART0&amp;amp;0x1" id="UART0" location="0x4000C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART_MODEM" enable="SYSCTL.PCONP.PCUART1&amp;amp;0x1" id="UART1" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART2&amp;amp;0x1" id="UART2" location="0x40098000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART3&amp;amp;0x1" id="UART3" location="0x4009C000"/&gt;&#13;
&lt;peripheralInstance derived_from="SPI" enable="SYSCTL.PCONP.PCSPI&amp;amp;0x1" id="SPI" location="0x40020000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP0&amp;amp;0x1" id="SSP0" location="0x40088000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP1&amp;amp;0x1" id="SSP1" location="0x40030000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_ADC" enable="SYSCTL.PCONP.PCAD&amp;amp;0x1" id="ADC" location="0x40034000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_USBINTST" enable="USBCLKCTL.USBClkCtrl&amp;amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_USB_CLK_CTL" id="USBCLKCTL" location="0x5000cff4"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_USBDEV" enable="USBCLKCTL.USBClkSt&amp;amp;0x12=0x12" id="USBDEV" location="0x5000C200"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_PWM" enable="SYSCTL.PCONP.PWM1&amp;amp;0x1" id="PWM" location="0x40018000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C0&amp;amp;0x1" id="I2C0" location="0x4001C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C1&amp;amp;0x1" id="I2C1" location="0x4005C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C2&amp;amp;0x1" id="I2C2" location="0x400A0000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_DMA" enable="SYSCTL.PCONP.PCGPDMA&amp;amp;0x1" id="DMA" location="0x50004000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_ENET" enable="SYSCTL.PCONP.PCENET&amp;amp;0x1" id="ENET" location="0x50000000"/&gt;&#13;
&lt;peripheralInstance derived_from="CM3_DCR" id="DCR" location="0xE000EDF0"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_PCB" id="PCB" location="0x4002c000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_QEI" enable="SYSCTL.PCONP.PCQEI&amp;amp;0x1" id="QEI" location="0x400bc000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_USBHOST" enable="USBCLKCTL.USBClkSt&amp;amp;0x11=0x11" id="USBHOST" location="0x5000C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_USBOTG" enable="USBCLKCTL.USBClkSt&amp;amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_RTC" enable="SYSCTL.PCONP.PCRTC&amp;amp;0x1" id="RTC" location="0x40024000"/&gt;&#13;
&lt;peripheralInstance derived_from="MPU" id="MPU" location="0xE000ED90"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC1x_WDT" id="WDT" location="0x40000000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_FLASHCFG" id="FLASHACCEL" location="0x400FC000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO_INT" id="GPIOINTMAP" location="0x40028080"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANAFR" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANAFR" location="0x4003C000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANCEN" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1|SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCEN" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANWAKESLEEP" id="CANWAKESLEEP" location="0x400FC110"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN1&amp;amp;0x1" id="CANCON1" location="0x40044000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN2&amp;amp;0x1" id="CANCON2" location="0x40048000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_MCPWM" enable="SYSCTL.PCONP.PCMCPWM&amp;amp;0x1" id="MCPWM" location="0x400B8000"/&gt;&#13;
&lt;peripheralInstance derived_from="LPC17_FMC" id="FMC" location="0x40084000"/&gt;&#13;
&lt;/chip&gt;&#13;
&lt;processor&gt;&#13;
&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
&lt;processor&gt;&lt;name gcc_name="cortex-m3"&gt;Cortex-M3&lt;/name&gt;&#13;
&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
&lt;/processor&gt;&#13;
&lt;link href="nxp_lpc13Uxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
&lt;link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/&gt;&#13;
&lt;/info&gt;&#13;
&lt;/infoList&gt;&#13;
&lt;/TargetConfig&gt;</projectStorage>

10
demos/device/device_os_none/tusb_descriptors.c
View File

@ -400,10 +400,12 @@ app_descriptor_configuration_t app_tusb_desc_configuration =
//--------------------------------------------------------------------+
// STRING DESCRIPTORS
//--------------------------------------------------------------------+
#define STRING_LEN_UNICODE(n) (2 + (2*(n))) // also includes 2 byte header
ATTR_USB_MIN_ALIGNMENT TUSB_CFG_ATTR_USBRAM
tusb_descriptor_string_t desc_str_language =
{
.bLength = 2 + 1*2,
.bLength = STRING_LEN_UNICODE(1),
.bDescriptorType = TUSB_DESC_TYPE_STRING,
.unicode_string = { 0x0409 }
};
@ -411,7 +413,7 @@ tusb_descriptor_string_t desc_str_language =
ATTR_USB_MIN_ALIGNMENT TUSB_CFG_ATTR_USBRAM
tusb_descriptor_string_t desc_str_manufacturer =
{
.bLength = 2 + 11*2,
.bLength = STRING_LEN_UNICODE(11),
.bDescriptorType = TUSB_DESC_TYPE_STRING,
.unicode_string = { 't', 'i', 'n', 'y', 'u', 's', 'b', '.', 'o', 'r', 'g' } // len = 11
};
@ -419,7 +421,7 @@ tusb_descriptor_string_t desc_str_manufacturer =
ATTR_USB_MIN_ALIGNMENT TUSB_CFG_ATTR_USBRAM
tusb_descriptor_string_t desc_str_product =
{
.bLength = 2 + 14*2,
.bLength = STRING_LEN_UNICODE(14),
.bDescriptorType = TUSB_DESC_TYPE_STRING,
.unicode_string = { 'D', 'e', 'v', 'i', 'c', 'e', ' ', 'E', 'x', 'a', 'm', 'p', 'l', 'e' } // len = 14
};
@ -427,7 +429,7 @@ tusb_descriptor_string_t desc_str_product =
ATTR_USB_MIN_ALIGNMENT TUSB_CFG_ATTR_USBRAM
tusb_descriptor_string_t desc_str_serial =
{
.bLength = 2 + 4*2,
.bLength = STRING_LEN_UNICODE(4),
.bDescriptorType = TUSB_DESC_TYPE_STRING,
.unicode_string = { '1', '2', '3', '4' } // len = 4
};

13
tinyusb/class/cdc_device.h
View File

@ -36,13 +36,6 @@
*/
/**************************************************************************/
/** \ingroup TBD
* \defgroup TBD
* \brief TBD
*
* @{
*/
#ifndef _TUSB_CDC_DEVICE_H_
#define _TUSB_CDC_DEVICE_H_
@ -54,6 +47,11 @@
extern "C" {
#endif
/** \addtogroup CDC_Serial Serial
* @{
* \defgroup CDC_Serial_Device Device
* @{ */
//--------------------------------------------------------------------+
// APPLICATION API
//--------------------------------------------------------------------+
@ -91,3 +89,4 @@ void cdcd_close(uint8_t coreid);
#endif /* _TUSB_CDC_DEVICE_H_ */
/** @} */
/** @} */

15
tinyusb/class/cdc_host.h
View File

@ -36,8 +36,6 @@
*/
/**************************************************************************/
/** \addtogroup ClassDriver_CDC Communication Device Class (CDC)
* @{ */
#ifndef _TUSB_CDC_HOST_H_
#define _TUSB_CDC_HOST_H_
@ -50,6 +48,8 @@
extern "C" {
#endif
/** \addtogroup ClassDriver_CDC Communication Device Class (CDC)
* @{ */
//--------------------------------------------------------------------+
// APPLICATION PUBLIC API
@ -57,8 +57,7 @@
/** \addtogroup CDC_Serial Serial
* @{
* \defgroup CDC_Serial_Host Host
* @{
* */
* @{ */
/** \brief Check if device support CDC Serial interface or not
* \param[in] dev_addr device address
@ -104,7 +103,9 @@ tusb_error_t tusbh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t leng
*/
tusb_error_t tusbh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify);
//------------- CDC Application Callback -------------//
//--------------------------------------------------------------------+
// CDC APPLICATION CALLBACKS
//--------------------------------------------------------------------+
/** \brief Callback function that will be invoked when a device with CDC Abstract Control Model interface is mounted
* \param[in] dev_addr Address of newly mounted device
* \note This callback should be used by Application to set-up interface-related data
@ -144,7 +145,9 @@ void tusbh_cdc_xfer_isr(uint8_t dev_addr, tusb_event_t event, cdc_pipeid_t pipe_
bool tusbh_cdc_rndis_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RESULT;
tusb_error_t tusbh_cdc_rndis_get_mac_addr(uint8_t dev_addr, uint8_t mac_address[6]);
//------------- RNDIS Application Callback (overshadow CDC callbacks) -------------//
//--------------------------------------------------------------------+
// RNDIS Application Callback (overshadow CDC callbacks)
//--------------------------------------------------------------------+
/** \brief Callback function that will be invoked when a device with RNDIS interface is mounted
* \param[in] dev_addr Address of newly mounted device
* \note This callback should be used by Application to set-up interface-related data

11
tinyusb/class/hid_device.h
View File

@ -83,13 +83,13 @@ tusb_error_t tusbd_hid_keyboard_send(uint8_t coreid, hid_keyboard_report_t const
// APPLICATION CALLBACK API
//--------------------------------------------------------------------+
/** \brief Callback function that is invoked when an transferring event occurred
* after invoking \ref tusbd_hid_keyboard_send
* \param[in] coreid USB Controller ID
* \param[in] event an value from \ref tusb_event_t
* \note event can be one of following
* - TUSB_EVENT_XFER_COMPLETE : previously scheduled transfer completes successfully.
* - TUSB_EVENT_XFER_ERROR : previously scheduled transfer encountered a transaction error.
* - TUSB_EVENT_XFER_STALLED : previously scheduled transfer is stalled by device.
* \note Application should schedule the next report by calling \ref tusbh_hid_keyboard_get_report within this callback
*/
void tusbd_hid_keyboard_isr(uint8_t coreid, tusb_event_t event, uint32_t xferred_bytes);
void tusbd_hid_keyboard_mounted_cb(uint8_t coreid);
@ -132,6 +132,15 @@ tusb_error_t tusbd_hid_mouse_send(uint8_t coreid, hid_mouse_report_t const *p_re
//--------------------------------------------------------------------+
// APPLICATION CALLBACK API
//--------------------------------------------------------------------+
/** \brief Callback function that is invoked when an transferring event occurred
* after invoking \ref tusbd_hid_mouse_send
* \param[in] coreid USB Controller ID
* \param[in] event an value from \ref tusb_event_t
* \note event can be one of following
* - TUSB_EVENT_XFER_COMPLETE : previously scheduled transfer completes successfully.
* - TUSB_EVENT_XFER_ERROR : previously scheduled transfer encountered a transaction error.
* - TUSB_EVENT_XFER_STALLED : previously scheduled transfer is stalled by device.
*/
void tusbd_hid_mouse_isr(uint8_t coreid, tusb_event_t event, uint32_t xferred_bytes);
void tusbd_hid_mouse_mounted_cb(uint8_t coreid);
void tusbd_hid_mouse_unmounted_cb(uint8_t coreid);

9
tinyusb/class/msc_device.h
View File

@ -47,6 +47,11 @@
extern "C" {
#endif
/** \addtogroup ClassDriver_MSC
* @{
* \defgroup MSC_Device Device
* @{ */
//--------------------------------------------------------------------+
// APPLICATION API
//--------------------------------------------------------------------+
@ -64,6 +69,9 @@ msc_csw_status_t tusbd_msc_scsi_received_isr (uint8_t coreid, uint8_t lun, uint8
tusb_error_t tusbd_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count) ATTR_WARN_UNUSED_RESULT;
tusb_error_t tusbh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count) ATTR_WARN_UNUSED_RESULT;
/** @} */
/** @} */
//--------------------------------------------------------------------+
// USBD-CLASS DRIVER API
//--------------------------------------------------------------------+
@ -83,4 +91,3 @@ void mscd_close(uint8_t coreid);
#endif /* _TUSB_MSC_DEVICE_H_ */
/** @} */

7
tinyusb/class/msc_host.h
View File

@ -36,9 +36,6 @@
*/
/**************************************************************************/
/** \addtogroup ClassDriver_MSC
* @{ */
#ifndef _TUSB_MSC_HOST_H_
#define _TUSB_MSC_HOST_H_
@ -50,7 +47,9 @@
extern "C" {
#endif
/** \defgroup MSC_Host Host
/** \addtogroup ClassDriver_MSC
* @{
* \defgroup MSC_Host Host
* The interface API includes status checking function, data transferring function and callback functions
* @{ */
//--------------------------------------------------------------------+

2
tinyusb/common/compiler/compiler_gcc.h
View File

@ -95,7 +95,7 @@
/// Many functions have no effects except the return value and their return value depends only on the parameters and/or global variables. Such a function can be subject to common subexpression elimination and loop optimization just as an arithmetic operator would be. These functions should be declared with the attribute pure
#define ATTR_PURE __attribute__ ((pure))
/// Many functions do not examine any values except their arguments, and have no effects except the return value. Basically this is just slightly more strict class than the pure attribute below, since function is not allowed to read global memory.
/// \brief Many functions do not examine any values except their arguments, and have no effects except the return value. Basically this is just slightly more strict class than the pure attribute below, since function is not allowed to read global memory.
/// Note that a function that has pointer arguments and examines the data pointed to must not be declared const. Likewise, a function that calls a non-const function usually must not be const. It does not make sense for a const function to return void
#define ATTR_CONST __attribute__ ((const))

88
tinyusb/common/compiler/compiler_iar.h
View File

@ -68,8 +68,6 @@
#define ATTR_ALIGNED_32 _Pragma("data_alignment=32")
#define ATTR_ALIGNED_4 _Pragma("data_alignment=4")
#ifndef ATTR_ALWAYS_INLINE
/// Generally, functions are not inlined unless optimization is specified. For functions declared inline, this attribute inlines the function even if no optimization level is specified
#define ATTR_ALWAYS_INLINE error
@ -87,92 +85,6 @@
#define __be2le __REV
#define __le2be __be2le
#if 0
/** Indicates to the compiler that the function can not ever return, so that any stack restoring or
* return code may be omitted by the compiler in the resulting binary.
*/
#define ATTR_NO_RETURN
/** Indicates that the specified parameters of the function are pointers which should never be \c NULL.
* When applied as a 1-based comma separated list the compiler will emit a warning if the specified
* parameters are known at compiler time to be \c NULL at the point of calling the function.
*/
#define ATTR_NON_NULL_PTR_ARG(...)
/** Removes any preamble or postamble from the function. When used, the function will not have any
* register or stack saving code. This should be used with caution, and when used the programmer
* is responsible for maintaining stack and register integrity.
*/
#define ATTR_NAKED __attribute__ ((naked))
/** Prevents the compiler from considering a specified function for in-lining. When applied, the given
* function will not be in-lined under any circumstances.
*/
#define ATTR_NO_INLINE __attribute__ ((noinline))
/** Forces the compiler to inline the specified function. When applied, the given function will be
* in-lined under all circumstances.
*/
#define PRAGMA_ALWAYS_INLINE _Pragma("inline=forced")
#define ATTR_ALWAYS_INLINE
/** Indicates that the specified function is pure, in that it has no side-effects other than global
* or parameter variable access.
*/
#define ATTR_PURE __attribute__ ((pure))
/** Indicates that the specified function is constant, in that it has no side effects other than
* parameter access.
*/
#define ATTR_CONST
/** Marks a given function as deprecated, which produces a warning if the function is called. */
#define ATTR_DEPRECATED// __attribute__ ((deprecated))
/** Marks a function as a weak reference, which can be overridden by other functions with an
* identical name (in which case the weak reference is discarded at link time).
*/
#define _PPTOSTR_(x) #x
#define PRAGMA_WEAK(name, vector) _Pragma(_PPTOSTR_(weak name=vector))
#define ATTR_WEAK
/** Marks a function as an alias for another function.
*
* \param[in] Func Name of the function which the given function name should alias.
*/
#define ATTR_ALIAS(Func)
/** Forces the compiler to not automatically zero the given global variable on startup, so that the
* current RAM contents is retained. Under most conditions this value will be random due to the
* behaviour of volatile memory once power is removed, but may be used in some specific circumstances,
* like the passing of values back after a system watchdog reset.
*/
#define ATTR_NO_INIT __attribute__ ((section (".noinit")))
/** Indicates the minimum alignment in bytes for a variable or struct element.
*
* \param[in] Bytes Minimum number of bytes the item should be aligned to.
*/
#define PRAGMA_ALIGN_4096 _Pragma("data_alignment=4096")
#define PRAGMA_ALIGN_2048 _Pragma("data_alignment=2048")
#define PRAGMA_ALIGN_256 _Pragma("data_alignment=256")
#define PRAGMA_ALIGN_128 _Pragma("data_alignment=128")
#define PRAGMA_ALIGN_64 _Pragma("data_alignment=64")
#define PRAGMA_ALIGN_48 _Pragma("data_alignment=48")
#define PRAGMA_ALIGN_32 _Pragma("data_alignment=32")
#define PRAGMA_ALIGN_4 _Pragma("data_alignment=4")
#define ATTR_ALIGNED(Bytes)
//#define ATTR_DEPRECATED __attribute__ ((deprecated))
#define ATTR_ERROR(Message)// __attribute__ (( error(Message) ))
#define ATTR_WARNING(Message) // __attribute__ (( warning(Message) ))
#define ATTR_IAR_PACKED __packed
#define ATTR_PACKED
#endif
#ifdef __cplusplus
}
#endif

7
tinyusb/common/std_descriptors.h
View File

@ -36,11 +36,10 @@
*/
/**************************************************************************/
/** \file
* \brief Types & Declaration by USB Specs. All documents sources mentioned here (eg section 3.5) is referring to USB 2.0 Specs unless state otherwise
/** \brief Types & Declaration by USB Specs. All documents sources mentioned here (eg section 3.5) is referring to USB 2.0 Specs unless state otherwise
*/
/** \defgroup Group_Core Core
/** \addtogroup group_usb_definitions USB Definitions
* @{
* \defgroup Group_StdDescriptor Standard Descriptors
* @{
@ -53,8 +52,6 @@
extern "C" {
#endif
#define STRING_LEN_BYTE2UNICODE(n) (2 + ((n)<<1))
//--------------------------------------------------------------------+
// STANDARD DESCRIPTORS
//--------------------------------------------------------------------+

10
tinyusb/common/tusb_types.h
View File

@ -36,14 +36,8 @@
*/
/**************************************************************************/
/** \file
* \brief TBD
*/
/** \ingroup Group_Core
* \defgroup Group_USBTypes USB Types
* \brief TBD
*
/** \ingroup group_usb_definitions
* \defgroup USBDef_Type USB Types
* @{
*/

15
tinyusb/device/dcd_lpc175x_6x.c
View File

@ -217,14 +217,21 @@ void dcd_isr(uint8_t coreid)
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_RESET);
}
if ( (dev_status_reg & SIE_DEV_STATUS_CONNECT_CHANGE_MASK) && !(dev_status_reg & SIE_DEV_STATUS_CONNECT_STATUS_MASK))
{ // TODO device is disconnected, require using VBUS (P1_30), cannot use CONNECT_STATUS as connection status
if (dev_status_reg & SIE_DEV_STATUS_CONNECT_CHANGE_MASK)
{ // device is disconnected, require using VBUS (P1_30)
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_UNPLUGGED);
}
if ( (dev_status_reg & SIE_DEV_STATUS_SUSPEND_CHANGE_MASK) && (dev_status_reg & SIE_DEV_STATUS_SUSPEND_MASK) )
if (dev_status_reg & SIE_DEV_STATUS_SUSPEND_CHANGE_MASK)
{
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_SUSPENDED);
if (dev_status_reg & SIE_DEV_STATUS_SUSPEND_MASK)
{
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_SUSPENDED);
}
// else
// {
// usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_RESUME);
// }
}
}

14
tinyusb/device/dcd_lpc175x_6x.h
View File

@ -36,13 +36,13 @@
*/
/**************************************************************************/
/** \ingroup TBD
* \defgroup TBD
* \brief TBD
*
/** \ingroup Port_DCD
* @{
* \defgroup LPC175x_6x
* @{
*/
#ifndef _TUSB_DCD_LPC175X_6X_H_
#define _TUSB_DCD_LPC175X_6X_H_
@ -53,7 +53,7 @@
#endif
typedef struct
typedef struct ATTR_ALIGNED(4)
{
//------------- Word 0 -------------//
uint32_t next;
@ -81,7 +81,7 @@ typedef struct
//------------- Word 4 -------------//
// uint32_t iso_packet_size_addr; // iso only, can be omitted for non-iso
} ATTR_ALIGNED(4) dcd_dma_descriptor_t;
}dcd_dma_descriptor_t;
STATIC_ASSERT( sizeof(dcd_dma_descriptor_t) == 16, "size is not correct"); // TODO not support ISO for now
@ -239,3 +239,5 @@ static inline uint32_t sie_read (uint8_t cmd_code, uint8_t data_len)
#endif /* _TUSB_DCD_LPC175X_6X_H_ */
/** @} */
/** @} */

28
tinyusb/device/dcd_lpc43xx.c
View File

@ -90,6 +90,14 @@ enum {
INT_MASK_NAK = BIT_(16)
};
//------------- PORTSC -------------//
enum {
PORTSC_CURRENT_CONNECT_STATUS_MASK = BIT_(0),
PORTSC_FORCE_PORT_RESUME_MASK = BIT_(6),
PORTSC_SUSPEND_MASK = BIT_(7)
};
typedef struct {
// Word 0: Next QTD Pointer
uint32_t next; ///< Next link pointer This field contains the physical memory address of the next dTD to be processed
@ -256,7 +264,7 @@ static void lpc43xx_controller_init(uint8_t coreid)
lpc_usb->ENDPOINTLISTADDR = (uint32_t) p_dcd->qhd; // Endpoint List Address has to be 2K alignment
lpc_usb->USBSTS_D = lpc_usb->USBSTS_D;
lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND; // | INT_MASK_SOF| INT_MASK_NAK;
lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND; // | INT_MASK_SOF;
lpc_usb->USBCMD_D &= ~0x00FF0000; // Interrupt Threshold Interval = 0
lpc_usb->USBCMD_D |= BIT_(0); // connect
@ -524,19 +532,27 @@ void dcd_isr(uint8_t coreid)
{
LPC_USB0_Type* const lpc_usb = LPC_USB[coreid];
uint32_t int_status = lpc_usb->USBSTS_D;
int_status &= lpc_usb->USBINTR_D;
uint32_t const int_status = lpc_usb->USBSTS_D & lpc_usb->USBINTR_D;
lpc_usb->USBSTS_D = int_status; // Acknowledge handled interrupt
if (int_status == 0) return;
if (int_status == 0) return; // disabled interrupt sources
if (int_status & INT_MASK_RESET)
{
bus_reset(coreid);
usbd_bus_reset(coreid);
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_RESET);
}
// if (int_status & INT_MASK_SUSPEND)
// {
// uint32_t portsc = lpc_usb->PORTSC1_D;
//
// if (portsc & PORTSC_SUSPEND_MASK)
// {
// tusbd_device_suspended_cb(coreid);
// }
// }
if (int_status & INT_MASK_USB)
{
//------------- Set up Received -------------//

44
tinyusb/device/dcd_lpc_11uxx_13uxx.c
View File

@ -64,9 +64,10 @@ enum {
};
enum {
CMDSTAT_DEVICE_ADDR_MASK = BIT_(7 )-1,
CMDSTAT_DEVICE_ENABLE_MASK = BIT_(7 ),
CMDSTAT_SETUP_RECEIVED_MASK = BIT_(8 ),
CMDSTAT_DEVICE_CONNECT_MASK = BIT_(16),
CMDSTAT_DEVICE_CONNECT_MASK = BIT_(16), ///< reflect the softconnect only, does not reflect the actual attached state
CMDSTAT_DEVICE_SUSPEND_MASK = BIT_(17),
CMDSTAT_CONNECT_CHANGE_MASK = BIT_(24),
CMDSTAT_SUSPEND_CHANGE_MASK = BIT_(25),
@ -131,7 +132,7 @@ void dcd_controller_set_address(uint8_t coreid, uint8_t dev_addr)
{
(void) coreid;
LPC_USB->DEVCMDSTAT &= ~0x7F;
LPC_USB->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK;
LPC_USB->DEVCMDSTAT |= dev_addr;
}
@ -142,7 +143,8 @@ tusb_error_t dcd_init(void)
LPC_USB->INTSTAT = LPC_USB->INTSTAT; // clear all pending interrupt
LPC_USB->INTEN = INT_MASK_DEVICE_STATUS;
LPC_USB->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK;
LPC_USB->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK |
CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
return TUSB_ERROR_NONE;
}
@ -170,9 +172,7 @@ void dcd_isr(uint8_t coreid)
{
(void) coreid;
uint32_t int_status = LPC_USB->INTSTAT;
int_status &= LPC_USB->INTEN;
uint32_t const int_status = LPC_USB->INTSTAT & LPC_USB->INTEN;
LPC_USB->INTSTAT = int_status; // Acknowledge handled interrupt
if (int_status == 0) return;
@ -182,24 +182,38 @@ void dcd_isr(uint8_t coreid)
//------------- Device Status -------------//
if ( int_status & INT_MASK_DEVICE_STATUS )
{
LPC_USB->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK /* CMDSTAT_SUSPEND_CHANGE_MASK */;
LPC_USB->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
{
bus_reset();
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_RESET);
}
// if ( (dev_cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK) && (dev_cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK) )
// { // find a way to distinct bus suspend vs unplug/plug
// usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_SUSPENDED);
// }
if ( (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK) && !(dev_cmd_stat & CMDSTAT_VBUS_DEBOUNCED_MASK) )
if (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
{ // device disconnect
usbd_dcd_bus_event_isr(0, 0);
if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
{ // debouncing as this can be set when device is powering
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_UNPLUGGED);
}
}
// TODO support suspend & resume
if (dev_cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK)
{
if (dev_cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK)
{ // suspend signal, bus idle for more than 3ms
// Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
{
usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_SUSPENDED);
}
}
}
// else
// { // resume signal
// usbd_dcd_bus_event_isr(0, USBD_BUS_EVENT_RESUME);
// }
// }
}
//------------- Control Endpoint -------------//

1
tinyusb/device/usbd.h
View File

@ -83,6 +83,7 @@ typedef struct {
// APPLICATION API
//--------------------------------------------------------------------+
bool tusbd_is_configured(uint8_t coreid) ATTR_WARN_UNUSED_RESULT;
//void tusbd_device_suspended_cb(uint8_t coreid);
//--------------------------------------------------------------------+
// CLASS-USBD & INTERNAL API

3
tinyusb/device/usbd_dcd.h
View File

@ -62,7 +62,8 @@ enum {
typedef enum {
USBD_BUS_EVENT_RESET = 1,
USBD_BUS_EVENT_UNPLUGGED,
USBD_BUS_EVENT_SUSPENDED
USBD_BUS_EVENT_SUSPENDED,
USBD_BUS_EVENT_RESUME
}usbd_bus_event_type_t;
typedef struct {

4
tinyusb/hal/hal_lpc13uxx.c
View File

@ -44,8 +44,8 @@
tusb_error_t hal_init(void)
{
// TODO remove magic number
/* Enable AHB clock to the USB block and USB RAM. */
LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14) | (0x1<<27));
LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14) | (0x1<<27)); /* Enable AHB clock to the USB block and USB RAM. */
LPC_SYSCON->PDRUNCFG &= ~( BIT_(8) | BIT_(10) ); // enable USB PLL & USB transceiver
/* Pull-down is needed, or internally, VBUS will be floating. This is to
address the wrong status in VBUSDebouncing bit in CmdStatus register. */

26
tinyusb/hal/hal_lpc175x_6x.c
View File

@ -51,27 +51,33 @@
//--------------------------------------------------------------------+
tusb_error_t hal_init(void)
{
//------------- user manual 11.13 usb device controller initialization -------------//
// TODO remove magic number
/* Enable AHB clock to the USB block and USB RAM. */
// LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14) | (0x1<<27));
LPC_SC->PCONP |= CLKPWR_PCONP_PCUSB; /* USB PCLK -> enable USB Per.*/
//------------- user manual 11.13 usb device controller initialization -------------//
LPC_PINCON->PINSEL1 &= ~((3<<26)|(3<<28)); /* P0.29 D+, P0.30 D- */
LPC_PINCON->PINSEL1 |= ((1<<26)|(1<<28)); /* PINSEL1 26.27, 28.29 = 01 */
// LPC_PINCON->PINSEL3 &= ~(3<<6); TODO HOST
// LPC_PINCON->PINSEL3 |= (2<<6);
LPC_SC->PCONP |= CLKPWR_PCONP_PCUSB; /* USB PCLK -> enable USB Per.*/
//------------- Device -------------//
LPC_PINCON->PINSEL4 &= ~(3 << 18);
LPC_PINCON->PINSEL4 |= (1 << 18); // P2_9 as USB Connect
// P1_30 as VBUS, ignore if it is already in VBUS mode
if ( !(!BIT_TEST_(LPC_PINCON->PINSEL3, 28) && BIT_TEST_(LPC_PINCON->PINSEL3, 29)) )
{
// some board like lpcxpresso1769 does not connect VBUS signal to pin P1_30, this allow those board to overwrite
// by always pulling P1_30 to high
PINSEL_ConfigPin( &(PINSEL_CFG_Type) {
.Portnum = 1, .Pinnum = 30,
.Funcnum = 2, .Pinmode = PINSEL_PINMODE_PULLDOWN} );
}
// DEVICE mode
LPC_USB->USBClkCtrl = 0x12; /* Dev, PortSel, AHB clock enable */
while ((LPC_USB->USBClkSt & 0x12) != 0x12);
/* Pull-down is needed, or internally, VBUS will be floating. This is to
address the wrong status in VBUSDebouncing bit in CmdStatus register. */
return TUSB_ERROR_NONE;
return TUSB_ERROR_NONE;
}
void USB_IRQHandler(void)

1
tinyusb/hal/hal_lpc175x_6x.h
View File

@ -48,6 +48,7 @@
#include "LPC17xx.h"
#include "lpc17xx_clkpwr.h"
#include "lpc17xx_pinsel.h"
#ifdef __cplusplus
extern "C" {

11
tinyusb/host/ehci/ehci.h
View File

@ -40,7 +40,6 @@
* @{
* \defgroup EHCI
* \brief EHCI driver. All documents sources mentioned here (eg section 3.5) is referring to EHCI Specs unless state otherwise
*
* @{
*/
@ -201,10 +200,10 @@ typedef struct {
ehci_qtd_t * volatile p_qtd_list_head; // head of the scheduled TD list
ehci_qtd_t * volatile p_qtd_list_tail; // tail of the scheduled TD list
}ATTR_ALIGNED(32) ehci_qhd_t;
} ehci_qhd_t;
/// Highspeed Isochronous Transfer Descriptor (section 3.3)
typedef struct {
typedef struct ATTR_ALIGNED(32) {
/// Word 0: Next Link Pointer
ehci_link_t next;
@ -231,10 +230,10 @@ typedef struct {
// uint32_t used;
// uint32_t IhdIdx;
// uint32_t reserved[6];
}ATTR_ALIGNED(32) ehci_itd_t;
} ehci_itd_t;
/// Split (Full-Speed) Isochronous Transfer Descriptor
typedef struct {
typedef struct ATTR_ALIGNED(32) {
/// Word 0: Next Link Pointer
ehci_link_t next;
@ -293,7 +292,7 @@ typedef struct {
uint8_t used;
uint8_t ihd_idx;
uint8_t reserved2[2];
}ATTR_ALIGNED(32) ehci_sitd_t;
} ehci_sitd_t;
//--------------------------------------------------------------------+
// EHCI Operational Register