clang work with lpc43

2025-03-14 04:18:56 +00:00 · 2024-04-22 19:45:27 +07:00 · 2024-04-22 19:45:27 +07:00 · 838a58df99
commit 838a58df99
parent db30eee0fc
8 changed files with 171 additions and 129 deletions
--- a/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld
+++ b/hw/bsp/lpc18/boards/lpcxpresso18s37/lpc1837.ld
@ -308,9 +308,10 @@ SECTIONS
        _ebss = .;
        PROVIDE(__end_bss_RAM = .) ;
        PROVIDE(__end_bss_RamLoc32 = .) ;
-        PROVIDE(end = .);
+/*        PROVIDE(end = .);*/
    } > RamLoc40 AT> RamLoc40 /* > RamLoc32 AT> RamLoc32 */

+    /* hathach add heap section for clang */
    .heap (NOLOAD): {
        __heap_start = .;
        __HeapBase = .;
@ -393,7 +394,7 @@ SECTIONS
       PROVIDE(__end_noinit_RAM = .) ;
       PROVIDE(__end_noinit_RamLoc32 = .) ;
    } > RamLoc32 AT> RamLoc32
-    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+/*    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
    PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);

    /* ## Create checksum value (used in startup) ## */
--- a/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld
+++ b/hw/bsp/lpc18/boards/mcb1800/lpc1857.ld
@ -255,6 +255,7 @@ SECTIONS
        *(COMMON)
        . = ALIGN(4) ;
        _ebss = .;
+        /* PROVIDE(end = .); */
    } > RamLoc40 /* RamLoc32 */

    /* NOINIT section for RamLoc40 */
@ -265,6 +266,7 @@ SECTIONS
       . = ALIGN(4) ;
    } > RamLoc40

+    /* hathach add heap section for clang */
    .heap (NOLOAD): {
        __heap_start = .;
        __HeapBase = .;
@ -311,7 +313,7 @@ SECTIONS
         . = ALIGN(4) ;
        _end_noinit = .;
    } > RamLoc32
-
+/*    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
    PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);

    /* ## Create checksum value (used in startup) ## */
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@ -1,10 +1,7 @@
 include_guard()

-if (NOT BOARD)
-  message(FATAL_ERROR "BOARD not specified")
-endif ()
-
 set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc18xx/lpc_chip_18xx)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)

 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@ -21,43 +18,44 @@ set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
-      ${SDK_DIR}/src/chip_18xx_43xx.c
-      ${SDK_DIR}/src/clock_18xx_43xx.c
-      ${SDK_DIR}/src/gpio_18xx_43xx.c
-      ${SDK_DIR}/src/sysinit_18xx_43xx.c
-      ${SDK_DIR}/src/uart_18xx_43xx.c
-      )
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -nostdlib
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      __USE_LPCOPEN
-      CORE_M3
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${SDK_DIR}/inc
-      ${SDK_DIR}/inc/config_18xx
-      )
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()

-    update_board(${BOARD_TARGET})
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
+    ${SDK_DIR}/src/chip_18xx_43xx.c
+    ${SDK_DIR}/src/clock_18xx_43xx.c
+    ${SDK_DIR}/src/gpio_18xx_43xx.c
+    ${SDK_DIR}/src/sysinit_18xx_43xx.c
+    ${SDK_DIR}/src/uart_18xx_43xx.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __USE_LPCOPEN
+    CORE_M3
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/inc
+    ${SDK_DIR}/inc/config_18xx
+    ${CMSIS_5}/CMSIS/Core/Include
+    )

-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        --specs=nosys.specs --specs=nano.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib)
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
  endif ()
 endfunction()

@ -99,5 +97,4 @@ function(family_configure_example TARGET RTOS)

  # Flashing
  family_flash_jlink(${TARGET})
-  #family_flash_nxplink(${TARGET})
 endfunction()
--- a/hw/bsp/lpc43/boards/ea4357/lpc4357.ld
+++ b/hw/bsp/lpc43/boards/ea4357/lpc4357.ld
@ -256,7 +256,7 @@ SECTIONS
        *(COMMON)
        . = ALIGN(4) ;
        _ebss = .;
-        PROVIDE(end = .);
+        /* PROVIDE(end = .); */
    } > RamLoc40 /* RamLoc32 */

    /* NOINIT section for RamLoc40 */
@ -267,6 +267,21 @@ SECTIONS
       . = ALIGN(4) ;
    } > RamLoc40

+    /* hathach add heap section for clang */
+    .heap (NOLOAD): {
+        __heap_start = .;
+        __HeapBase = .;
+        __heap_base = .;
+        __end = .;
+        PROVIDE(end = .);
+        PROVIDE(_end = .);
+        PROVIDE(__end__ = .);
+        KEEP(*(.heap*))
+        __HeapLimit = .;
+        __heap_limit = .;
+        __heap_end = .;
+    } > RamLoc40
+
    /* NOINIT section for RamAHB32 */
    .noinit_RAM3 (NOLOAD) : ALIGN(4)
    {
@ -299,19 +314,21 @@ SECTIONS
         . = ALIGN(4) ;
        _end_noinit = .;
    } > RamLoc32
-    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+/*    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/
    PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);

    /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 -
-                                         (_vStackTop
-                                         + (ResetISR + 1)
-                                         + (NMI_Handler + 1)
-                                         + (HardFault_Handler + 1)
-                                         + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
-                                         + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
-                                         + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
-                                         ) );
+    /* This cause issue with clang linker, so it is disabled */
+    /* MemManage_Handler, BusFault_Handler, UsageFault_Hander may not be defined */
+/*    PROVIDE(__valid_user_code_checksum = 0 -*/
+/*                                         (_vStackTop*/
+/*                                         + (ResetISR + 1)*/
+/*                                         + (NMI_Handler + 1)*/
+/*                                         + (HardFault_Handler + 1)*/
+/*                                         + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)*/
+/*                                         + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)*/
+/*                                         + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)*/
+/*                                         ) );*/

    /* Provide basic symbols giving location and size of main text
     * block, including initial values of RW data sections. Note that
--- a/hw/bsp/lpc43/boards/lpcxpresso43s67/lpc4367.ld
+++ b/hw/bsp/lpc43/boards/lpcxpresso43s67/lpc4367.ld
@ -304,9 +304,24 @@ SECTIONS
        _ebss = .;
        PROVIDE(__end_bss_RAM = .) ;
        PROVIDE(__end_bss_RamLoc32 = .) ;
-        PROVIDE(end = .);
+/*        PROVIDE(end = .);*/
    } > RamLoc40 AT> RamLoc40 /* > RamLoc32 AT> RamLoc32 */

+    /* hathach add heap section for clang */
+    .heap (NOLOAD): {
+        __heap_start = .;
+        __HeapBase = .;
+        __heap_base = .;
+        __end = .;
+        PROVIDE(end = .);
+        PROVIDE(_end = .);
+        PROVIDE(__end__ = .);
+        KEEP(*(.heap*))
+        __HeapLimit = .;
+        __heap_limit = .;
+        __heap_end = .;
+    } > RamLoc40
+
    /* NOINIT section for RamLoc40 */
    .noinit_RAM2 (NOLOAD) : ALIGN(4)
    {
@ -376,20 +391,22 @@ SECTIONS
       PROVIDE(__end_noinit_RamLoc32 = .) ;
    } > RamLoc32 AT> RamLoc32

-    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+/*    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);*/

    PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc32 - 0);

    /* ## Create checksum value (used in startup) ## */
-    PROVIDE(__valid_user_code_checksum = 0 -
-                                         (_vStackTop
-                                         + (ResetISR + 1)
-                                         + (NMI_Handler + 1)
-                                         + (HardFault_Handler + 1)
-                                         + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)   /* MemManage_Handler may not be defined */
-                                         + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)     /* BusFault_Handler may not be defined */
-                                         + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
-                                         ) );
+    /* This cause issue with clang linker, so it is disabled */
+    /* MemManage_Handler, BusFault_Handler, UsageFault_Hander may not be defined */
+/*    PROVIDE(__valid_user_code_checksum = 0 -*/
+/*                                         (_vStackTop*/
+/*                                         + (ResetISR + 1)*/
+/*                                         + (NMI_Handler + 1)*/
+/*                                         + (HardFault_Handler + 1)*/
+/*                                         + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1)*/
+/*                                         + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1)*/
+/*                                         + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1)*/
+/*                                         ) );*/

    /* Provide basic symbols giving location and size of main text
     * block, including initial values of RW data sections. Note that
--- a/hw/bsp/lpc43/family.cmake
+++ b/hw/bsp/lpc43/family.cmake
@ -1,6 +1,7 @@
 include_guard()

 set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)

 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@ -23,6 +24,7 @@ function(add_board_target BOARD_TARGET)

  # Startup & Linker script
  set(STARTUP_FILE_GNU ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
  set(STARTUP_FILE_IAR ${SDK_DIR}/../iar/iar_startup_lpc18xx43xx.s)
  set(LD_FILE_IAR ${SDK_DIR}/../iar/linker/lpc18xx_43xx_ldscript_iflash.icf)

@ -43,6 +45,7 @@ function(add_board_target BOARD_TARGET)
  target_include_directories(${BOARD_TARGET} PUBLIC
    ${SDK_DIR}/inc
    ${SDK_DIR}/inc/config_43xx
+    ${CMSIS_5}/CMSIS/Core/Include
    )

  update_board(${BOARD_TARGET})
@ -51,9 +54,11 @@ function(add_board_target BOARD_TARGET)
    target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib)
    target_link_options(${BOARD_TARGET} PUBLIC
      "LINKER:--script=${LD_FILE_GNU}"
-      # nanolib
-      --specs=nosys.specs
-      --specs=nano.specs
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
      )
  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
    target_link_options(${BOARD_TARGET} PUBLIC
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@ -29,73 +29,75 @@ set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
 #------------------------------------
 # only need to be built ONCE for all examples
 function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    if (MCU_VARIANT STREQUAL "nrf5340_application")
-      set(MCU_VARIANT_XXAA "nrf5340_xxaa_application")
-    else ()
-      set(MCU_VARIANT_XXAA "${MCU_VARIANT}_xxaa")
-    endif ()
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()

-    if (NOT DEFINED LD_FILE_GNU)
-      set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_XXAA}.ld)
-    endif ()
+  if (MCU_VARIANT STREQUAL "nrf5340_application")
+    set(MCU_VARIANT_XXAA "nrf5340_xxaa_application")
+  else ()
+    set(MCU_VARIANT_XXAA "${MCU_VARIANT}_xxaa")
+  endif ()

-    if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-      set(STARTUP_FILE_GNU ${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S)
-      set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-    endif ()
+  if (NOT DEFINED LD_FILE_GNU)
+    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_XXAA}.ld)
+  endif ()

-    add_library(${BOARD_TARGET} STATIC
-      ${NRFX_DIR}/helpers/nrfx_flag32_allocator.c
-      ${NRFX_DIR}/drivers/src/nrfx_gpiote.c
-      ${NRFX_DIR}/drivers/src/nrfx_power.c
-      ${NRFX_DIR}/drivers/src/nrfx_spim.c
-      ${NRFX_DIR}/drivers/src/nrfx_uarte.c
-      ${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
-      ${NRFX_DIR}/soc/nrfx_atomic.c
-      ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+    set(STARTUP_FILE_GNU ${NRFX_DIR}/mdk/gcc_startup_${MCU_VARIANT}.S)
+    set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  endif ()
+
+  add_library(${BOARD_TARGET} STATIC
+    ${NRFX_DIR}/helpers/nrfx_flag32_allocator.c
+    ${NRFX_DIR}/drivers/src/nrfx_gpiote.c
+    ${NRFX_DIR}/drivers/src/nrfx_power.c
+    ${NRFX_DIR}/drivers/src/nrfx_spim.c
+    ${NRFX_DIR}/drivers/src/nrfx_uarte.c
+    ${NRFX_DIR}/mdk/system_${MCU_VARIANT}.c
+    ${NRFX_DIR}/soc/nrfx_atomic.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  string(TOUPPER "${MCU_VARIANT_XXAA}" MCU_VARIANT_XXAA_UPPER)
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __STARTUP_CLEAR_BSS
+    CONFIG_GPIO_AS_PINRESET
+    ${MCU_VARIANT_XXAA_UPPER}
+    )
+
+  if (TRACE_ETM STREQUAL "1")
+    # ENABLE_TRACE will cause system_nrf5x.c to set up ETM trace
+    target_compile_definitions(${BOARD_TARGET} PUBLIC ENABLE_TRACE)
+  endif ()
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${NRFX_DIR}
+    ${NRFX_DIR}/mdk
+    ${NRFX_DIR}/hal
+    ${NRFX_DIR}/drivers/include
+    ${NRFX_DIR}/drivers/src
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${NRFX_DIR}/mdk
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
      )
-    string(TOUPPER "${MCU_VARIANT_XXAA}" MCU_VARIANT_XXAA_UPPER)
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      __STARTUP_CLEAR_BSS
-      CONFIG_GPIO_AS_PINRESET
-      ${MCU_VARIANT_XXAA_UPPER}
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${NRFX_DIR}/mdk
      )
-
-    if (TRACE_ETM STREQUAL "1")
-      # ENABLE_TRACE will cause system_nrf5x.c to set up ETM trace
-      target_compile_definitions(${BOARD_TARGET} PUBLIC ENABLE_TRACE)
-    endif ()
-
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-      ${NRFX_DIR}
-      ${NRFX_DIR}/mdk
-      ${NRFX_DIR}/hal
-      ${NRFX_DIR}/drivers/include
-      ${NRFX_DIR}/drivers/src
-      ${CMSIS_DIR}/CMSIS/Core/Include
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
      )
-
-    update_board(${BOARD_TARGET})
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        -L${NRFX_DIR}/mdk
-        --specs=nosys.specs --specs=nano.specs
-        -nostartfiles
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--script=${LD_FILE_GNU}"
-        -L${NRFX_DIR}/mdk
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
  endif ()
 endfunction()

--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@ -176,6 +176,7 @@ deps_optional = {
    'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                    '20285262657d1b482d132d20d755c8c330d55c1f',
                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf ra saml2x'
+                    'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'
                    'stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5'
                    'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb'
                    'sam3x samd11 samd21 samd51 same5x same7x saml2x samg'],