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stm32f4: Fix FIFO write logic (requires 32 bit writes).
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@ -495,8 +495,31 @@ void OTG_FS_IRQHandler(void) {
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xfer->queued_len = xfer->total_len - remaining;
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xfer->queued_len = xfer->total_len - remaining;
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uint16_t to_xfer_size = (remaining > xfer->max_size) ? xfer->max_size : remaining;
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uint16_t to_xfer_size = (remaining > xfer->max_size) ? xfer->max_size : remaining;
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for(uint16_t i = 0; i < to_xfer_size; i++) {
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uint8_t to_xfer_rem = to_xfer_size % 4;
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(* tx_fifo) = xfer->buffer[xfer->queued_len + i];
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uint16_t to_xfer_size_aligned = to_xfer_size - to_xfer_rem;
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// Buffer might not be aligned to 32b, so we need to force alignment
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// by copying to a temp var.
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uint8_t * base = (xfer->buffer + xfer->queued_len);
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for(uint16_t i = 0; i < to_xfer_size_aligned; i += 4) {
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uint32_t tmp = base[i] | (base[i + 1] << 8) | (base[i + 2] << 16) | (base[i + 3] << 24);
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(* tx_fifo) = tmp;
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}
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// Do not read beyond end of buffer if not divisible by 4.
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if(to_xfer_rem != 0) {
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uint32_t tmp = 0;
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uint8_t * last_32b_bound = base + to_xfer_size_aligned;
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tmp |= last_32b_bound[0];
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if(to_xfer_rem > 1) {
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tmp |= (last_32b_bound[1] << 8);
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}
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if(to_xfer_rem > 2) {
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tmp |= (last_32b_bound[2] << 16);
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}
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(* tx_fifo) = tmp;
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}
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}
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}
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}
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}
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}
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