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add default CFG_TUH_MAX3421 = 0, default spi speed for samd21/samd51 to 12Mhz
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@ -269,7 +269,8 @@ uint32_t board_millis(void) {
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static void max3421_init(void) {
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//------------- SPI Init -------------//
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uint32_t const baudrate = 4000000u;
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// MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
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uint32_t const baudrate = 12000000u;
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// Enable the APB clock for SERCOM
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PM->APBCMASK.reg |= 1u << (PM_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID);
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@ -183,7 +183,9 @@ uint32_t board_millis(void) {
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static void max3421_init(void) {
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//------------- SPI Init -------------//
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uint32_t const baudrate = 4000000u;
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// MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
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uint32_t const baudrate = 12000000u;
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struct {
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volatile uint32_t *mck_apb;
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@ -229,7 +231,12 @@ static void max3421_init(void) {
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while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
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// Set the baud rate
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sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
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uint8_t baud_reg = (uint8_t) (SystemCoreClock / (2 * baudrate));
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if (baud_reg) {
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baud_reg--;
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}
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sercom->SPI.BAUD.reg = baud_reg;
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// Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
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gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
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@ -263,7 +263,7 @@ static void fifo_read(uint8_t rhport, uint8_t * buffer, uint16_t len, bool in_is
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max3421_spi_lock(rhport, in_isr);
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tuh_max3421_spi_xfer_api(rhport, ®, 1, &hirq, 0);
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tuh_max3421_spi_xfer_api(rhport, ®, 1, &hirq, 1);
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_hcd_data.hirq = hirq;
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tuh_max3421_spi_xfer_api(rhport, NULL, 0, buffer, len);
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@ -424,11 +424,11 @@
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//------------- CLASS -------------//
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#ifndef CFG_TUH_HUB
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#define CFG_TUH_HUB 0
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#define CFG_TUH_HUB 0
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#endif
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#ifndef CFG_TUH_CDC
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#define CFG_TUH_CDC 0
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#define CFG_TUH_CDC 0
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#endif
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#ifndef CFG_TUH_CDC_FTDI
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@ -442,34 +442,38 @@
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#endif
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#ifndef CFG_TUH_HID
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#define CFG_TUH_HID 0
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#define CFG_TUH_HID 0
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#endif
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#ifndef CFG_TUH_MIDI
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#define CFG_TUH_MIDI 0
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#define CFG_TUH_MIDI 0
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#endif
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#ifndef CFG_TUH_MSC
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#define CFG_TUH_MSC 0
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#define CFG_TUH_MSC 0
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#endif
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#ifndef CFG_TUH_VENDOR
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#define CFG_TUH_VENDOR 0
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#define CFG_TUH_VENDOR 0
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#endif
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#ifndef CFG_TUH_API_EDPT_XFER
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#define CFG_TUH_API_EDPT_XFER 0
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#define CFG_TUH_API_EDPT_XFER 0
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#endif
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// Enable PIO-USB software host controller
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#ifndef CFG_TUH_RPI_PIO_USB
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#define CFG_TUH_RPI_PIO_USB 0
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#define CFG_TUH_RPI_PIO_USB 0
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#endif
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#ifndef CFG_TUD_RPI_PIO_USB
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#define CFG_TUD_RPI_PIO_USB 0
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#define CFG_TUD_RPI_PIO_USB 0
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#endif
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// MAX3421 Host controller option
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#ifndef CFG_TUH_MAX3421
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#define CFG_TUH_MAX3421 0
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#endif
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//--------------------------------------------------------------------+
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// TypeC Options (Default)
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