diff --git a/hw/bsp/stm32l476disco/STM32L476VGTx_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l476_disco/STM32L476VGTx_FLASH.ld
similarity index 100%
rename from hw/bsp/stm32l476disco/STM32L476VGTx_FLASH.ld
rename to hw/bsp/stm32l4/boards/stm32l476_disco/STM32L476VGTx_FLASH.ld
diff --git a/hw/bsp/stm32l476disco/stm32l476disco.c b/hw/bsp/stm32l4/boards/stm32l476_disco/board.h
similarity index 59%
rename from hw/bsp/stm32l476disco/stm32l476disco.c
rename to hw/bsp/stm32l4/boards/stm32l476_disco/board.h
index bc1b6c929..42c657d5e 100644
--- a/hw/bsp/stm32l476disco/stm32l476disco.c
+++ b/hw/bsp/stm32l4/boards/stm32l476_disco/board.h
@@ -1,7 +1,7 @@
/*
* The MIT License (MIT)
*
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@@ -24,21 +24,12 @@
* This file is part of the TinyUSB stack.
*/
-#include "../board.h"
+#ifndef BOARD_H_
+#define BOARD_H_
-#include "stm32l4xx_hal.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void OTG_FS_IRQHandler(void)
-{
- tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
+#ifdef __cplusplus
+ extern "C" {
+#endif
#define LED_PORT GPIOB
#define LED_PIN GPIO_PIN_2
@@ -48,15 +39,16 @@ void OTG_FS_IRQHandler(void)
#define BUTTON_PIN GPIO_PIN_0
#define BUTTON_STATE_ACTIVE 1
+#define UART_DEV USART2
+#define UART_CLK_EN __HAL_RCC_USART2_CLK_ENABLE
+#define UART_GPIO_PORT GPIOD
+#define UART_GPIO_AF GPIO_AF7_USART2
+#define UART_TX_PIN GPIO_PIN_5
+#define UART_RX_PIN GPIO_PIN_6
-// enable all LED, Button, Uart, USB clock
-static void all_rcc_clk_enable(void)
-{
- __HAL_RCC_GPIOA_CLK_ENABLE(); // USB D+, D-, Button
- __HAL_RCC_GPIOB_CLK_ENABLE(); // LED
- __HAL_RCC_GPIOC_CLK_ENABLE(); // VBUS pin
-}
-
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
/**
* @brief System Clock Configuration
@@ -80,7 +72,7 @@ static void all_rcc_clk_enable(void)
* @param None
* @retval None
*/
-static void SystemClock_Config(void)
+static inline void board_clock_init(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
@@ -131,116 +123,17 @@ static void SystemClock_Config(void)
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
}
-void board_init(void)
+static inline void board_vbus_sense_init(void)
{
- SystemClock_Config();
- all_rcc_clk_enable();
-
-#if CFG_TUSB_OS == OPT_OS_NONE
- // 1ms tick timer
- SysTick_Config(SystemCoreClock / 1000);
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
- // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
- //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
-#endif
-
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* Enable USB power on Pwrctrl CR2 register */
- HAL_PWREx_EnableVddUSB();
-
- GPIO_InitTypeDef GPIO_InitStruct;
-
- // LED
- GPIO_InitStruct.Pin = LED_PIN;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
- HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
-
- board_led_write(false);
-
- // Button
- GPIO_InitStruct.Pin = BUTTON_PIN;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_PULLDOWN;
- GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
- HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
-
- // USB
- /* Configure DM DP Pins */
- GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
- GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /* Configure VBUS Pin */
- GPIO_InitStruct.Pin = GPIO_PIN_11;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
- /* Enable USB FS Clock */
- __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
-
-// // Enable VBUS sense (B device) via pin PA9
-// USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-
// L476Disco use general GPIO PC11 for VBUS sensing instead of dedicated PA9 as others
// Disable VBUS Sense and force device mode
USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
+
+ USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL;
}
-//--------------------------------------------------------------------+
-// board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
- HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
-}
-
-uint32_t board_button_read(void)
-{
- return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
- (void) buf; (void) len;
- return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
- (void) buf; (void) len;
- return 0;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
- system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
- return system_ticks;
-}
+#ifdef __cplusplus
+ }
#endif
-void HardFault_Handler (void)
-{
- asm("bkpt");
-}
-
-// Required by __libc_init_array in startup code if we are compiling using
-// -nostdlib/-nostartfiles.
-void _init(void)
-{
-
-}
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32l4/boards/stm32l476_disco/board.mk b/hw/bsp/stm32l4/boards/stm32l476_disco/board.mk
new file mode 100644
index 000000000..e7b8557a5
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l476_disco/board.mk
@@ -0,0 +1,10 @@
+CFLAGS += \
+ -DSTM32L476xx \
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
+
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32l476vg
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/STM32L4P5ZGTX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/STM32L4P5ZGTX_FLASH.ld
new file mode 100644
index 000000000..c1a490a70
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/STM32L4P5ZGTX_FLASH.ld
@@ -0,0 +1,200 @@
+/*
+******************************************************************************
+**
+** File : LinkerScript.ld
+**
+** Author : Auto-generated by STM32CubeIDE
+**
+** Abstract : Linker script for STM32L4P5ZGTx Device from STM32L4PLUS series
+** 1024Kbytes ROM
+** 320Kbytes RAM
+**
+** Set heap size, stack size and stack location according
+** to application requirements.
+**
+** Set memory bank area and size if external memory is used.
+**
+** Target : STMicroelectronics STM32
+**
+** Distribution: The file is distributed as is without any warranty
+** of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** © COPYRIGHT(c) 2019 STMicroelectronics
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+** 1. Redistributions of source code must retain the above copyright notice,
+** this list of conditions and the following disclaimer.
+** 2. Redistributions in binary form must reproduce the above copyright notice,
+** this list of conditions and the following disclaimer in the documentation
+** and/or other materials provided with the distribution.
+** 3. Neither the name of STMicroelectronics nor the names of its contributors
+** may be used to endorse or promote products derived from this software
+** without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + 0x0001FFFF; /* end of "SRAM1" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K
+ ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
+}
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "ROM" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >ROM
+
+ /* The program code and other data into "ROM" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >ROM
+
+ /* Constant data into "ROM" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >ROM
+
+ .ARM.extab : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >ROM
+
+ .ARM : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >ROM
+
+ .preinit_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >ROM
+
+ .init_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >ROM
+
+ .fini_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >ROM
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> ROM
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/board.h
new file mode 100644
index 000000000..1df389aed
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/board.h
@@ -0,0 +1,137 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT GPIOB
+#define LED_PIN GPIO_PIN_14
+#define LED_STATE_ON 1
+
+#define BUTTON_PORT GPIOC
+#define BUTTON_PIN GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE 1
+
+#define UART_DEV LPUART1
+#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_GPIO_PORT GPIOG
+#define UART_GPIO_AF GPIO_AF8_LPUART1
+#define UART_TX_PIN GPIO_PIN_7
+#define UART_RX_PIN GPIO_PIN_8
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+
+/**
+ * @brief System Clock Configuration
+ * The system Clock is configured as follow :
+ * System Clock source = PLL (MSI)
+ * SYSCLK(Hz) = 120000000
+ * HCLK(Hz) = 120000000
+ * AHB Prescaler = 1
+ * APB1 Prescaler = 1
+ * APB2 Prescaler = 1
+ * MSI Frequency(Hz) = 48000000
+ * PLL_M = 12
+ * PLL_N = 60
+ * PLL_P = 2
+ * PLL_Q = 2
+ * VDD(V) = 3.3
+ * Main regulator output voltage = Scale1 mode
+ * Flash Latency(WS) = 5
+ * The USB clock configuration from PLLSAI:
+ * PLLSAIP = 8 FIXME
+ * PLLSAIN = 384 FIXME
+ * PLLSAIQ = 7 FIXME
+ * @param None
+ * @retval None
+ */
+
+static inline void board_clock_init(void)
+{
+ RCC_ClkInitTypeDef RCC_ClkInitStruct;
+ RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+ /* Activate PLL with MSI , stabilizied via PLL by LSE */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = 12;
+ RCC_OscInitStruct.PLL.PLLN = 60;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = 2;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ /* Enable MSI Auto-calibration through LSE */
+ HAL_RCCEx_EnableMSIPLLMode();
+
+ /* Select MSI output as USB clock source */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+ /* Select MSI output as USB clock source */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+ clocks dividers */
+ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ // Avoid overshoot and start with HCLK 60 MHz
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
+
+ /* AHB prescaler divider at 1 as second step */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+}
+
+static inline void board_vbus_sense_init(void)
+{
+ // Enable VBUS sense (B device) via pin PA9
+ USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/board.mk
new file mode 100644
index 000000000..8252dd838
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4p5_nucleo/board.mk
@@ -0,0 +1,10 @@
+CFLAGS += \
+ -DSTM32L4P5xx \
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
+
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32l4p5zg
diff --git a/hw/bsp/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/STM32L4RXxI_FLASH.ld
similarity index 100%
rename from hw/bsp/stm32l4r5nucleo/STM32L4RXxI_FLASH.ld
rename to hw/bsp/stm32l4/boards/stm32l4r5_nucleo/STM32L4RXxI_FLASH.ld
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/board.h
new file mode 100644
index 000000000..1df389aed
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/board.h
@@ -0,0 +1,137 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT GPIOB
+#define LED_PIN GPIO_PIN_14
+#define LED_STATE_ON 1
+
+#define BUTTON_PORT GPIOC
+#define BUTTON_PIN GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE 1
+
+#define UART_DEV LPUART1
+#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_GPIO_PORT GPIOG
+#define UART_GPIO_AF GPIO_AF8_LPUART1
+#define UART_TX_PIN GPIO_PIN_7
+#define UART_RX_PIN GPIO_PIN_8
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+
+/**
+ * @brief System Clock Configuration
+ * The system Clock is configured as follow :
+ * System Clock source = PLL (MSI)
+ * SYSCLK(Hz) = 120000000
+ * HCLK(Hz) = 120000000
+ * AHB Prescaler = 1
+ * APB1 Prescaler = 1
+ * APB2 Prescaler = 1
+ * MSI Frequency(Hz) = 48000000
+ * PLL_M = 12
+ * PLL_N = 60
+ * PLL_P = 2
+ * PLL_Q = 2
+ * VDD(V) = 3.3
+ * Main regulator output voltage = Scale1 mode
+ * Flash Latency(WS) = 5
+ * The USB clock configuration from PLLSAI:
+ * PLLSAIP = 8 FIXME
+ * PLLSAIN = 384 FIXME
+ * PLLSAIQ = 7 FIXME
+ * @param None
+ * @retval None
+ */
+
+static inline void board_clock_init(void)
+{
+ RCC_ClkInitTypeDef RCC_ClkInitStruct;
+ RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+ /* Activate PLL with MSI , stabilizied via PLL by LSE */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
+ RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
+ RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = 12;
+ RCC_OscInitStruct.PLL.PLLN = 60;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = 2;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ /* Enable MSI Auto-calibration through LSE */
+ HAL_RCCEx_EnableMSIPLLMode();
+
+ /* Select MSI output as USB clock source */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+ /* Select MSI output as USB clock source */
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
+ PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+ clocks dividers */
+ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ // Avoid overshoot and start with HCLK 60 MHz
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
+
+ /* AHB prescaler divider at 1 as second step */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+}
+
+static inline void board_vbus_sense_init(void)
+{
+ // Enable VBUS sense (B device) via pin PA9
+ USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/board.mk
new file mode 100644
index 000000000..3d7fa227b
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l4r5_nucleo/board.mk
@@ -0,0 +1,14 @@
+CFLAGS += \
+ -DHSE_VALUE=8000000 \
+ -DSTM32L4R5xx \
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
+
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32l4r5zi
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32l4r5nucleo/stm32l4r5nucleo.c b/hw/bsp/stm32l4/family.c
similarity index 55%
rename from hw/bsp/stm32l4r5nucleo/stm32l4r5nucleo.c
rename to hw/bsp/stm32l4/family.c
index 8c661b602..c15be98e5 100644
--- a/hw/bsp/stm32l4r5nucleo/stm32l4r5nucleo.c
+++ b/hw/bsp/stm32l4/family.c
@@ -26,9 +26,9 @@
* This file is part of the TinyUSB stack.
*/
-#include "../board.h"
-
#include "stm32l4xx_hal.h"
+#include "bsp/board.h"
+#include "board.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
@@ -42,119 +42,22 @@ void OTG_FS_IRQHandler(void)
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
-#define LED_PORT GPIOB
-#define LED_PIN GPIO_PIN_14
-#define LED_STATE_ON 1
-
-#define BUTTON_PORT GPIOC
-#define BUTTON_PIN GPIO_PIN_13
-#define BUTTON_STATE_ACTIVE 1
-
-#define UARTx LPUART1
-#define UART_GPIO_PORT GPIOG
-#define UART_GPIO_AF GPIO_AF8_LPUART1
-#define UART_TX_PIN GPIO_PIN_7
-#define UART_RX_PIN GPIO_PIN_8
-
UART_HandleTypeDef UartHandle;
-// enable all LED, Button, Uart, USB clock
-static void all_rcc_clk_enable(void)
-{
- __HAL_RCC_GPIOA_CLK_ENABLE(); // USB D+, D-
- __HAL_RCC_GPIOB_CLK_ENABLE(); // LED
- __HAL_RCC_GPIOC_CLK_ENABLE(); // Button
- __HAL_RCC_GPIOG_CLK_ENABLE(); // Uart TX, RX
- __HAL_RCC_LPUART1_CLK_ENABLE(); // LPUart1 module
-}
-
-/**
- * @brief System Clock Configuration
- * The system Clock is configured as follow :
- * System Clock source = PLL (MSI)
- * SYSCLK(Hz) = 120000000
- * HCLK(Hz) = 120000000
- * AHB Prescaler = 1
- * APB1 Prescaler = 1
- * APB2 Prescaler = 1
- * MSI Frequency(Hz) = 48000000
- * PLL_M = 12
- * PLL_N = 60
- * PLL_P = 2
- * PLL_Q = 2
- * VDD(V) = 3.3
- * Main regulator output voltage = Scale1 mode
- * Flash Latency(WS) = 5
- * The USB clock configuration from PLLSAI:
- * PLLSAIP = 8 FIXME
- * PLLSAIN = 384 FIXME
- * PLLSAIQ = 7 FIXME
- * @param None
- * @retval None
- */
-void SystemClock_Config(void)
-{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
- /* Activate PLL with MSI , stabilizied via PLL by LSE */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
- RCC_OscInitStruct.MSIState = RCC_MSI_ON;
- RCC_OscInitStruct.LSEState = RCC_LSE_ON;
- RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11;
- RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
- RCC_OscInitStruct.PLL.PLLM = 12;
- RCC_OscInitStruct.PLL.PLLN = 60;
- RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = 2;
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
-
- /* Enable MSI Auto-calibration through LSE */
- HAL_RCCEx_EnableMSIPLLMode();
-
- /* Select MSI output as USB clock source */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI;
- HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-
- /* Select MSI output as USB clock source */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
- PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
- HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
-
- /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
- clocks dividers */
- RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- // Avoid overshoot and start with HCLK 60 MHz
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
-
- /* AHB prescaler divider at 1 as second step */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
-}
-
void board_init(void)
{
- /* Enable Power Clock*/
- __HAL_RCC_PWR_CLK_ENABLE();
- /* Enable voltage range 1 boost mode for frequency above 80 Mhz */
- HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+ board_clock_init();
- /* Set tick interrupt priority, default HAL value is intentionally invalid
- and that prevents PLL initialization in HAL_RCC_OscConfig() */
-
- HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL);
-
- SystemClock_Config();
- all_rcc_clk_enable();
+ // Enable All GPIOs clocks
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+ __HAL_RCC_GPIOH_CLK_ENABLE();
+ UART_CLK_EN();
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
@@ -164,6 +67,15 @@ void board_init(void)
//NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
#endif
+ /* Enable USB power on Pwrctrl CR2 register */
+ /* Enable Power Clock*/
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+#if defined(PWR_CR5_R1MODE)
+ /* Enable voltage range 1 boost mode for frequency above 80 Mhz */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+#endif
+
/* Enable USB power on Pwrctrl CR2 register */
HAL_PWREx_EnableVddUSB();
@@ -192,7 +104,7 @@ void board_init(void)
GPIO_InitStruct.Alternate = UART_GPIO_AF;
HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
- UartHandle.Instance = UARTx;
+ UartHandle.Instance = UART_DEV;
UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
UartHandle.Init.StopBits = UART_STOPBITS_1;
@@ -201,7 +113,7 @@ void board_init(void)
UartHandle.Init.Mode = UART_MODE_TX_RX;
UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
UartHandle.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- UartHandle.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+ //UartHandle.Init.ClockPrescaler = UART_PRESCALER_DIV1;
UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
HAL_UART_Init(&UartHandle);
@@ -231,8 +143,7 @@ void board_init(void)
/* Enable USB FS Clocks */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
- // Enable VBUS sense (B device) via pin PA9
- USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
+ board_vbus_sense_init();
}
//--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32l4r5nucleo/board.mk b/hw/bsp/stm32l4/family.mk
similarity index 81%
rename from hw/bsp/stm32l4r5nucleo/board.mk
rename to hw/bsp/stm32l4/family.mk
index 12a291d0a..d6f55e5f9 100644
--- a/hw/bsp/stm32l4r5nucleo/board.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -4,6 +4,8 @@ DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+include $(TOP)/$(BOARD_PATH)/board.mk
+
CFLAGS += \
-flto \
-mthumb \
@@ -12,18 +14,14 @@ CFLAGS += \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
- -DHSE_VALUE=8000000 \
- -DSTM32L4R5xx \
-DCFG_TUSB_MCU=OPT_MCU_STM32L4
# suppress warning caused by vendor mcu driver
CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/STM32L4RXxI_FLASH.ld
-
+#src/portable/st/synopsys/dcd_synopsys.c
SRC_C += \
- src/portable/st/synopsys/dcd_synopsys.c \
+ src/portable/synopsys/dwc2/dcd_dwc2.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
@@ -34,14 +32,11 @@ SRC_C += \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
-SRC_S += \
- $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
-
INC += \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(ST_CMSIS)/Include \
$(TOP)/$(ST_HAL_DRIVER)/Inc \
- $(TOP)/hw/bsp/$(BOARD)
+ $(TOP)/$(BOARD_PATH)
# For freeRTOS port source
FREERTOS_PORT = ARM_CM4F
diff --git a/hw/bsp/stm32l476disco/stm32l4xx_hal_conf.h b/hw/bsp/stm32l4/stm32l4xx_hal_conf.h
similarity index 100%
rename from hw/bsp/stm32l476disco/stm32l4xx_hal_conf.h
rename to hw/bsp/stm32l4/stm32l4xx_hal_conf.h
diff --git a/hw/bsp/stm32l476disco/board.mk b/hw/bsp/stm32l476disco/board.mk
deleted file mode 100644
index 8d9e267cf..000000000
--- a/hw/bsp/stm32l476disco/board.mk
+++ /dev/null
@@ -1,56 +0,0 @@
-ST_FAMILY = l4
-DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
-
-ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
-ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
-
-CFLAGS += \
- -flto \
- -mthumb \
- -mabi=aapcs \
- -mcpu=cortex-m4 \
- -mfloat-abi=hard \
- -mfpu=fpv4-sp-d16 \
- -nostdlib -nostartfiles \
- -DSTM32L476xx \
- -DCFG_TUSB_MCU=OPT_MCU_STM32L4
-
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/STM32L476VGTx_FLASH.ld
-
-#src/portable/st/synopsys/dcd_synopsys.c
-SRC_C += \
- src/portable/synopsys/dwc2/dcd_dwc2.c \
- $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
- $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
-
-SRC_S += \
- $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
-
-INC += \
- $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
- $(TOP)/$(ST_CMSIS)/Include \
- $(TOP)/$(ST_HAL_DRIVER)/Inc \
- $(TOP)/hw/bsp/$(BOARD)
-
-# For freeRTOS port source
-FREERTOS_PORT = ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = stm32l476vg
-
-# Path to STM32 Cube Programmer CLI, should be added into system path
-STM32Prog = STM32_Programmer_CLI
-
-# flash target using on-board stlink
-flash: flash-stlink
diff --git a/hw/bsp/stm32l4r5nucleo/stm32l4xx_hal_conf.h b/hw/bsp/stm32l4r5nucleo/stm32l4xx_hal_conf.h
deleted file mode 100644
index 470ef1290..000000000
--- a/hw/bsp/stm32l4r5nucleo/stm32l4xx_hal_conf.h
+++ /dev/null
@@ -1,419 +0,0 @@
-/**
- ******************************************************************************
- * @file stm32l4xx_hal_conf.h
- * @author MCD Application Team
- * @brief HAL configuration template file.
- * This file should be copied to the application folder and renamed
- * to stm32l4xx_hal_conf.h.
- ******************************************************************************
- * @attention
- *
- * © Copyright (c) 2017 STMicroelectronics.
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- * opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L4xx_HAL_CONF_H
-#define __STM32L4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
- * @brief This is the list of modules to be used in the HAL driver
- */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED */
-/* #define HAL_CAN_MODULE_ENABLED */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
-/* #define HAL_COMP_MODULE_ENABLED */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_CRC_MODULE_ENABLED */
-/* #define HAL_CRYP_MODULE_ENABLED */
-/* #define HAL_DAC_MODULE_ENABLED */
-/* #define HAL_DFSDM_MODULE_ENABLED */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_FIREWALL_MODULE_ENABLED */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED */
-// #define HAL_NOR_MODULE_ENABLED
-// #define HAL_SRAM_MODULE_ENABLED
-/* #define HAL_HCD_MODULE_ENABLED */
-#define HAL_GPIO_MODULE_ENABLED
-//#define HAL_I2C_MODULE_ENABLED
-/* #define HAL_IRDA_MODULE_ENABLED */
-/* #define HAL_IWDG_MODULE_ENABLED */
-//#define HAL_LCD_MODULE_ENABLED
-/* #define HAL_LPTIM_MODULE_ENABLED */
-/* #define HAL_OPAMP_MODULE_ENABLED */
-//#define HAL_PCD_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED */
-/* #define HAL_RTC_MODULE_ENABLED */
-//#define HAL_SAI_MODULE_ENABLED
-//#define HAL_SD_MODULE_ENABLED
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_SMBUS_MODULE_ENABLED */
-/* #define HAL_SPI_MODULE_ENABLED */
-/* #define HAL_SWPMI_MODULE_ENABLED */
-/* #define HAL_TIM_MODULE_ENABLED */
-/* #define HAL_TSC_MODULE_ENABLED */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED */
-
-
-/* ########################## Oscillator Values adaptation ####################*/
-/**
- * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
- * This value is used by the RCC HAL module to compute the system frequency
- * (when HSE is used as system clock source, directly or through the PLL).
- */
-#if !defined (HSE_VALUE)
- #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined (HSE_STARTUP_TIMEOUT)
- #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
- * @brief Internal Multiple Speed oscillator (MSI) default value.
- * This value is the default MSI range value after Reset.
- */
-#if !defined (MSI_VALUE)
- #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
-#endif /* MSI_VALUE */
-
-/**
- * @brief Internal High Speed oscillator (HSI) value.
- * This value is used by the RCC HAL module to compute the system frequency
- * (when HSI is used as system clock source, directly or through the PLL).
- */
-#if !defined (HSI_VALUE)
- #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
- * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
- * This internal oscillator is mainly dedicated to provide a high precision clock to
- * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
- * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
- * which is subject to manufacturing process variations.
- */
-#if !defined (HSI48_VALUE)
- #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
- The real value my vary depending on manufacturing process variations.*/
-#endif /* HSI48_VALUE */
-
-/**
- * @brief Internal Low Speed oscillator (LSI) value.
- */
-#if !defined (LSI_VALUE)
- #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
- The real value may vary depending on the variations
- in voltage and temperature.*/
-/**
- * @brief External Low Speed oscillator (LSE) value.
- * This value is used by the UART, RTC HAL module to compute the system frequency
- */
-#if !defined (LSE_VALUE)
- #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
-#endif /* LSE_VALUE */
-
-#if !defined (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
- * @brief External clock source for SAI1 peripheral
- * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
- * frequency.
- */
-#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
- #define EXTERNAL_SAI1_CLOCK_VALUE 48000U /*!< Value of the SAI1 External clock source in Hz*/
-#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
-
-/**
- * @brief External clock source for SAI2 peripheral
- * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
- * frequency.
- */
-#if !defined (EXTERNAL_SAI2_CLOCK_VALUE)
- #define EXTERNAL_SAI2_CLOCK_VALUE 48000U /*!< Value of the SAI2 External clock source in Hz*/
-#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
- === you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
- * @brief This is the HAL system configuration section
- */
-#define VDD_VALUE 3300U /*!< Value of VDD in mv */
-#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority */
-#define USE_RTOS 0U
-#define PREFETCH_ENABLE 0U
-#define INSTRUCTION_CACHE_ENABLE 1U
-#define DATA_CACHE_ENABLE 1U
-
-#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
-#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
-#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */
-#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
-#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
-#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
-#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
-#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
-#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
-#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
-#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */
-#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
-#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
-#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
-#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
-#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
-#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
-#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */
-#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
-#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
-#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */
-#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
-#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
-#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
-#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */
-#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
-#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
-#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
-#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
-#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
-#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
-#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
-#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
-#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */
-#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
-#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
-#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
-#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
-
-/* ########################## Assert Selection ############################## */
-/**
- * @brief Uncomment the line below to expanse the "assert_param" macro in the
- * HAL drivers code
- */
-/* #define USE_FULL_ASSERT 1U */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
- * Activated: CRC code is present inside driver
- * Deactivated: CRC code cleaned from driver
- */
-
-#define USE_SPI_CRC 1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
- * @brief Include module's header file
- */
-
-#ifdef HAL_RCC_MODULE_ENABLED
- #include "stm32l4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
- #include "stm32l4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
- #include "stm32l4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32l4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
- #include "stm32l4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
- #include "stm32l4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
- #include "stm32l4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
- #include "Legacy/stm32l4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_COMP_MODULE_ENABLED
- #include "stm32l4xx_hal_comp.h"
-#endif /* HAL_COMP_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
- #include "stm32l4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
- #include "stm32l4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
- #include "stm32l4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_FIREWALL_MODULE_ENABLED
- #include "stm32l4xx_hal_firewall.h"
-#endif /* HAL_FIREWALL_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
- #include "stm32l4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
- #include "stm32l4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
- #include "stm32l4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
- #include "stm32l4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32l4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32l4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LCD_MODULE_ENABLED
- #include "stm32l4xx_hal_lcd.h"
-#endif /* HAL_LCD_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
-#include "stm32l4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_OPAMP_MODULE_ENABLED
-#include "stm32l4xx_hal_opamp.h"
-#endif /* HAL_OPAMP_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32l4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32l4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32l4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32l4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32l4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32l4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32l4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32l4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_SWPMI_MODULE_ENABLED
- #include "stm32l4xx_hal_swpmi.h"
-#endif /* HAL_SWPMI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32l4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_TSC_MODULE_ENABLED
- #include "stm32l4xx_hal_tsc.h"
-#endif /* HAL_TSC_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32l4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32l4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32l4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32l4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32l4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32l4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32l4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef USE_FULL_ASSERT
-/**
- * @brief The assert_param macro is used for function's parameters check.
- * @param expr: If expr is false, it calls assert_failed function
- * which reports the name of the source file and the source
- * line number of the call that failed.
- * If expr is true, it returns no value.
- * @retval None
- */
- #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
- void assert_failed(uint8_t *file, uint32_t line);
-#else
- #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 9750757aa..a850d4e15 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -59,7 +59,7 @@
#define DWC2_REG(_port) ((dwc2_regs_t*) DWC2_REG_BASE)
// Debug level for DWC2
-#define DWC2_DEBUG 1
+#define DWC2_DEBUG 2
static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[2];