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add role to OSAL_QUEUE_DEF() to disable correct dcd/hcd isr

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hathach 2018-12-05 17:01:19 +07:00
parent 250344ac01
commit 6f3898572d
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GPG Key ID: 2FA891220FBFD581
8 changed files with 94 additions and 72 deletions
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1
examples/device/cdc_msc_hid/ses/samd21/samd21.emProject
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@ -22,6 +22,7 @@
c_user_include_directories="../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk;$(asf4Dir)/hpl/pm"
debug_register_definition_file="ATSAMD21G18A_Registers.xml"
debug_target_connection="J-Link"
gcc_enable_all_warnings="Yes"
gcc_entry_point="Reset_Handler"
link_use_linker_script_file="No"
linker_memory_map_file="$(ProjectDir)/ATSAMD21G18A_MemoryMap.xml"

3
src/common/tusb_fifo.h
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@ -67,13 +67,12 @@ typedef struct
uint8_t* buffer ; ///< buffer pointer
uint16_t depth ; ///< max items
uint16_t item_size ; ///< size of each item
bool overwritable ;
volatile uint16_t count ; ///< number of items in queue
volatile uint16_t wr_idx ; ///< write pointer
volatile uint16_t rd_idx ; ///< read pointer
bool overwritable ;
#if CFG_FIFO_MUTEX
tu_fifo_mutex_t mutex;
#endif

32
src/device/usbd.c
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@ -161,8 +161,9 @@ enum { USBD_CLASS_DRIVER_COUNT = sizeof(usbd_class_drivers) / sizeof(usbd_class_
//--------------------------------------------------------------------+
OSAL_TASK_DEF(_usbd_task_def, "usbd", usbd_task, CFG_TUD_TASK_PRIO, CFG_TUD_TASK_STACK_SZ);
/*------------- event queue -------------*/
OSAL_QUEUE_DEF(_usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
// Event queue
// role device/host is used by OS NONE for mutex (disable usb isr) only
OSAL_QUEUE_DEF(OPT_MODE_DEVICE, _usbd_qdef, CFG_TUD_TASK_QUEUE_SZ, dcd_event_t);
static osal_queue_t _usbd_q;
//--------------------------------------------------------------------+
@ -200,15 +201,8 @@ tusb_error_t usbd_init (void)
for (uint8_t i = 0; i < USBD_CLASS_DRIVER_COUNT; i++) usbd_class_drivers[i].init();
// Init device controller driver
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
dcd_init(0);
dcd_int_enable(0);
#endif
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
dcd_init(1);
dcd_int_enable(1);
#endif
dcd_init(TUD_OPT_RHPORT);
dcd_int_enable(TUD_OPT_RHPORT);
return TUSB_ERROR_NONE;
}
@ -268,14 +262,14 @@ static void usbd_task_body(void)
break;
case DCD_EVENT_BUS_RESET:
// note: if task is too slow, we could clear the event of the new attached
usbd_reset(event.rhport);
// TODO remove since if task is too slow, we could clear the event of the new attached
osal_queue_reset(_usbd_q);
break;
case DCD_EVENT_UNPLUGGED:
// note: if task is too slow, we could clear the event of the new attached
usbd_reset(event.rhport);
// TODO remove since if task is too slow, we could clear the event of the new attached
osal_queue_reset(_usbd_q);
tud_umount_cb(); // invoke callback
@ -587,6 +581,11 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr)
TU_ASSERT(event->xfer_complete.result == XFER_RESULT_SUCCESS,);
break;
// Not an DCD event, just a convenient way to defer ISR function should we need
case USBD_EVT_FUNC_CALL:
osal_queue_send(_usbd_q, event, in_isr);
break;
default: break;
}
}
@ -622,6 +621,8 @@ void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_
//--------------------------------------------------------------------+
// Helper
//--------------------------------------------------------------------+
// Helper to parse an pair of endpoint descriptors (IN & OUT)
tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* p_desc_ep, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in)
{
for(int i=0; i<2; i++)
@ -645,7 +646,8 @@ tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* p_d
return TUSB_ERROR_NONE;
}
void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr )
// Helper to defer an isr function
void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr)
{
dcd_event_t event =
{
@ -656,7 +658,7 @@ void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr )
event.func_call.func = func;
event.func_call.param = param;
osal_queue_send(_usbd_q, &event, in_isr);
dcd_event_handler(&event, in_isr);
}
#endif

4
src/osal/osal_freertos.h
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@ -139,7 +139,9 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl)
//--------------------------------------------------------------------+
// QUEUE API
//--------------------------------------------------------------------+
#define OSAL_QUEUE_DEF(_name, _depth, _type) \
// role device/host is used by OS NONE for mutex (disable usb isr) only
#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
static _type _name##_##buf[_depth];\
osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf };

4
src/osal/osal_mynewt.h
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@ -75,7 +75,9 @@ static inline void osal_task_delay(uint32_t msec)
//--------------------------------------------------------------------+
// QUEUE API
//--------------------------------------------------------------------+
#define OSAL_QUEUE_DEF(_name, _depth, _type) \
// role device/host is used by OS NONE for mutex (disable usb isr) only
#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
static _type _name##_##buf[_depth];\
static struct os_event* _name##_##evbuf[_depth];\
osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, .evbuf = _name##_##evbuf};\

89
src/osal/osal_none.h
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@ -93,12 +93,11 @@ static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl)
static inline tusb_error_t osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
(void) msec;
while (true) {
while (sem_hdl->count == 0) {
}
if (sem_hdl->count == 0) {
sem_hdl->count--;
break;
}
while (sem_hdl->count == 0) { }
if (sem_hdl->count == 0) {
sem_hdl->count--;
break;
}
}
return TUSB_ERROR_NONE;
}
@ -124,40 +123,90 @@ static inline osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef)
//--------------------------------------------------------------------+
#include "common/tusb_fifo.h"
#define OSAL_QUEUE_DEF(_name, _depth, _type) TU_FIFO_DEF(_name, _depth, _type, false)
typedef struct
{
uint8_t role; // device or host
tu_fifo_t ff;
}osal_queue_def_t;
typedef tu_fifo_t osal_queue_def_t;
typedef tu_fifo_t* osal_queue_t;
typedef osal_queue_def_t* osal_queue_t;
// role device/host is used by OS NONE for mutex (disable usb isr) only
#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \
uint8_t _name##_buf[_depth*sizeof(_type)]; \
osal_queue_def_t _name = { \
.role = _role, \
.ff = { \
.buffer = _name##_buf, \
.depth = _depth, \
.item_size = sizeof(_type), \
.overwritable = false, \
}\
}
// lock queue by disable usb isr
static inline void _osal_q_lock(osal_queue_t qhdl)
{
#if TUSB_OPT_DEVICE_ENABLED
extern void dcd_int_disable(uint8_t rhport);
if (qhdl->role == OPT_MODE_DEVICE) dcd_int_disable(TUD_OPT_RHPORT);
#endif
#if MODE_HOST_SUPPORTED
extern void hcd_int_disable(uint8_t rhport);
if (qhdl->role == OPT_MODE_HOST) hcd_int_disable(TUH_OPT_RHPORT);
#endif
}
// unlock queue
static inline void _osal_q_unlock(osal_queue_t qhdl)
{
#if TUSB_OPT_DEVICE_ENABLED
extern void dcd_int_enable(uint8_t rhport);
if (qhdl->role == OPT_MODE_DEVICE) dcd_int_enable(TUD_OPT_RHPORT);
#endif
#if MODE_HOST_SUPPORTED
extern void hcd_int_enable(uint8_t rhport);
if (qhdl->role == OPT_MODE_HOST) hcd_int_enable(TUH_OPT_RHPORT);
#endif
}
static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
{
tu_fifo_clear(qdef);
tu_fifo_clear(&qdef->ff);
return (osal_queue_t) qdef;
}
static inline bool osal_queue_send(osal_queue_t const queue_hdl, void const * data, bool in_isr)
static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr)
{
if (!in_isr) {
tusb_hal_int_disable_all();
_osal_q_lock(qhdl);
}
bool success = tu_fifo_write( (tu_fifo_t*) queue_hdl, data);
bool success = tu_fifo_write(&qhdl->ff, data);
if (!in_isr) {
tusb_hal_int_enable_all();
_osal_q_unlock(qhdl);
}
return success;
}
static inline void osal_queue_reset(osal_queue_t const queue_hdl)
static inline void osal_queue_reset(osal_queue_t const qhdl)
{
// tusb_hal_int_disable_all();
tu_fifo_clear( (tu_fifo_t*) queue_hdl);
tu_fifo_clear(&qhdl->ff);
// tusb_hal_int_enable_all();
}
static inline bool osal_queue_receive(osal_queue_t const queue_hdl, void* data) {
tusb_hal_int_disable_all();
bool success = tu_fifo_read(queue_hdl, data);
tusb_hal_int_enable_all();
// non blocking
static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
{
_osal_q_lock(qhdl);
bool success = tu_fifo_read(&qhdl->ff, data);
_osal_q_unlock(qhdl);
return success;
}

32
src/tusb_hal.h
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@ -55,38 +55,6 @@ extern "C" {
// Only required to implement if using No RTOS (osal_none)
uint32_t tusb_hal_millis(void);
// TODO remove
extern void dcd_int_enable (uint8_t rhport);
extern void dcd_int_disable(uint8_t rhport);
// Enable all ports' interrupt
// TODO remove
static inline void tusb_hal_int_enable_all(void)
{
#ifdef CFG_TUSB_RHPORT0_MODE
dcd_int_enable(0);
#endif
#ifdef CFG_TUSB_RHPORT0_MODE
dcd_int_enable(1);
#endif
}
// Disable all ports' interrupt
// TODO remove
static inline void tusb_hal_int_disable_all(void)
{
#ifdef CFG_TUSB_RHPORT0_MODE
dcd_int_disable(0);
#endif
#ifdef CFG_TUSB_RHPORT0_MODE
dcd_int_disable(1);
#endif
}
#ifdef __cplusplus
}
#endif

1
src/tusb_option.h
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@ -123,7 +123,6 @@
// Which roothub port is configured as device
#define TUD_OPT_RHPORT ( (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) ? 0 : ((CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) ? 1 : -1) )
#if TUD_OPT_RHPORT == 0
#define TUD_OPT_HIGH_SPEED ( CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED )
#else