mirror of
https://github.com/hathach/tinyusb.git
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Merge pull request #891 from hathach/host-rp2040-double-buffer
RP2040 double buffer
This commit is contained in:
commit
6e939de9d6
@ -30,7 +30,8 @@
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// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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//--------------------------------------------------------------------+
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// If your host terminal support ansi escape code, it can be use to simulate mouse cursor
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// If your host terminal support ansi escape code such as TeraTerm
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// it can be use to simulate mouse cursor movement within terminal
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#define USE_ANSI_ESCAPE 0
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#define MAX_REPORT 4
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@ -113,6 +114,13 @@ void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t cons
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return;
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}
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// For complete list of Usage Page & Usage checkout src/class/hid/hid.h. For examples:
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// - Keyboard : Desktop, Keyboard
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// - Mouse : Desktop, Mouse
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// - Gamepad : Desktop, Gamepad
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// - Consumer Control (Media Key) : Consumer, Consumer Control
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// - System Control (Power key) : Desktop, System Control
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// - Generic (vendor) : 0xFFxx, xx
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if ( rpt_info->usage_page == HID_USAGE_PAGE_DESKTOP )
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{
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switch (rpt_info->usage)
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@ -164,7 +172,7 @@ static void process_kbd_report(hid_keyboard_report_t const *report)
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}else
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{
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// not existed in previous report means the current key is pressed
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bool const is_shift = report->modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT);
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bool const is_shift = report->modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT);
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uint8_t ch = keycode2ascii[report->keycode[i]][is_shift ? 1 : 0];
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putchar(ch);
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if ( ch == '\r' ) putchar('\n'); // added new line for enter key
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@ -76,7 +76,7 @@
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#define CFG_TUH_HUB 1
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#define CFG_TUH_CDC 1
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#define CFG_TUH_HID 2
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#define CFG_TUH_HID 4
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#define CFG_TUH_MSC 1
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#define CFG_TUH_VENDOR 0
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@ -37,16 +37,6 @@
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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/*
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"KEYBOARD" : in_len=8 , out_len=1, usage_page=0x01, usage=0x06 # Generic Desktop, Keyboard
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"MOUSE" : in_len=4 , out_len=0, usage_page=0x01, usage=0x02 # Generic Desktop, Mouse
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"CONSUMER" : in_len=2 , out_len=0, usage_page=0x0C, usage=0x01 # Consumer, Consumer Control
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"SYS_CONTROL" : in_len=1 , out_len=0, usage_page=0x01, usage=0x80 # Generic Desktop, Sys Control
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"GAMEPAD" : in_len=6 , out_len=0, usage_page=0x01, usage=0x05 # Generic Desktop, Game Pad
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"DIGITIZER" : in_len=5 , out_len=0, usage_page=0x0D, usage=0x02 # Digitizers, Pen
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"XAC_COMPATIBLE_GAMEPAD" : in_len=3 , out_len=0, usage_page=0x01, usage=0x05 # Generic Desktop, Game Pad
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"RAW" : in_len=64, out_len=0, usage_page=0xFFAF, usage=0xAF # Vendor 0xFFAF "Adafruit", 0xAF
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*/
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typedef struct
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{
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uint8_t itf_num;
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@ -452,9 +442,9 @@ uint8_t tuh_hid_parse_report_descriptor(tuh_hid_report_info_t* report_info_arr,
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uint8_t const data8 = desc_report[0];
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TU_LOG2("tag = %d, type = %d, size = %d, data = ", tag, type, size);
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for(uint32_t i=0; i<size; i++) TU_LOG2("%02X ", desc_report[i]);
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TU_LOG2("\r\n");
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TU_LOG(3, "tag = %d, type = %d, size = %d, data = ", tag, type, size);
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for(uint32_t i=0; i<size; i++) TU_LOG(3, "%02X ", desc_report[i]);
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TU_LOG(3, "\r\n");
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switch(type)
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{
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@ -123,7 +123,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_align4k (uint32_t value) { retur
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TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_offset4k(uint32_t value) { return (value & 0xFFFUL); }
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//------------- Mathematics -------------//
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TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_abs(int32_t value) { return (uint32_t)((value < 0) ? (-value) : value); }
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TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_div_ceil(uint32_t v, uint32_t d) { return (v + d -1)/d; }
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/// inclusive range checking TODO remove
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TU_ATTR_ALWAYS_INLINE static inline bool tu_within(uint32_t lower, uint32_t value, uint32_t upper)
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@ -317,8 +317,8 @@ void tu_print_var(uint8_t const* buf, uint32_t bufsize)
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#define TU_LOG1 tu_printf
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#define TU_LOG1_MEM tu_print_mem
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#define TU_LOG1_VAR(_x) tu_print_var((uint8_t const*)(_x), sizeof(*(_x)))
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#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\n", (uint32_t) (_x) )
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#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\n", (uint32_t) (_x) )
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#define TU_LOG1_INT(_x) tu_printf(#_x " = %ld\r\n", (uint32_t) (_x) )
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#define TU_LOG1_HEX(_x) tu_printf(#_x " = %lX\r\n", (uint32_t) (_x) )
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// Log Level 2: Warn
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#if CFG_TUSB_DEBUG >= 2
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@ -75,7 +75,7 @@
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#if CFG_TUSB_DEBUG
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#include <stdio.h>
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#define _MESS_ERR(_err) tu_printf("%s %d: failed, error = %s\r\n", __func__, __LINE__, tusb_strerr[_err])
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#define _MESS_FAILED() tu_printf("%s %d: assert failed\r\n", __func__, __LINE__)
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#define _MESS_FAILED() tu_printf("%s %d: ASSERT FAILED\r\n", __func__, __LINE__)
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#else
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#define _MESS_ERR(_err) do {} while (0)
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#define _MESS_FAILED() do {} while (0)
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@ -1254,14 +1254,13 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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if ( dcd_edpt_xfer(rhport, ep_addr, buffer, total_bytes) )
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{
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TU_LOG2("OK\r\n");
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return true;
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}else
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{
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// DCD error, mark endpoint as ready to allow next transfer
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_usbd_dev.ep_status[epnum][dir].busy = false;
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_usbd_dev.ep_status[epnum][dir].claimed = 0;
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TU_LOG2("failed\r\n");
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TU_LOG2("FAILED\r\n");
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TU_BREAKPOINT();
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return false;
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}
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@ -795,6 +795,8 @@ static bool enum_get_addr0_device_desc_complete(uint8_t dev_addr, tusb_control_r
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return false;
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}
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TU_ASSERT(tu_desc_type(_usbh_ctrl_buf) == TUSB_DESC_DEVICE);
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// Reset device again before Set Address
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TU_LOG2("Port reset \r\n");
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@ -938,7 +940,7 @@ static bool enum_get_config_desc_complete(uint8_t dev_addr, tusb_control_request
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// Parse configuration & set up drivers
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// Driver open aren't allowed to make any usb transfer yet
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parse_configuration_descriptor(dev_addr, (tusb_desc_configuration_t*) _usbh_ctrl_buf);
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TU_ASSERT( parse_configuration_descriptor(dev_addr, (tusb_desc_configuration_t*) _usbh_ctrl_buf) );
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TU_LOG2("Set Configuration = %d\r\n", CONFIG_NUM);
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tusb_control_request_t const new_request =
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@ -988,49 +990,54 @@ static bool parse_configuration_descriptor(uint8_t dev_addr, tusb_desc_configura
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// parse each interfaces
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while( p_desc < _usbh_ctrl_buf + desc_cfg->wTotalLength )
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{
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// skip until we see interface descriptor
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if ( TUSB_DESC_INTERFACE != tu_desc_type(p_desc) )
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{
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p_desc = tu_desc_next(p_desc); // skip the descriptor, increase by the descriptor's length
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}else
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{
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tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc;
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// TODO Do we need to use IAD
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// tusb_desc_interface_assoc_t const * desc_itf_assoc = NULL;
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// Check if class is supported
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uint8_t drv_id;
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for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
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{
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if ( usbh_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break;
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}
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// Class will always starts with Interface Association (if any) and then Interface descriptor
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if ( TUSB_DESC_INTERFACE_ASSOCIATION == tu_desc_type(p_desc) )
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{
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// desc_itf_assoc = (tusb_desc_interface_assoc_t const *) p_desc;
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p_desc = tu_desc_next(p_desc);
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}
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if( drv_id >= USBH_CLASS_DRIVER_COUNT )
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TU_ASSERT( TUSB_DESC_INTERFACE == tu_desc_type(p_desc) );
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tusb_desc_interface_t const* desc_itf = (tusb_desc_interface_t const*) p_desc;
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// Check if class is supported
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uint8_t drv_id;
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for (drv_id = 0; drv_id < USBH_CLASS_DRIVER_COUNT; drv_id++)
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{
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if ( usbh_class_drivers[drv_id].class_code == desc_itf->bInterfaceClass ) break;
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}
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if( drv_id >= USBH_CLASS_DRIVER_COUNT )
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{
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// skip unsupported class
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p_desc = tu_desc_next(p_desc);
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}
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else
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{
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usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
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// Interface number must not be used already TODO alternate interface
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TU_ASSERT( dev->itf2drv[desc_itf->bInterfaceNumber] == 0xff );
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dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id;
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if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && dev->hub_addr != 0)
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{
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// skip unsupported class
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// TODO Attach hub to Hub is not currently supported
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// skip this interface
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p_desc = tu_desc_next(p_desc);
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}
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else
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{
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usbh_class_driver_t const * driver = &usbh_class_drivers[drv_id];
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TU_LOG2("%s open\r\n", driver->name);
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// Interface number must not be used already TODO alternate interface
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TU_ASSERT( dev->itf2drv[desc_itf->bInterfaceNumber] == 0xff );
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dev->itf2drv[desc_itf->bInterfaceNumber] = drv_id;
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if (desc_itf->bInterfaceClass == TUSB_CLASS_HUB && dev->hub_addr != 0)
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{
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// TODO Attach hub to Hub is not currently supported
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// skip this interface
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p_desc = tu_desc_next(p_desc);
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}
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else
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{
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TU_LOG2("%s open\r\n", driver->name);
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uint16_t itf_len = 0;
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TU_ASSERT( driver->open(dev->rhport, dev_addr, desc_itf, &itf_len) );
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TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) );
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p_desc += itf_len;
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}
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uint16_t itf_len = 0;
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TU_ASSERT( driver->open(dev->rhport, dev_addr, desc_itf, &itf_len) );
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TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) );
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p_desc += itf_len;
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}
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}
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}
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@ -68,7 +68,7 @@ bool tuh_control_xfer (uint8_t dev_addr, tusb_control_request_t const* request,
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_ctrl_xfer.stage = STAGE_SETUP;
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_ctrl_xfer.complete_cb = complete_cb;
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TU_LOG2("Control Setup: ");
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TU_LOG2("Control Setup (addr = %u): ", dev_addr);
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TU_LOG2_VAR(request);
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TU_LOG2("\r\n");
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@ -119,7 +119,7 @@ bool usbh_control_xfer_cb (uint8_t dev_addr, uint8_t ep_addr, xfer_result_t resu
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if (request->wLength)
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{
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TU_LOG2("Control data:\r\n");
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TU_LOG2("Control data (addr = %u):\r\n", dev_addr);
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TU_LOG2_MEM(_ctrl_xfer.buffer, request->wLength, 2);
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}
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|
@ -64,67 +64,48 @@ static struct hw_endpoint *hw_endpoint_get_by_addr(uint8_t ep_addr)
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static void _hw_endpoint_alloc(struct hw_endpoint *ep)
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{
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uint16_t size = tu_min16(64, ep->wMaxPacketSize);
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// size must be multiple of 64
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uint16_t size = tu_div_ceil(ep->wMaxPacketSize, 64) * 64u;
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// Assumes single buffered for now
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ep->hw_data_buf = next_buffer_ptr;
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next_buffer_ptr += size;
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// Bits 0-5 are ignored by the controller so make sure these are 0
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if ((uintptr_t)next_buffer_ptr & 0b111111u)
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{
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// Round up to the next 64
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uint32_t fixptr = (uintptr_t)next_buffer_ptr;
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fixptr &= ~0b111111u;
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fixptr += 64;
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pico_info("Rounding non 64 byte boundary buffer up from %x to %x\n", (uintptr_t)next_buffer_ptr, fixptr);
|
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next_buffer_ptr = (uint8_t*)fixptr;
|
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}
|
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assert(((uintptr_t)next_buffer_ptr & 0b111111u) == 0);
|
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uint dpram_offset = hw_data_offset(ep->hw_data_buf);
|
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assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX);
|
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// double buffered for Control and Bulk endpoint
|
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if ( ep->transfer_type == TUSB_XFER_CONTROL || ep->transfer_type == TUSB_XFER_BULK)
|
||||
{
|
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size *= 2u;
|
||||
}
|
||||
|
||||
pico_info("Alloced %d bytes at offset 0x%x (0x%p) for ep %d %s\n",
|
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size,
|
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dpram_offset,
|
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ep->hw_data_buf,
|
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ep->num,
|
||||
ep_dir_string[ep->in]);
|
||||
ep->hw_data_buf = next_buffer_ptr;
|
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next_buffer_ptr += size;
|
||||
|
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// Fill in endpoint control register with buffer offset
|
||||
uint32_t reg = EP_CTRL_ENABLE_BITS
|
||||
| EP_CTRL_INTERRUPT_PER_BUFFER
|
||||
| (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB)
|
||||
| dpram_offset;
|
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assert(((uintptr_t )next_buffer_ptr & 0b111111u) == 0);
|
||||
uint dpram_offset = hw_data_offset(ep->hw_data_buf);
|
||||
assert(hw_data_offset(next_buffer_ptr) <= USB_DPRAM_MAX);
|
||||
|
||||
*ep->endpoint_control = reg;
|
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pico_info("Alloced %d bytes at offset 0x%x (0x%p) for ep %d %s\n",
|
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size,
|
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dpram_offset,
|
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ep->hw_data_buf,
|
||||
tu_edpt_number(ep->ep_addr),
|
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ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
|
||||
// Fill in endpoint control register with buffer offset
|
||||
uint32_t const reg = EP_CTRL_ENABLE_BITS | (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset;
|
||||
|
||||
*ep->endpoint_control = reg;
|
||||
}
|
||||
|
||||
static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type)
|
||||
{
|
||||
const uint8_t num = tu_edpt_number(ep_addr);
|
||||
const tusb_dir_t dir = tu_edpt_dir(ep_addr);
|
||||
|
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ep->ep_addr = ep_addr;
|
||||
|
||||
// For device, IN is a tx transfer and OUT is an rx transfer
|
||||
ep->rx = (dir == TUSB_DIR_OUT);
|
||||
|
||||
// Response to a setup packet on EP0 starts with pid of 1
|
||||
ep->next_pid = num == 0 ? 1u : 0u;
|
||||
|
||||
// Add some checks around the max packet size
|
||||
if (transfer_type == TUSB_XFER_ISOCHRONOUS)
|
||||
{
|
||||
if (wMaxPacketSize > USB_MAX_ISO_PACKET_SIZE)
|
||||
{
|
||||
panic("Isochronous wMaxPacketSize %d too large", wMaxPacketSize);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (wMaxPacketSize > USB_MAX_PACKET_SIZE)
|
||||
{
|
||||
panic("Isochronous wMaxPacketSize %d too large", wMaxPacketSize);
|
||||
}
|
||||
}
|
||||
|
||||
ep->wMaxPacketSize = wMaxPacketSize;
|
||||
ep->transfer_type = transfer_type;
|
||||
|
||||
@ -164,6 +145,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t ep_addr, uint16_t
|
||||
|
||||
// Now if it hasn't already been done
|
||||
//alloc a buffer and fill in endpoint control register
|
||||
// TODO device may change configuration (dynamic), should clear and reallocate
|
||||
if(!(ep->configured))
|
||||
{
|
||||
_hw_endpoint_alloc(ep);
|
||||
@ -198,10 +180,10 @@ static void hw_endpoint_init(uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t b
|
||||
_hw_endpoint_init(ep, ep_addr, wMaxPacketSize, bmAttributes);
|
||||
}
|
||||
|
||||
static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes, bool start)
|
||||
static void hw_endpoint_xfer(uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
|
||||
{
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_addr(ep_addr);
|
||||
_hw_endpoint_xfer(ep, buffer, total_bytes, start);
|
||||
hw_endpoint_xfer_start(ep, buffer, total_bytes);
|
||||
}
|
||||
|
||||
static void hw_handle_buff_status(void)
|
||||
@ -213,19 +195,16 @@ static void hw_handle_buff_status(void)
|
||||
{
|
||||
if (remaining_buffers & bit)
|
||||
{
|
||||
uint __unused which = (usb_hw->buf_cpu_should_handle & bit) ? 1 : 0;
|
||||
// Should be single buffered
|
||||
assert(which == 0);
|
||||
// clear this in advance
|
||||
usb_hw_clear->buf_status = bit;
|
||||
// IN transfer for even i, OUT transfer for odd i
|
||||
struct hw_endpoint *ep = hw_endpoint_get_by_num(i >> 1u, !(i & 1u));
|
||||
// Continue xfer
|
||||
bool done = _hw_endpoint_xfer_continue(ep);
|
||||
bool done = hw_endpoint_xfer_continue(ep);
|
||||
if (done)
|
||||
{
|
||||
// Notify
|
||||
dcd_event_xfer_complete(0, ep->ep_addr, ep->len, XFER_RESULT_SUCCESS, true);
|
||||
dcd_event_xfer_complete(0, ep->ep_addr, ep->xferred_len, XFER_RESULT_SUCCESS, true);
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
}
|
||||
remaining_buffers &= ~bit;
|
||||
@ -251,7 +230,7 @@ static void ep0_0len_status(void)
|
||||
{
|
||||
// Send 0len complete response on EP0 IN
|
||||
reset_ep0();
|
||||
hw_endpoint_xfer(0x80, NULL, 0, true);
|
||||
hw_endpoint_xfer(0x80, NULL, 0);
|
||||
}
|
||||
|
||||
static void _hw_endpoint_stall(struct hw_endpoint *ep)
|
||||
@ -339,10 +318,7 @@ static void dcd_rp2040_irq(void)
|
||||
|
||||
#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
|
||||
// Only run enumeration walk-around if pull up is enabled
|
||||
if ( usb_hw->sie_ctrl & USB_SIE_CTRL_PULLUP_EN_BITS )
|
||||
{
|
||||
rp2040_usb_device_enumeration_fix();
|
||||
}
|
||||
if ( usb_hw->sie_ctrl & USB_SIE_CTRL_PULLUP_EN_BITS ) rp2040_usb_device_enumeration_fix();
|
||||
#endif
|
||||
}
|
||||
|
||||
@ -402,9 +378,9 @@ void dcd_init (uint8_t rhport)
|
||||
|
||||
// EP0 always exists so init it now
|
||||
// EP0 OUT
|
||||
hw_endpoint_init(0x0, 64, 0);
|
||||
hw_endpoint_init(0x0, 64, TUSB_XFER_CONTROL);
|
||||
// EP0 IN
|
||||
hw_endpoint_init(0x80, 64, 0);
|
||||
hw_endpoint_init(0x80, 64, TUSB_XFER_CONTROL);
|
||||
|
||||
// Initializes the USB peripheral for device mode and enables it.
|
||||
// Don't need to enable the pull up here. Force VBUS
|
||||
@ -470,23 +446,22 @@ void dcd_connect(uint8_t rhport)
|
||||
|
||||
void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
|
||||
{
|
||||
pico_trace("dcd_edpt0_status_complete %d\n", rhport);
|
||||
assert(rhport == 0);
|
||||
(void) rhport;
|
||||
|
||||
if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
|
||||
request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
|
||||
request->bRequest == TUSB_REQ_SET_ADDRESS)
|
||||
{
|
||||
pico_trace("Set HW address %d\n", assigned_address);
|
||||
usb_hw->dev_addr_ctrl = (uint8_t) request->wValue;
|
||||
}
|
||||
if ( request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
|
||||
request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
|
||||
request->bRequest == TUSB_REQ_SET_ADDRESS )
|
||||
{
|
||||
pico_trace("Set HW address %d\n", request->wValue);
|
||||
usb_hw->dev_addr_ctrl = (uint8_t) request->wValue;
|
||||
}
|
||||
|
||||
reset_ep0();
|
||||
reset_ep0();
|
||||
}
|
||||
|
||||
bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
|
||||
{
|
||||
pico_info("dcd_edpt_open %d %02x\n", rhport, desc_edpt->bEndpointAddress);
|
||||
pico_info("dcd_edpt_open %02x\n", desc_edpt->bEndpointAddress);
|
||||
assert(rhport == 0);
|
||||
hw_endpoint_init(desc_edpt->bEndpointAddress, desc_edpt->wMaxPacketSize.size, desc_edpt->bmAttributes.xfer);
|
||||
return true;
|
||||
@ -495,21 +470,20 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
|
||||
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
assert(rhport == 0);
|
||||
// True means start new xfer
|
||||
hw_endpoint_xfer(ep_addr, buffer, total_bytes, true);
|
||||
hw_endpoint_xfer(ep_addr, buffer, total_bytes);
|
||||
return true;
|
||||
}
|
||||
|
||||
void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
pico_trace("dcd_edpt_stall %d %02x\n", rhport, ep_addr);
|
||||
pico_trace("dcd_edpt_stall %02x\n", ep_addr);
|
||||
assert(rhport == 0);
|
||||
hw_endpoint_stall(ep_addr);
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
pico_trace("dcd_edpt_clear_stall %d %02x\n", rhport, ep_addr);
|
||||
pico_trace("dcd_edpt_clear_stall %02x\n", ep_addr);
|
||||
assert(rhport == 0);
|
||||
hw_endpoint_clear_stall(ep_addr);
|
||||
}
|
||||
@ -517,9 +491,11 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
|
||||
void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
// usbd.c says: In progress transfers on this EP may be delivered after this call
|
||||
pico_trace("dcd_edpt_close %d %02x\n", rhport, ep_addr);
|
||||
(void) rhport;
|
||||
(void) ep_addr;
|
||||
|
||||
// usbd.c says: In progress transfers on this EP may be delivered after this call
|
||||
pico_trace("dcd_edpt_close %02x\n", ep_addr);
|
||||
}
|
||||
|
||||
void dcd_int_handler(uint8_t rhport)
|
||||
|
@ -2,6 +2,7 @@
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
|
||||
* Copyright (c) 2021 Ha Thach (tinyusb.org) for Double Buffered
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -52,46 +53,30 @@
|
||||
static_assert(PICO_USB_HOST_INTERRUPT_ENDPOINTS <= USB_MAX_ENDPOINTS, "");
|
||||
|
||||
// Host mode uses one shared endpoint register for non-interrupt endpoint
|
||||
struct hw_endpoint eps[1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS];
|
||||
#define epx (eps[0])
|
||||
static struct hw_endpoint ep_pool[1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS];
|
||||
#define epx (ep_pool[0])
|
||||
|
||||
#define usb_hw_set hw_set_alias(usb_hw)
|
||||
#define usb_hw_set hw_set_alias(usb_hw)
|
||||
#define usb_hw_clear hw_clear_alias(usb_hw)
|
||||
|
||||
// Used for hcd pipe busy.
|
||||
// todo still a bit wasteful
|
||||
// top bit set if valid
|
||||
uint8_t dev_ep_map[CFG_TUSB_HOST_DEVICE_MAX][1 + PICO_USB_HOST_INTERRUPT_ENDPOINTS][2];
|
||||
|
||||
// Flags we set by default in sie_ctrl (we add other bits on top)
|
||||
static uint32_t sie_ctrl_base = USB_SIE_CTRL_SOF_EN_BITS |
|
||||
USB_SIE_CTRL_KEEP_ALIVE_EN_BITS |
|
||||
USB_SIE_CTRL_PULLDOWN_EN_BITS |
|
||||
USB_SIE_CTRL_EP0_INT_1BUF_BITS;
|
||||
enum {
|
||||
SIE_CTRL_BASE = USB_SIE_CTRL_SOF_EN_BITS | USB_SIE_CTRL_KEEP_ALIVE_EN_BITS |
|
||||
USB_SIE_CTRL_PULLDOWN_EN_BITS | USB_SIE_CTRL_EP0_INT_1BUF_BITS
|
||||
};
|
||||
|
||||
static struct hw_endpoint *get_dev_ep(uint8_t dev_addr, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
if (num == 0) {
|
||||
return &epx;
|
||||
}
|
||||
uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
|
||||
uint mapping = dev_ep_map[dev_addr-1][num][in];
|
||||
pico_trace("Get dev addr %d ep %d = %d\n", dev_addr, ep_addr, mapping);
|
||||
return mapping >= 128 ? eps + (mapping & 0x7fu) : NULL;
|
||||
}
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
if ( num == 0 ) return &epx;
|
||||
|
||||
static void set_dev_ep(uint8_t dev_addr, uint8_t ep_addr, struct hw_endpoint *ep)
|
||||
{
|
||||
uint8_t num = tu_edpt_number(ep_addr);
|
||||
uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
|
||||
uint32_t index = ep - eps;
|
||||
hard_assert(index < TU_ARRAY_SIZE(eps));
|
||||
// todo revisit why dev_addr can be 0 here
|
||||
if (dev_addr) {
|
||||
dev_ep_map[dev_addr-1][num][in] = 128u | index;
|
||||
}
|
||||
pico_trace("Set dev addr %d ep %d = %d\n", dev_addr, ep_addr, index);
|
||||
for ( uint32_t i = 1; i < TU_ARRAY_SIZE(ep_pool); i++ )
|
||||
{
|
||||
struct hw_endpoint *ep = &ep_pool[i];
|
||||
if ( ep->configured && (ep->dev_addr == dev_addr) && (ep->ep_addr == ep_addr) ) return ep;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static inline uint8_t dev_speed(void)
|
||||
@ -111,15 +96,15 @@ static void hw_xfer_complete(struct hw_endpoint *ep, xfer_result_t xfer_result)
|
||||
// Mark transfer as done before we tell the tinyusb stack
|
||||
uint8_t dev_addr = ep->dev_addr;
|
||||
uint8_t ep_addr = ep->ep_addr;
|
||||
uint total_len = ep->total_len;
|
||||
uint xferred_len = ep->xferred_len;
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
hcd_event_xfer_complete(dev_addr, ep_addr, total_len, xfer_result, true);
|
||||
hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true);
|
||||
}
|
||||
|
||||
static void _handle_buff_status_bit(uint bit, struct hw_endpoint *ep)
|
||||
{
|
||||
usb_hw_clear->buf_status = bit;
|
||||
bool done = _hw_endpoint_xfer_continue(ep);
|
||||
bool done = hw_endpoint_xfer_continue(ep);
|
||||
if (done)
|
||||
{
|
||||
hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
|
||||
@ -137,6 +122,17 @@ static void hw_handle_buff_status(void)
|
||||
{
|
||||
remaining_buffers &= ~bit;
|
||||
struct hw_endpoint *ep = &epx;
|
||||
|
||||
uint32_t ep_ctrl = *ep->endpoint_control;
|
||||
if (ep_ctrl & EP_CTRL_DOUBLE_BUFFERED_BITS)
|
||||
{
|
||||
TU_LOG(3, "Double Buffered: ");
|
||||
}else
|
||||
{
|
||||
TU_LOG(3, "Single Buffered: ");
|
||||
}
|
||||
TU_LOG_HEX(3, ep_ctrl);
|
||||
|
||||
_handle_buff_status_bit(bit, ep);
|
||||
}
|
||||
|
||||
@ -153,7 +149,7 @@ static void hw_handle_buff_status(void)
|
||||
if (remaining_buffers & bit)
|
||||
{
|
||||
remaining_buffers &= ~bit;
|
||||
_handle_buff_status_bit(bit, &eps[i]);
|
||||
_handle_buff_status_bit(bit, &ep_pool[i]);
|
||||
}
|
||||
}
|
||||
|
||||
@ -165,19 +161,19 @@ static void hw_handle_buff_status(void)
|
||||
|
||||
static void hw_trans_complete(void)
|
||||
{
|
||||
struct hw_endpoint *ep = &epx;
|
||||
assert(ep->active);
|
||||
struct hw_endpoint *ep = &epx;
|
||||
assert(ep->active);
|
||||
|
||||
if (ep->sent_setup)
|
||||
{
|
||||
pico_trace("Sent setup packet\n");
|
||||
hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Don't care. Will handle this in buff status
|
||||
return;
|
||||
}
|
||||
if (usb_hw->sie_ctrl & USB_SIE_CTRL_SEND_SETUP_BITS)
|
||||
{
|
||||
pico_trace("Sent setup packet\n");
|
||||
hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Don't care. Will handle this in buff status
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static void hcd_rp2040_irq(void)
|
||||
@ -202,20 +198,22 @@ static void hcd_rp2040_irq(void)
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_SPEED_BITS;
|
||||
}
|
||||
|
||||
if (status & USB_INTS_BUFF_STATUS_BITS)
|
||||
{
|
||||
handled |= USB_INTS_BUFF_STATUS_BITS;
|
||||
TU_LOG(2, "Buffer complete\n");
|
||||
// print_bufctrl32(*epx.buffer_control);
|
||||
hw_handle_buff_status();
|
||||
}
|
||||
|
||||
if (status & USB_INTS_TRANS_COMPLETE_BITS)
|
||||
{
|
||||
handled |= USB_INTS_TRANS_COMPLETE_BITS;
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS;
|
||||
TU_LOG(2, "Transfer complete\n");
|
||||
hw_trans_complete();
|
||||
}
|
||||
|
||||
if (status & USB_INTS_BUFF_STATUS_BITS)
|
||||
{
|
||||
handled |= USB_INTS_BUFF_STATUS_BITS;
|
||||
// print_bufctrl32(*epx.buffer_control);
|
||||
hw_handle_buff_status();
|
||||
}
|
||||
|
||||
if (status & USB_INTS_STALL_BITS)
|
||||
{
|
||||
// We have rx'd a stall from the device
|
||||
@ -234,7 +232,7 @@ static void hcd_rp2040_irq(void)
|
||||
if (status & USB_INTS_ERROR_DATA_SEQ_BITS)
|
||||
{
|
||||
usb_hw_clear->sie_status = USB_SIE_STATUS_DATA_SEQ_ERROR_BITS;
|
||||
// print_bufctrl32(*epx.buffer_control);
|
||||
print_bufctrl32(*epx.buffer_control);
|
||||
panic("Data Seq Error \n");
|
||||
}
|
||||
|
||||
@ -247,9 +245,9 @@ static void hcd_rp2040_irq(void)
|
||||
static struct hw_endpoint *_next_free_interrupt_ep(void)
|
||||
{
|
||||
struct hw_endpoint *ep = NULL;
|
||||
for (uint i = 1; i < TU_ARRAY_SIZE(eps); i++)
|
||||
for (uint i = 1; i < TU_ARRAY_SIZE(ep_pool); i++)
|
||||
{
|
||||
ep = &eps[i];
|
||||
ep = &ep_pool[i];
|
||||
if (!ep->configured)
|
||||
{
|
||||
// Will be configured by _hw_endpoint_init / _hw_endpoint_allocate
|
||||
@ -263,6 +261,7 @@ static struct hw_endpoint *_next_free_interrupt_ep(void)
|
||||
static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
|
||||
{
|
||||
struct hw_endpoint *ep = NULL;
|
||||
|
||||
if (transfer_type == TUSB_XFER_INTERRUPT)
|
||||
{
|
||||
ep = _next_free_interrupt_ep();
|
||||
@ -270,11 +269,11 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
|
||||
assert(ep);
|
||||
ep->buffer_control = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num].ctrl;
|
||||
ep->endpoint_control = &usbh_dpram->int_ep_ctrl[ep->interrupt_num].ctrl;
|
||||
// 0x180 for epx
|
||||
// 0x1c0 for intep0
|
||||
// 0x200 for intep1
|
||||
// 0 for epx (double buffered): TODO increase to 1024 for ISO
|
||||
// 2x64 for intep0
|
||||
// 3x64 for intep1
|
||||
// etc
|
||||
ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 1)];
|
||||
ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 2)];
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -283,6 +282,7 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
|
||||
ep->endpoint_control = &usbh_dpram->epx_ctrl;
|
||||
ep->hw_data_buf = &usbh_dpram->epx_data[0];
|
||||
}
|
||||
|
||||
return ep;
|
||||
}
|
||||
|
||||
@ -303,7 +303,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
|
||||
ep->rx = (dir == TUSB_DIR_IN);
|
||||
|
||||
// Response to a setup packet on EP0 starts with pid of 1
|
||||
ep->next_pid = num == 0 ? 1u : 0u;
|
||||
ep->next_pid = (num == 0 ? 1u : 0u);
|
||||
ep->wMaxPacketSize = wMaxPacketSize;
|
||||
ep->transfer_type = transfer_type;
|
||||
|
||||
@ -332,6 +332,7 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
|
||||
// preamble
|
||||
uint32_t reg = dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB);
|
||||
// Assert the interrupt endpoint is IN_TO_HOST
|
||||
// TODO Interrupt can also be OUT
|
||||
assert(dir == TUSB_DIR_IN);
|
||||
|
||||
if (need_pre(dev_addr))
|
||||
@ -345,24 +346,9 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
|
||||
|
||||
// If it's an interrupt endpoint we need to set up the buffer control
|
||||
// register
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
static void hw_endpoint_init(uint8_t dev_addr, const tusb_desc_endpoint_t *ep_desc)
|
||||
{
|
||||
// Allocated differently based on if it's an interrupt endpoint or not
|
||||
struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer);
|
||||
_hw_endpoint_init(ep,
|
||||
dev_addr,
|
||||
ep_desc->bEndpointAddress,
|
||||
ep_desc->wMaxPacketSize.size,
|
||||
ep_desc->bmAttributes.xfer,
|
||||
ep_desc->bInterval);
|
||||
// Map this struct to ep@device address
|
||||
set_dev_ep(dev_addr, ep_desc->bEndpointAddress, ep);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// HCD API
|
||||
//--------------------------------------------------------------------+
|
||||
@ -377,11 +363,11 @@ bool hcd_init(uint8_t rhport)
|
||||
irq_set_exclusive_handler(USBCTRL_IRQ, hcd_rp2040_irq);
|
||||
|
||||
// clear epx and interrupt eps
|
||||
memset(&eps, 0, sizeof(eps));
|
||||
memset(&ep_pool, 0, sizeof(ep_pool));
|
||||
|
||||
// Enable in host mode with SOF / Keep alive on
|
||||
usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS | USB_MAIN_CTRL_HOST_NDEVICE_BITS;
|
||||
usb_hw->sie_ctrl = sie_ctrl_base;
|
||||
usb_hw->sie_ctrl = SIE_CTRL_BASE;
|
||||
usb_hw->inte = USB_INTE_BUFF_STATUS_BITS |
|
||||
USB_INTE_HOST_CONN_DIS_BITS |
|
||||
USB_INTE_HOST_RESUME_BITS |
|
||||
@ -409,7 +395,6 @@ bool hcd_port_connect_status(uint8_t rhport)
|
||||
|
||||
tusb_speed_t hcd_port_speed_get(uint8_t rhport)
|
||||
{
|
||||
pico_trace("hcd_port_speed_get\n");
|
||||
assert(rhport == 0);
|
||||
// TODO: Should enumval this register
|
||||
switch (dev_speed())
|
||||
@ -420,15 +405,25 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
|
||||
return TUSB_SPEED_FULL;
|
||||
default:
|
||||
panic("Invalid speed\n");
|
||||
return TUSB_SPEED_INVALID;
|
||||
}
|
||||
}
|
||||
|
||||
// Close all opened endpoint belong to this device
|
||||
void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
(void) dev_addr;
|
||||
|
||||
pico_trace("hcd_device_close %d\n", dev_addr);
|
||||
}
|
||||
|
||||
uint32_t hcd_frame_number(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
return usb_hw->sof_rd;
|
||||
}
|
||||
|
||||
void hcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
assert(rhport == 0);
|
||||
@ -442,36 +437,70 @@ void hcd_int_disable(uint8_t rhport)
|
||||
irq_set_enabled(USBCTRL_IRQ, false);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Endpoint API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
pico_trace("hcd_edpt_open dev_addr %d, ep_addr %d\n", dev_addr, ep_desc->bEndpointAddress);
|
||||
|
||||
// Allocated differently based on if it's an interrupt endpoint or not
|
||||
struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer);
|
||||
|
||||
_hw_endpoint_init(ep,
|
||||
dev_addr,
|
||||
ep_desc->bEndpointAddress,
|
||||
ep_desc->wMaxPacketSize.size,
|
||||
ep_desc->bmAttributes.xfer,
|
||||
ep_desc->bInterval);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
|
||||
{
|
||||
pico_info("hcd_edpt_xfer dev_addr %d, ep_addr 0x%x, len %d\n", dev_addr, ep_addr, buflen);
|
||||
(void) rhport;
|
||||
|
||||
pico_trace("hcd_edpt_xfer dev_addr %d, ep_addr 0x%x, len %d\n", dev_addr, ep_addr, buflen);
|
||||
|
||||
uint8_t const ep_num = tu_edpt_number(ep_addr);
|
||||
tusb_dir_t const ep_dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
// Get appropriate ep. Either EPX or interrupt endpoint
|
||||
struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr);
|
||||
assert(ep);
|
||||
|
||||
if (ep_addr != ep->ep_addr)
|
||||
// Control endpoint can change direction 0x00 <-> 0x80
|
||||
if ( ep_addr != ep->ep_addr )
|
||||
{
|
||||
// Direction has flipped so re init it but with same properties
|
||||
// TODO treat IN and OUT as invidual endpoints
|
||||
_hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0);
|
||||
}
|
||||
assert(ep_num == 0);
|
||||
|
||||
// True indicates this is the start of the transfer
|
||||
_hw_endpoint_xfer(ep, buffer, buflen, true);
|
||||
// Direction has flipped on endpoint control so re init it but with same properties
|
||||
_hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0);
|
||||
}
|
||||
|
||||
// If a normal transfer (non-interrupt) then initiate using
|
||||
// sie ctrl registers. Otherwise interrupt ep registers should
|
||||
// already be configured
|
||||
if (ep == &epx) {
|
||||
hw_endpoint_xfer_start(ep, buffer, buflen);
|
||||
|
||||
// That has set up buffer control, endpoint control etc
|
||||
// for host we have to initiate the transfer
|
||||
usb_hw->dev_addr_ctrl = dev_addr | (tu_edpt_number(ep_addr) << USB_ADDR_ENDP_ENDPOINT_LSB);
|
||||
uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | sie_ctrl_base;
|
||||
flags |= ep->rx ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS;
|
||||
usb_hw->dev_addr_ctrl = dev_addr | (ep_num << USB_ADDR_ENDP_ENDPOINT_LSB);
|
||||
|
||||
uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | SIE_CTRL_BASE |
|
||||
(ep_dir ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS);
|
||||
// Set pre if we are a low speed device on full speed hub
|
||||
flags |= need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0;
|
||||
|
||||
usb_hw->sie_ctrl = flags;
|
||||
}else
|
||||
{
|
||||
hw_endpoint_xfer_start(ep, buffer, buflen);
|
||||
}
|
||||
|
||||
return true;
|
||||
@ -479,41 +508,33 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
|
||||
|
||||
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
|
||||
{
|
||||
pico_info("hcd_setup_send dev_addr %d\n", dev_addr);
|
||||
|
||||
(void) rhport;
|
||||
|
||||
// Copy data into setup packet buffer
|
||||
memcpy((void*)&usbh_dpram->setup_packet[0], setup_packet, 8);
|
||||
|
||||
// Configure EP0 struct with setup info for the trans complete
|
||||
struct hw_endpoint *ep = _hw_endpoint_allocate(0);
|
||||
|
||||
// EP0 out
|
||||
_hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0);
|
||||
assert(ep->configured);
|
||||
ep->total_len = 8;
|
||||
ep->transfer_size = 8;
|
||||
ep->active = true;
|
||||
ep->sent_setup = true;
|
||||
|
||||
ep->remaining_len = 8;
|
||||
ep->active = true;
|
||||
|
||||
// Set device address
|
||||
usb_hw->dev_addr_ctrl = dev_addr;
|
||||
|
||||
// Set pre if we are a low speed device on full speed hub
|
||||
uint32_t flags = sie_ctrl_base | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS;
|
||||
flags |= need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0;
|
||||
uint32_t const flags = SIE_CTRL_BASE | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS |
|
||||
(need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0);
|
||||
|
||||
usb_hw->sie_ctrl = flags;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t hcd_frame_number(uint8_t rhport)
|
||||
{
|
||||
return usb_hw->sof_rd;
|
||||
}
|
||||
|
||||
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
|
||||
{
|
||||
pico_trace("hcd_edpt_open dev_addr %d, ep_addr %d\n", dev_addr, ep_desc->bEndpointAddress);
|
||||
hw_endpoint_init(dev_addr, ep_desc);
|
||||
return true;
|
||||
}
|
||||
|
||||
//bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr)
|
||||
//{
|
||||
@ -531,6 +552,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
|
||||
|
||||
bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
|
||||
{
|
||||
(void) dev_addr;
|
||||
(void) ep_addr;
|
||||
|
||||
panic("hcd_clear_stall");
|
||||
return true;
|
||||
}
|
||||
|
@ -2,6 +2,7 @@
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
|
||||
* Copyright (c) 2021 Ha Thach (tinyusb.org) for Double Buffered
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
@ -43,42 +44,38 @@ static inline void _hw_endpoint_lock_update(struct hw_endpoint *ep, int delta) {
|
||||
// sense to have worker and IRQ on same core, however I think using critsec is about equivalent.
|
||||
}
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
static inline void _hw_endpoint_update_last_buf(struct hw_endpoint *ep)
|
||||
{
|
||||
ep->last_buf = (ep->len + ep->transfer_size == ep->total_len);
|
||||
}
|
||||
#endif
|
||||
static void _hw_endpoint_xfer_sync(struct hw_endpoint *ep);
|
||||
static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep);
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
//
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void rp2040_usb_init(void)
|
||||
{
|
||||
// Reset usb controller
|
||||
reset_block(RESETS_RESET_USBCTRL_BITS);
|
||||
unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
|
||||
// Reset usb controller
|
||||
reset_block(RESETS_RESET_USBCTRL_BITS);
|
||||
unreset_block_wait(RESETS_RESET_USBCTRL_BITS);
|
||||
|
||||
// Clear any previous state just in case
|
||||
memset(usb_hw, 0, sizeof(*usb_hw));
|
||||
memset(usb_dpram, 0, sizeof(*usb_dpram));
|
||||
// Clear any previous state just in case
|
||||
memset(usb_hw, 0, sizeof(*usb_hw));
|
||||
memset(usb_dpram, 0, sizeof(*usb_dpram));
|
||||
|
||||
// Mux the controller to the onboard usb phy
|
||||
usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
|
||||
// Mux the controller to the onboard usb phy
|
||||
usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
|
||||
|
||||
// Force VBUS detect so the device thinks it is plugged into a host
|
||||
// TODO support VBUs detect
|
||||
usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
|
||||
// Force VBUS detect so the device thinks it is plugged into a host
|
||||
// TODO support VBUs detect
|
||||
usb_hw->pwr = USB_USB_PWR_VBUS_DETECT_BITS | USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS;
|
||||
}
|
||||
|
||||
void hw_endpoint_reset_transfer(struct hw_endpoint *ep)
|
||||
{
|
||||
ep->stalled = false;
|
||||
ep->active = false;
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
ep->sent_setup = false;
|
||||
#endif
|
||||
ep->total_len = 0;
|
||||
ep->len = 0;
|
||||
ep->transfer_size = 0;
|
||||
ep->user_buf = 0;
|
||||
ep->stalled = false;
|
||||
ep->active = false;
|
||||
ep->remaining_len = 0;
|
||||
ep->xferred_len = 0;
|
||||
ep->user_buf = 0;
|
||||
}
|
||||
|
||||
void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) {
|
||||
@ -111,215 +108,223 @@ void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_m
|
||||
*ep->buffer_control = value;
|
||||
}
|
||||
|
||||
void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
|
||||
// prepare buffer, return buffer control
|
||||
static uint32_t prepare_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id)
|
||||
{
|
||||
// Prepare buffer control register value
|
||||
uint32_t val = ep->transfer_size | USB_BUF_CTRL_AVAIL;
|
||||
uint16_t const buflen = tu_min16(ep->remaining_len, ep->wMaxPacketSize);
|
||||
ep->remaining_len -= buflen;
|
||||
|
||||
if (!ep->rx)
|
||||
uint32_t buf_ctrl = buflen | USB_BUF_CTRL_AVAIL;
|
||||
|
||||
// PID
|
||||
buf_ctrl |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
|
||||
ep->next_pid ^= 1u;
|
||||
|
||||
if ( !ep->rx )
|
||||
{
|
||||
// Copy data from user buffer to hw buffer
|
||||
memcpy(ep->hw_data_buf + buf_id*64, ep->user_buf, buflen);
|
||||
ep->user_buf += buflen;
|
||||
|
||||
// Mark as full
|
||||
buf_ctrl |= USB_BUF_CTRL_FULL;
|
||||
}
|
||||
|
||||
// Is this the last buffer? Only really matters for host mode. Will trigger
|
||||
// the trans complete irq but also stop it polling. We only really care about
|
||||
// trans complete for setup packets being sent
|
||||
if (ep->remaining_len == 0)
|
||||
{
|
||||
buf_ctrl |= USB_BUF_CTRL_LAST;
|
||||
}
|
||||
|
||||
if (buf_id) buf_ctrl = buf_ctrl << 16;
|
||||
|
||||
return buf_ctrl;
|
||||
}
|
||||
|
||||
// Prepare buffer control register value
|
||||
static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep)
|
||||
{
|
||||
uint32_t ep_ctrl = *ep->endpoint_control;
|
||||
|
||||
// always compute and start with buffer 0
|
||||
uint32_t buf_ctrl = prepare_ep_buffer(ep, 0) | USB_BUF_CTRL_SEL;
|
||||
|
||||
// For now: skip double buffered for Device mode, OUT endpoint since
|
||||
// host could send < 64 bytes and cause short packet on buffer0
|
||||
// NOTE this could happen to Host mode IN endpoint
|
||||
bool const force_single = !(usb_hw->main_ctrl & USB_MAIN_CTRL_HOST_NDEVICE_BITS) && !tu_edpt_dir(ep->ep_addr);
|
||||
|
||||
if(ep->remaining_len && !force_single)
|
||||
{
|
||||
// Use buffer 1 (double buffered) if there is still data
|
||||
// TODO: Isochronous for buffer1 bit-field is different than CBI (control bulk, interrupt)
|
||||
|
||||
buf_ctrl |= prepare_ep_buffer(ep, 1);
|
||||
|
||||
// Set endpoint control double buffered bit if needed
|
||||
ep_ctrl &= ~EP_CTRL_INTERRUPT_PER_BUFFER;
|
||||
ep_ctrl |= EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER;
|
||||
}else
|
||||
{
|
||||
// Single buffered since 1 is enough
|
||||
ep_ctrl &= ~(EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER);
|
||||
ep_ctrl |= EP_CTRL_INTERRUPT_PER_BUFFER;
|
||||
}
|
||||
|
||||
*ep->endpoint_control = ep_ctrl;
|
||||
|
||||
TU_LOG(3, "Prepare Buffer Control:\r\n");
|
||||
print_bufctrl32(buf_ctrl);
|
||||
|
||||
// Finally, write to buffer_control which will trigger the transfer
|
||||
// the next time the controller polls this dpram address
|
||||
_hw_endpoint_buffer_control_set_value32(ep, buf_ctrl);
|
||||
}
|
||||
|
||||
void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len)
|
||||
{
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
|
||||
if ( ep->active )
|
||||
{
|
||||
// TODO: Is this acceptable for interrupt packets?
|
||||
TU_LOG(1, "WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr),
|
||||
ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
}
|
||||
|
||||
// Fill in info now that we're kicking off the hw
|
||||
ep->remaining_len = total_len;
|
||||
ep->xferred_len = 0;
|
||||
ep->active = true;
|
||||
ep->user_buf = buffer;
|
||||
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
}
|
||||
|
||||
// sync endpoint buffer and return transferred bytes
|
||||
static uint16_t sync_ep_buffer(struct hw_endpoint *ep, uint8_t buf_id)
|
||||
{
|
||||
uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
if (buf_id) buf_ctrl = buf_ctrl >> 16;
|
||||
|
||||
uint16_t xferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
|
||||
if ( !ep->rx )
|
||||
{
|
||||
// We are continuing a transfer here. If we are TX, we have successfully
|
||||
// sent some data can increase the length we have sent
|
||||
assert(!(buf_ctrl & USB_BUF_CTRL_FULL));
|
||||
|
||||
ep->xferred_len += xferred_bytes;
|
||||
}else
|
||||
{
|
||||
// If we have received some data, so can increase the length
|
||||
// we have received AFTER we have copied it to the user buffer at the appropriate offset
|
||||
assert(buf_ctrl & USB_BUF_CTRL_FULL);
|
||||
|
||||
memcpy(ep->user_buf, ep->hw_data_buf + buf_id*64, xferred_bytes);
|
||||
ep->xferred_len += xferred_bytes;
|
||||
ep->user_buf += xferred_bytes;
|
||||
}
|
||||
|
||||
// Short packet
|
||||
if (xferred_bytes < ep->wMaxPacketSize)
|
||||
{
|
||||
pico_trace("Short rx transfer on buffer %d with %u bytes\n", buf_id, xferred_bytes);
|
||||
// Reduce total length as this is last packet
|
||||
ep->remaining_len = 0;
|
||||
}
|
||||
|
||||
return xferred_bytes;
|
||||
}
|
||||
|
||||
static void _hw_endpoint_xfer_sync (struct hw_endpoint *ep)
|
||||
{
|
||||
// Update hw endpoint struct with info from hardware
|
||||
// after a buff status interrupt
|
||||
|
||||
uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
TU_LOG(3, "_hw_endpoint_xfer_sync:\r\n");
|
||||
print_bufctrl32(buf_ctrl);
|
||||
|
||||
// always sync buffer 0
|
||||
uint16_t buf0_bytes = sync_ep_buffer(ep, 0);
|
||||
|
||||
// sync buffer 1 if double buffered
|
||||
if ( (*ep->endpoint_control) & EP_CTRL_DOUBLE_BUFFERED_BITS )
|
||||
{
|
||||
if (buf0_bytes == ep->wMaxPacketSize)
|
||||
{
|
||||
// Copy data from user buffer to hw buffer
|
||||
memcpy(ep->hw_data_buf, &ep->user_buf[ep->len], ep->transfer_size);
|
||||
// Mark as full
|
||||
val |= USB_BUF_CTRL_FULL;
|
||||
}
|
||||
|
||||
// PID
|
||||
val |= ep->next_pid ? USB_BUF_CTRL_DATA1_PID : USB_BUF_CTRL_DATA0_PID;
|
||||
|
||||
#if TUSB_OPT_DEVICE_ENABLED
|
||||
ep->next_pid ^= 1u;
|
||||
|
||||
#else
|
||||
// For Host (also device but since we dictate the endpoint size, following scenario does not occur)
|
||||
// Next PID depends on the number of packet in case wMaxPacketSize < 64 (e.g Interrupt Endpoint 8, or 12)
|
||||
// Special case with control status stage where PID is always DATA1
|
||||
if ( ep->transfer_size == 0 )
|
||||
{
|
||||
// ZLP also toggle data
|
||||
ep->next_pid ^= 1u;
|
||||
// sync buffer 1 if not short packet
|
||||
sync_ep_buffer(ep, 1);
|
||||
}else
|
||||
{
|
||||
uint32_t packet_count = 1 + ((ep->transfer_size - 1) / ep->wMaxPacketSize);
|
||||
// short packet on buffer 0
|
||||
// TODO couldn't figure out how to handle this case which happen with net_lwip_webserver example
|
||||
// At this time (currently trigger per 2 buffer), the buffer1 is probably filled with data from
|
||||
// the next transfer (not current one). For now we disable double buffered for device OUT
|
||||
// NOTE this could happen to Host IN
|
||||
#if 0
|
||||
uint8_t const ep_num = tu_edpt_number(ep->ep_addr);
|
||||
uint8_t const dir = (uint8_t) tu_edpt_dir(ep->ep_addr);
|
||||
uint8_t const ep_id = 2*ep_num + (dir ? 0 : 1);
|
||||
|
||||
if ( packet_count & 0x01 )
|
||||
{
|
||||
ep->next_pid ^= 1u;
|
||||
}
|
||||
}
|
||||
// abort queued transfer on buffer 1
|
||||
usb_hw->abort |= TU_BIT(ep_id);
|
||||
|
||||
while ( !(usb_hw->abort_done & TU_BIT(ep_id)) ) {}
|
||||
|
||||
uint32_t ep_ctrl = *ep->endpoint_control;
|
||||
ep_ctrl &= ~(EP_CTRL_DOUBLE_BUFFERED_BITS | EP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER);
|
||||
ep_ctrl |= EP_CTRL_INTERRUPT_PER_BUFFER;
|
||||
|
||||
_hw_endpoint_buffer_control_set_value32(ep, 0);
|
||||
|
||||
usb_hw->abort &= ~TU_BIT(ep_id);
|
||||
|
||||
TU_LOG(3, "----SHORT PACKET buffer0 on EP %02X:\r\n", ep->ep_addr);
|
||||
print_bufctrl32(buf_ctrl);
|
||||
#endif
|
||||
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Is this the last buffer? Only really matters for host mode. Will trigger
|
||||
// the trans complete irq but also stop it polling. We only really care about
|
||||
// trans complete for setup packets being sent
|
||||
if (ep->last_buf)
|
||||
{
|
||||
pico_trace("Last buf (%d bytes left)\n", ep->transfer_size);
|
||||
val |= USB_BUF_CTRL_LAST;
|
||||
}
|
||||
#endif
|
||||
|
||||
// Finally, write to buffer_control which will trigger the transfer
|
||||
// the next time the controller polls this dpram address
|
||||
_hw_endpoint_buffer_control_set_value32(ep, val);
|
||||
pico_trace("buffer control (0x%p) <- 0x%x\n", ep->buffer_control, val);
|
||||
//print_bufctrl16(val);
|
||||
}
|
||||
|
||||
|
||||
void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len)
|
||||
{
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
pico_trace("Start transfer of total len %d on ep %d %s\n", total_len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
if (ep->active)
|
||||
{
|
||||
// TODO: Is this acceptable for interrupt packets?
|
||||
pico_warn("WARN: starting new transfer on already active ep %d %s\n", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
|
||||
hw_endpoint_reset_transfer(ep);
|
||||
}
|
||||
|
||||
// Fill in info now that we're kicking off the hw
|
||||
ep->total_len = total_len;
|
||||
ep->len = 0;
|
||||
|
||||
// Limit by packet size but not less 64 (i.e low speed 8 bytes EP0)
|
||||
ep->transfer_size = tu_min16(total_len, tu_max16(64, ep->wMaxPacketSize));
|
||||
|
||||
ep->active = true;
|
||||
ep->user_buf = buffer;
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Recalculate if this is the last buffer
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
ep->buf_sel = 0;
|
||||
#endif
|
||||
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
}
|
||||
|
||||
void _hw_endpoint_xfer_sync(struct hw_endpoint *ep)
|
||||
{
|
||||
// Update hw endpoint struct with info from hardware
|
||||
// after a buff status interrupt
|
||||
|
||||
uint32_t buf_ctrl = _hw_endpoint_buffer_control_get_value32(ep);
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// RP2040-E4
|
||||
// tag::host_buf_sel_fix[]
|
||||
// TODO need changes to support double buffering
|
||||
if (ep->buf_sel == 1)
|
||||
{
|
||||
// Host can erroneously write status to top half of buf_ctrl register
|
||||
buf_ctrl = buf_ctrl >> 16;
|
||||
|
||||
// update buf1 -> buf0 to prevent panic with "already available"
|
||||
*ep->buffer_control = buf_ctrl;
|
||||
}
|
||||
// Flip buf sel for host
|
||||
ep->buf_sel ^= 1u;
|
||||
// end::host_buf_sel_fix[]
|
||||
#endif
|
||||
|
||||
// Get tranferred bytes after adjusted buf sel
|
||||
uint16_t const transferred_bytes = buf_ctrl & USB_BUF_CTRL_LEN_MASK;
|
||||
|
||||
// We are continuing a transfer here. If we are TX, we have successfullly
|
||||
// sent some data can increase the length we have sent
|
||||
if (!ep->rx)
|
||||
{
|
||||
assert(!(buf_ctrl & USB_BUF_CTRL_FULL));
|
||||
pico_trace("tx %d bytes (buf_ctrl 0x%08x)\n", transferred_bytes, buf_ctrl);
|
||||
ep->len += transferred_bytes;
|
||||
}
|
||||
else
|
||||
{
|
||||
// If we are OUT we have recieved some data, so can increase the length
|
||||
// we have recieved AFTER we have copied it to the user buffer at the appropriate
|
||||
// offset
|
||||
pico_trace("rx %d bytes (buf_ctrl 0x%08x)\n", transferred_bytes, buf_ctrl);
|
||||
assert(buf_ctrl & USB_BUF_CTRL_FULL);
|
||||
memcpy(&ep->user_buf[ep->len], ep->hw_data_buf, transferred_bytes);
|
||||
ep->len += transferred_bytes;
|
||||
}
|
||||
|
||||
// Sometimes the host will send less data than we expect...
|
||||
// If this is a short out transfer update the total length of the transfer
|
||||
// to be the current length
|
||||
if ((ep->rx) && (transferred_bytes < ep->wMaxPacketSize))
|
||||
{
|
||||
pico_trace("Short rx transfer\n");
|
||||
// Reduce total length as this is last packet
|
||||
ep->total_len = ep->len;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Returns true if transfer is complete
|
||||
bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
bool hw_endpoint_xfer_continue(struct hw_endpoint *ep)
|
||||
{
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
// Part way through a transfer
|
||||
if (!ep->active)
|
||||
{
|
||||
panic("Can't continue xfer on inactive ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string);
|
||||
}
|
||||
_hw_endpoint_lock_update(ep, 1);
|
||||
// Part way through a transfer
|
||||
if (!ep->active)
|
||||
{
|
||||
panic("Can't continue xfer on inactive ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string);
|
||||
}
|
||||
|
||||
// Update EP struct from hardware state
|
||||
_hw_endpoint_xfer_sync(ep);
|
||||
|
||||
// Now we have synced our state with the hardware. Is there more data to transfer?
|
||||
// Limit by packet size but not less 64 (i.e low speed 8 bytes EP0)
|
||||
uint16_t remaining_bytes = ep->total_len - ep->len;
|
||||
ep->transfer_size = tu_min16(remaining_bytes, tu_max16(64, ep->wMaxPacketSize));
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
_hw_endpoint_update_last_buf(ep);
|
||||
#endif
|
||||
|
||||
// Can happen because of programmer error so check for it
|
||||
if (ep->len > ep->total_len)
|
||||
{
|
||||
panic("Transferred more data than expected");
|
||||
}
|
||||
|
||||
// If we are done then notify tinyusb
|
||||
if (ep->len == ep->total_len)
|
||||
{
|
||||
pico_trace("Completed transfer of %d bytes on ep %d %s\n",
|
||||
ep->len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
// Notify caller we are done so it can notify the tinyusb stack
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
}
|
||||
// Update EP struct from hardware state
|
||||
_hw_endpoint_xfer_sync(ep);
|
||||
|
||||
// Now we have synced our state with the hardware. Is there more data to transfer?
|
||||
// If we are done then notify tinyusb
|
||||
if (ep->remaining_len == 0)
|
||||
{
|
||||
pico_trace("Completed transfer of %d bytes on ep %d %s\n",
|
||||
ep->xferred_len, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
// Notify caller we are done so it can notify the tinyusb stack
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
// More work to do
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
_hw_endpoint_start_next_buffer(ep);
|
||||
}
|
||||
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start)
|
||||
{
|
||||
// Trace
|
||||
pico_trace("hw_endpoint_xfer ep %d %s", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
|
||||
pico_trace(" total_len %d, start=%d\n", total_len, start);
|
||||
|
||||
assert(ep->configured);
|
||||
|
||||
|
||||
if (start)
|
||||
{
|
||||
_hw_endpoint_xfer_start(ep, buffer, total_len);
|
||||
}
|
||||
else
|
||||
{
|
||||
_hw_endpoint_xfer_continue(ep);
|
||||
}
|
||||
_hw_endpoint_lock_update(ep, -1);
|
||||
// More work to do
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -17,23 +17,8 @@
|
||||
#endif
|
||||
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#define pico_trace(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_trace(format,...) ((void)0)
|
||||
#endif
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#define pico_info(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_info(format,...) ((void)0)
|
||||
#endif
|
||||
|
||||
#if false && !defined(NDEBUG)
|
||||
#define pico_warn(format,args...) printf(format, ## args)
|
||||
#else
|
||||
#define pico_warn(format,...) ((void)0)
|
||||
#endif
|
||||
#define pico_info(...) TU_LOG(2, __VA_ARGS__)
|
||||
#define pico_trace(...) TU_LOG(3, __VA_ARGS__)
|
||||
|
||||
// Hardware information per endpoint
|
||||
struct hw_endpoint
|
||||
@ -50,6 +35,7 @@ struct hw_endpoint
|
||||
|
||||
// Endpoint control register
|
||||
io_rw_32 *endpoint_control;
|
||||
|
||||
// Buffer control register
|
||||
io_rw_32 *buffer_control;
|
||||
|
||||
@ -61,27 +47,22 @@ struct hw_endpoint
|
||||
|
||||
// Current transfer information
|
||||
bool active;
|
||||
uint16_t total_len;
|
||||
uint16_t len;
|
||||
// Amount of data with the hardware
|
||||
uint16_t transfer_size;
|
||||
uint16_t remaining_len;
|
||||
uint16_t xferred_len;
|
||||
|
||||
// User buffer in main memory
|
||||
uint8_t *user_buf;
|
||||
|
||||
// Data needed from EP descriptor
|
||||
uint16_t wMaxPacketSize;
|
||||
|
||||
// Interrupt, bulk, etc
|
||||
uint8_t transfer_type;
|
||||
|
||||
#if TUSB_OPT_HOST_ENABLED
|
||||
// Only needed for host mode
|
||||
bool last_buf;
|
||||
// RP2040-E4: HOST BUG. Host will incorrect write status to top half of buffer
|
||||
// control register when doing transfers > 1 packet
|
||||
uint8_t buf_sel;
|
||||
// Only needed for host
|
||||
uint8_t dev_addr;
|
||||
bool sent_setup;
|
||||
|
||||
// If interrupt endpoint
|
||||
uint8_t interrupt_num;
|
||||
#endif
|
||||
@ -89,12 +70,10 @@ struct hw_endpoint
|
||||
|
||||
void rp2040_usb_init(void);
|
||||
|
||||
void hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len);
|
||||
bool hw_endpoint_xfer_continue(struct hw_endpoint *ep);
|
||||
void hw_endpoint_reset_transfer(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_xfer(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len, bool start);
|
||||
void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep);
|
||||
void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t total_len);
|
||||
void _hw_endpoint_xfer_sync(struct hw_endpoint *ep);
|
||||
bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep);
|
||||
|
||||
void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask);
|
||||
static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) {
|
||||
return *ep->buffer_control;
|
||||
@ -134,14 +113,15 @@ typedef union TU_ATTR_PACKED
|
||||
|
||||
TU_VERIFY_STATIC(sizeof(rp2040_buffer_control_t) == 2, "size is not correct");
|
||||
|
||||
static inline void print_bufctrl16(uint32_t __unused u16)
|
||||
#if CFG_TUSB_DEBUG >= 3
|
||||
static inline void print_bufctrl16(uint32_t u16)
|
||||
{
|
||||
rp2040_buffer_control_t __unused bufctrl = {
|
||||
rp2040_buffer_control_t bufctrl = {
|
||||
.u16 = u16
|
||||
};
|
||||
|
||||
TU_LOG(2, "len = %u, available = %u, stall = %u, reset = %u, toggle = %u, last = %u, full = %u\r\n",
|
||||
bufctrl.xfer_len, bufctrl.available, bufctrl.stall, bufctrl.reset_bufsel, bufctrl.data_toggle, bufctrl.last_buf, bufctrl.full);
|
||||
TU_LOG(3, "len = %u, available = %u, full = %u, last = %u, stall = %u, reset = %u, toggle = %u\r\n",
|
||||
bufctrl.xfer_len, bufctrl.available, bufctrl.full, bufctrl.last_buf, bufctrl.stall, bufctrl.reset_bufsel, bufctrl.data_toggle);
|
||||
}
|
||||
|
||||
static inline void print_bufctrl32(uint32_t u32)
|
||||
@ -149,12 +129,19 @@ static inline void print_bufctrl32(uint32_t u32)
|
||||
uint16_t u16;
|
||||
|
||||
u16 = u32 >> 16;
|
||||
TU_LOG(2, "Buffer Control 1 0x%x: ", u16);
|
||||
TU_LOG(3, " Buffer Control 1 0x%x: ", u16);
|
||||
print_bufctrl16(u16);
|
||||
|
||||
u16 = u32 & 0x0000ffff;
|
||||
TU_LOG(2, "Buffer Control 0 0x%x: ", u16);
|
||||
TU_LOG(3, " Buffer Control 0 0x%x: ", u16);
|
||||
print_bufctrl16(u16);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define print_bufctrl16(u16)
|
||||
#define print_bufctrl32(u32)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
Loading…
x
Reference in New Issue
Block a user