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rename edpt_dir/number/addr to tu_edpt_*
This commit is contained in:
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e3514b8054
commit
6d86db3977
@ -113,10 +113,10 @@ As before with `dcd_event_bus_signal` the first argument is the USB peripheral n
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Endpoints are the core of the USB data transfer process. They come in a few forms such as control, isochronous, bulk, and interrupt. We won't cover the details here except with some caveats in open below. In general, data is transferred by setting up a buffer of a given length to be transferred on a given endpoint address and then waiting for an interrupt to signal that the transfer is finished. Further details below.
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Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides `edpt_number` and `edpt_dir` to unpack this data from the address. Here is a snippet that does it.
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Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides `tu_edpt_number` and `tu_edpt_dir` to unpack this data from the address. Here is a snippet that does it.
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uint8_t epnum = edpt_number(ep_addr);
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uint8_t dir = edpt_dir(ep_addr);
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uint8_t epnum = tu_edpt_number(ep_addr);
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uint8_t dir = tu_edpt_dir(ep_addr);
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##### dcd_edpt_open
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@ -84,7 +84,7 @@
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#define CFG_TUH_CDC 1
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#define CFG_TUH_HID_KEYBOARD 0
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#define CFG_TUH_HID_MOUSE 0
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#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported)
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#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported)
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#define CFG_TUH_MSC 0
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#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports
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@ -116,7 +116,7 @@ void cdcd_init (void);
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tusb_error_t cdcd_open (uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
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bool cdcd_control_request (uint8_t rhport, tusb_control_request_t const * p_request);
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bool cdcd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request);
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tusb_error_t cdcd_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
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tusb_error_t cdcd_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
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void cdcd_reset (uint8_t rhport);
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#endif
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@ -196,7 +196,7 @@ bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc));
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if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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p_cdc->ep_in = ep_desc->bEndpointAddress;
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}else
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@ -94,7 +94,7 @@ bool cusd_control_request(uint8_t rhport, tusb_control_request_t const * p_reque
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return false;
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}
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tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes)
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tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
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{
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return TUSB_ERROR_NONE;
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}
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@ -66,7 +66,7 @@ void cusd_init(void);
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tusb_error_t cusd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
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bool cusd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request);
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bool cusd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request);
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tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes);
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tusb_error_t cusd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
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void cusd_reset(uint8_t rhport);
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#endif
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@ -510,7 +510,7 @@ bool hidd_control_request_complete(uint8_t rhport, tusb_control_request_t const
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return true;
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}
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tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes)
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tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
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{
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// nothing to do
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return TUSB_ERROR_NONE;
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@ -380,7 +380,7 @@ void hidd_init(void);
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tusb_error_t hidd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
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bool hidd_control_request(uint8_t rhport, tusb_control_request_t const * p_request);
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bool hidd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request);
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tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes);
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tusb_error_t hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
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void hidd_reset(uint8_t rhport);
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#endif
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@ -174,7 +174,7 @@ void mscd_init(void);
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tusb_error_t mscd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
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bool mscd_control_request(uint8_t rhport, tusb_control_request_t const * p_request);
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bool mscd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request);
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tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes);
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tusb_error_t mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
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void mscd_reset(uint8_t rhport);
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#endif
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@ -309,7 +309,7 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it
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TU_ASSERT(hcd_edpt_open(rhport, dev_addr, ep_desc));
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if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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p_msc->ep_in = ep_desc->bEndpointAddress;
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}else
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@ -376,18 +376,18 @@ static inline uint8_t bm_request_type(uint8_t direction, uint8_t type, uint8_t r
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//--------------------------------------------------------------------+
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// Get direction from Endpoint address
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static inline tusb_dir_t edpt_dir(uint8_t addr)
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static inline tusb_dir_t tu_edpt_dir(uint8_t addr)
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{
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return (addr & TUSB_DIR_IN_MASK) ? TUSB_DIR_IN : TUSB_DIR_OUT;
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}
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// Get Endpoint number from address
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static inline uint8_t edpt_number(uint8_t addr)
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static inline uint8_t tu_edpt_number(uint8_t addr)
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{
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return addr & (~TUSB_DIR_IN_MASK);
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}
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static inline uint8_t edpt_addr(uint8_t num, uint8_t dir)
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static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir)
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{
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return num | (dir ? TUSB_DIR_IN_MASK : 0);
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}
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@ -246,14 +246,14 @@ static void usbd_task_body(void)
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// Invoke the class callback associated with the endpoint address
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uint8_t const ep_addr = event.xfer_complete.ep_addr;
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if ( 0 == edpt_number(ep_addr) )
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if ( 0 == tu_edpt_number(ep_addr) )
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{
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// control transfer DATA stage callback
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usbd_control_xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
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}
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else
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{
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uint8_t const drv_id = _usbd_dev.ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)];
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uint8_t const drv_id = _usbd_dev.ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)];
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TU_ASSERT(drv_id < USBD_CLASS_DRIVER_COUNT,);
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usbd_class_drivers[drv_id].xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
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@ -484,7 +484,7 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc,
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{
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uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress;
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ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)] = driver_id;
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ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)] = driver_id;
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}
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len += descriptor_len(p_desc);
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@ -576,7 +576,7 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr)
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case DCD_EVENT_XFER_COMPLETE:
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// skip zero-length control status complete event, should dcd notifies us.
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if ( 0 == edpt_number(event->xfer_complete.ep_addr) && event->xfer_complete.len == 0) break;
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if ( 0 == tu_edpt_number(event->xfer_complete.ep_addr) && event->xfer_complete.len == 0) break;
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osal_queue_send(_usbd_q, event, in_isr);
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TU_ASSERT(event->xfer_complete.result == XFER_RESULT_SUCCESS,);
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@ -633,7 +633,7 @@ tusb_error_t usbd_open_edpt_pair(uint8_t rhport, tusb_desc_endpoint_t const* ep_
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TU_ASSERT( dcd_edpt_open(rhport, ep_desc), TUSB_ERROR_DCD_OPEN_PIPE_FAILED );
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if ( edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN )
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{
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(*ep_in) = ep_desc->bEndpointAddress;
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}else
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@ -48,9 +48,6 @@
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#include "../usbh_hcd.h"
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#include "ehci.h"
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// TODO remove
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#include "chip.h"
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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@ -61,13 +58,8 @@
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// Periodic frame list must be 4K alignment
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CFG_TUSB_MEM_SECTION ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
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//------------- Validation -------------//
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// TODO static assert for memory placement on some known MCU such as lpc43xx
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uint32_t hcd_ehci_register_addr(uint8_t rhport)
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{
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return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H );
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}
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// EHCI portable
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uint32_t hcd_ehci_register_addr(uint8_t rhport);
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//--------------------------------------------------------------------+
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// PROTOTYPE
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@ -279,7 +271,8 @@ static bool ehci_init(uint8_t hostid)
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return true;
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}
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static void hcd_controller_stop(uint8_t rhport)
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#if 0
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static void ehci_stop(uint8_t rhport)
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{
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(void) rhport;
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@ -290,6 +283,7 @@ static void hcd_controller_stop(uint8_t rhport)
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// USB Spec: controller has to stop within 16 uframe = 2 frames
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while( regs->status_bm.hc_halted == 0 ) {}
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}
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#endif
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//--------------------------------------------------------------------+
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// CONTROL PIPE API
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@ -298,8 +292,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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{
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(void) rhport;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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// FIXME control only for now
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if ( epnum == 0 )
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@ -505,7 +499,7 @@ static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd)
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{
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// end of request
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// call USBH callback
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hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes);
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hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), XFER_RESULT_SUCCESS, p_qhd->total_xferred_bytes);
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p_qhd->total_xferred_bytes = 0;
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}
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}
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@ -592,7 +586,7 @@ static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd)
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}
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// call USBH callback
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hcd_event_xfer_complete(p_qhd->dev_addr, edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes);
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hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), error_event, p_qhd->total_xferred_bytes);
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p_qhd->total_xferred_bytes = 0;
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}
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@ -718,7 +712,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
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for(uint32_t i=0; i<HCD_MAX_ENDPOINT; i++)
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{
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if ( (qhd_pool[i].dev_addr == dev_addr) &&
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ep_addr == edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) )
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ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) )
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{
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return &qhd_pool[i];
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}
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@ -779,7 +773,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
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p_qhd->dev_addr = dev_addr;
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p_qhd->fl_inactive_next_xact = 0;
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p_qhd->ep_number = edpt_number(ep_desc->bEndpointAddress);
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p_qhd->ep_number = tu_edpt_number(ep_desc->bEndpointAddress);
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p_qhd->ep_speed = _usbh_devices[dev_addr].speed;
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p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0;
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p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head
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@ -826,7 +820,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
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p_qhd->removing = 0;
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p_qhd->p_qtd_list_head = NULL;
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p_qhd->p_qtd_list_tail = NULL;
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p_qhd->pid = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
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p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
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//------------- active, but no TD list -------------//
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p_qhd->qtd_overlay.halted = 0;
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@ -315,8 +315,8 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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{
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(void) rhport;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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// FIXME control only for now
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if ( epnum == 0 )
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@ -344,14 +344,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
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//--------------------------------------------------------------------+
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static inline ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr)
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{
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if ( edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed;
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if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed;
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ohci_ed_t* ed_pool = ohci_data.ed_pool;
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for(uint32_t i=0; i<HCD_MAX_ENDPOINT; i++)
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{
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if ( (ed_pool[i].dev_addr == dev_addr) &&
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ep_addr == edpt_addr(ed_pool[i].ep_number, ed_pool[i].pid == OHCI_PID_IN) )
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ep_addr == tu_edpt_addr(ed_pool[i].ep_number, ed_pool[i].pid == OHCI_PID_IN) )
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{
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return &ed_pool[i];
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}
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@ -603,7 +603,7 @@ static void done_queue_isr(uint8_t hostid)
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}
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hcd_event_xfer_complete(p_ed->dev_addr,
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edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN),
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tu_edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN),
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event, xferred_bytes);
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}
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@ -205,12 +205,12 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8
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// Data stage : first data toggle is always 1
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if ( request->wLength )
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{
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hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, request->bmRequestType_bit.direction), data, request->wLength);
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hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, request->bmRequestType_bit.direction), data, request->wLength);
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TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
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}
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// Status : data toggle is always 1
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hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0);
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hcd_edpt_xfer(rhport, dev_addr, tu_edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0);
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TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
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osal_mutex_unlock(dev->control.mutex_hdl);
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@ -249,7 +249,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev
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{
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usbh_device_t* dev = &_usbh_devices[ dev_addr ];
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|
||||
if (0 == edpt_number(ep_addr))
|
||||
if (0 == tu_edpt_number(ep_addr))
|
||||
{
|
||||
dev->control.pipe_status = event;
|
||||
// usbh_devices[ pipe_hdl.dev_addr ].control.xferred_bytes = xferred_bytes; not yet neccessary
|
||||
@ -257,7 +257,7 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t ev
|
||||
}
|
||||
else
|
||||
{
|
||||
uint8_t drv_id = dev->ep2drv[edpt_number(ep_addr)][edpt_dir(ep_addr)];
|
||||
uint8_t drv_id = dev->ep2drv[tu_edpt_number(ep_addr)][tu_edpt_dir(ep_addr)];
|
||||
TU_ASSERT(drv_id < USBH_CLASS_DRIVER_COUNT, );
|
||||
|
||||
if (usbh_class_drivers[drv_id].isr)
|
||||
@ -689,7 +689,7 @@ static void mark_interface_endpoint(uint8_t ep2drv[8][2], uint8_t const* p_desc,
|
||||
{
|
||||
uint8_t const ep_addr = ((tusb_desc_endpoint_t const*) p_desc)->bEndpointAddress;
|
||||
|
||||
ep2drv[ edpt_number(ep_addr) ][ edpt_dir(ep_addr) ] = driver_id;
|
||||
ep2drv[ tu_edpt_number(ep_addr) ][ tu_edpt_dir(ep_addr) ] = driver_id;
|
||||
}
|
||||
|
||||
len += descriptor_len(p_desc);
|
||||
|
@ -132,8 +132,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress);
|
||||
uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress);
|
||||
uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
|
||||
uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
|
||||
|
||||
UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
|
||||
uint32_t size_value = 0;
|
||||
@ -168,8 +168,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
@ -208,19 +208,19 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
|
||||
return false;
|
||||
}
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
return (edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0;
|
||||
return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0;
|
||||
}
|
||||
|
||||
void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
|
||||
if (edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1;
|
||||
} else {
|
||||
ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0;
|
||||
@ -236,10 +236,10 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
|
||||
if (edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1;
|
||||
} else {
|
||||
ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ0;
|
||||
@ -253,10 +253,10 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
|
||||
// USBD shouldn't check control endpoint state
|
||||
if ( 0 == ep_addr ) return false;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
|
||||
if (edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
return ep->EPINTFLAG.bit.TRCPT1 == 0 && ep->EPSTATUS.bit.BK1RDY == 1;
|
||||
}
|
||||
return ep->EPINTFLAG.bit.TRCPT0 == 0 && ep->EPSTATUS.bit.BK0RDY == 1;
|
||||
|
@ -137,8 +137,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress);
|
||||
uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress);
|
||||
uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
|
||||
uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
|
||||
|
||||
UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
|
||||
uint32_t size_value = 0;
|
||||
@ -173,8 +173,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
@ -212,19 +212,19 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
|
||||
return false;
|
||||
}
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
return (edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0;
|
||||
return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0;
|
||||
}
|
||||
|
||||
void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
|
||||
if (edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1;
|
||||
} else {
|
||||
ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0;
|
||||
@ -240,10 +240,10 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
|
||||
if (edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1;
|
||||
} else {
|
||||
ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ0;
|
||||
@ -257,10 +257,10 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
|
||||
// USBD shouldn't check control endpoint state
|
||||
if ( 0 == ep_addr ) return false;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
|
||||
|
||||
if (edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
|
||||
return ep->EPINTFLAG.bit.TRCPT1 == 0 && ep->EPSTATUS.bit.BK1RDY == 1;
|
||||
}
|
||||
return ep->EPINTFLAG.bit.TRCPT0 == 0 && ep->EPSTATUS.bit.BK0RDY == 1;
|
||||
|
@ -225,8 +225,8 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(desc_edpt->bEndpointAddress);
|
||||
uint8_t const dir = edpt_dir(desc_edpt->bEndpointAddress);
|
||||
uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
|
||||
uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
|
||||
|
||||
_dcd.xfer[epnum][dir].mps = desc_edpt->wMaxPacketSize.size;
|
||||
|
||||
@ -248,8 +248,8 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
xfer_td_t* xfer = get_td(epnum, dir);
|
||||
|
||||
@ -295,15 +295,15 @@ bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
|
||||
// control is never got halted
|
||||
if ( ep_addr == 0 ) return false;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
return (edpt_dir(ep_addr) == TUSB_DIR_IN ) ? NRF_USBD->HALTED.EPIN[epnum] : NRF_USBD->HALTED.EPOUT[epnum];
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? NRF_USBD->HALTED.EPIN[epnum] : NRF_USBD->HALTED.EPOUT[epnum];
|
||||
}
|
||||
|
||||
void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
if ( edpt_number(ep_addr) == 0 )
|
||||
if ( tu_edpt_number(ep_addr) == 0 )
|
||||
{
|
||||
NRF_USBD->TASKS_EP0STALL = 1;
|
||||
}else
|
||||
@ -318,7 +318,7 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
if ( edpt_number(ep_addr) )
|
||||
if ( tu_edpt_number(ep_addr) )
|
||||
{
|
||||
NRF_USBD->EPSTALL = (USBD_EPSTALL_STALL_UnStall << USBD_EPSTALL_STALL_Pos) | ep_addr;
|
||||
__ISB(); __DSB();
|
||||
@ -330,10 +330,10 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr)
|
||||
(void) rhport;
|
||||
|
||||
// USBD shouldn't check control endpoint state
|
||||
if ( 0 == edpt_number(ep_addr) ) return false;
|
||||
if ( 0 == tu_edpt_number(ep_addr) ) return false;
|
||||
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
xfer_td_t* xfer = get_td(epnum, dir);
|
||||
|
||||
|
@ -189,7 +189,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
if ( edpt_number(ep_addr) == 0 )
|
||||
if ( tu_edpt_number(ep_addr) == 0 )
|
||||
{
|
||||
// TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around
|
||||
_dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 1;
|
||||
@ -209,11 +209,11 @@ bool dcd_edpt_stalled(uint8_t rhport, uint8_t ep_addr)
|
||||
return _dcd.ep[ep_id][0].stall;
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t edpt_addr)
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const ep_id = ep_addr2id(edpt_addr);
|
||||
uint8_t const ep_id = ep_addr2id(ep_addr);
|
||||
|
||||
_dcd.ep[ep_id][0].stall = 0;
|
||||
_dcd.ep[ep_id][0].toggle_reset = 1;
|
||||
|
@ -285,7 +285,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
uint8_t const epnum = edpt_number(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const ep_id = ep_addr2idx(p_endpoint_desc->bEndpointAddress);
|
||||
|
||||
// Endpoint type is fixed to endpoint number
|
||||
@ -336,7 +336,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
(void) rhport;
|
||||
|
||||
if ( edpt_number(ep_addr) == 0 )
|
||||
if ( tu_edpt_number(ep_addr) == 0 )
|
||||
{
|
||||
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+0, 1, SIE_SET_ENDPOINT_STALLED_MASK | SIE_SET_ENDPOINT_CONDITION_STALLED_MASK);
|
||||
}else
|
||||
@ -394,9 +394,9 @@ static bool control_xact(uint8_t rhport, uint8_t dir, uint8_t * buffer, uint8_t
|
||||
bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
|
||||
{
|
||||
// Control transfer is not DMA support, and must be done in slave mode
|
||||
if ( edpt_number(ep_addr) == 0 )
|
||||
if ( tu_edpt_number(ep_addr) == 0 )
|
||||
{
|
||||
return control_xact(rhport, edpt_dir(ep_addr), buffer, (uint8_t) total_bytes);
|
||||
return control_xact(rhport, tu_edpt_dir(ep_addr), buffer, (uint8_t) total_bytes);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -205,8 +205,8 @@ static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
|
||||
//--------------------------------------------------------------------+
|
||||
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
if ( epnum == 0)
|
||||
{
|
||||
@ -220,16 +220,16 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
|
||||
bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
return LPC_USB[rhport]->ENDPTCTRL[epnum] & (ENDPTCTRL_MASK_STALL << (dir ? 16 : 0));
|
||||
}
|
||||
|
||||
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
|
||||
// data toggle also need to be reset
|
||||
LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_TOGGLE_RESET << ( dir ? 16 : 0 );
|
||||
@ -241,8 +241,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
// TODO not support ISO yet
|
||||
TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
|
||||
|
||||
uint8_t const epnum = edpt_number(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const dir = edpt_dir(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
|
||||
uint8_t const ep_idx = 2*epnum + dir;
|
||||
|
||||
// USB0 has 5, USB1 has 3 non-control endpoints
|
||||
@ -264,8 +264,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
|
||||
|
||||
bool dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr)
|
||||
{
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
uint8_t const ep_idx = 2*epnum + dir;
|
||||
|
||||
dcd_qtd_t * p_qtd = &dcd_data_ptr[rhport]->qtd[ep_idx];
|
||||
@ -276,8 +276,8 @@ bool dcd_edpt_busy(uint8_t rhport, uint8_t ep_addr)
|
||||
|
||||
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
uint8_t const epnum = edpt_number(ep_addr);
|
||||
uint8_t const dir = edpt_dir(ep_addr);
|
||||
uint8_t const epnum = tu_edpt_number(ep_addr);
|
||||
uint8_t const dir = tu_edpt_dir(ep_addr);
|
||||
uint8_t const ep_idx = 2*epnum + dir;
|
||||
|
||||
if ( epnum == 0 )
|
||||
|
@ -42,6 +42,8 @@
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
// LPC18xx and 43xx use EHCI driver
|
||||
|
||||
void hcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
|
||||
@ -52,4 +54,9 @@ void hcd_int_disable(uint8_t rhport)
|
||||
NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn);
|
||||
}
|
||||
|
||||
uint32_t hcd_ehci_register_addr(uint8_t rhport)
|
||||
{
|
||||
return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H );
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -55,7 +55,7 @@
|
||||
#define CFG_TUSB_HOST_DEVICE_MAX 5 // TODO be a part of HUB config
|
||||
|
||||
//------------- CLASS -------------//
|
||||
#define CFG_TUH_HUB 0
|
||||
#define CFG_TUH_HUB 1
|
||||
#define CFG_TUH_HID_KEYBOARD 1
|
||||
#define CFG_TUH_HID_MOUSE 1
|
||||
#define CFG_TUH_MSC 1
|
||||
|
Loading…
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Reference in New Issue
Block a user