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add cmake to lpc51
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hathach
parent
e812fce29c
commit
68a4d0c8db
169
hw/bsp/lpc51/FreeRTOSConfig/FreeRTOSConfig.h
Normal file
169
hw/bsp/lpc51/FreeRTOSConfig/FreeRTOSConfig.h
Normal file
@ -0,0 +1,169 @@
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/*
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* FreeRTOS Kernel V10.0.0
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
|
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
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* the Software, and to permit persons to whom the Software is furnished to do so,
|
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software. If you wish to use our Amazon
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* FreeRTOS name, please do so in a fair use way that does not cause confusion.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
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* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
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*
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* See http://www.freertos.org/a00110.html.
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*----------------------------------------------------------*/
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// skip if included from IAR assembler
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#ifndef __IASMARM__
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#include "fsl_device_registers.h"
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#endif
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/* Cortex M23/M33 port configuration. */
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#define configENABLE_MPU 0
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#if defined(__ARM_FP) && __ARM_FP >= 4
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#define configENABLE_FPU 1
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#else
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#define configENABLE_FPU 0
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#endif
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#define configENABLE_TRUSTZONE 0
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#define configMINIMAL_SECURE_STACK_SIZE (1024)
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#define configUSE_PREEMPTION 1
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
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#define configCPU_CLOCK_HZ SystemCoreClock
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#define configTICK_RATE_HZ ( 1000 )
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#define configMAX_PRIORITIES ( 5 )
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#define configMINIMAL_STACK_SIZE ( 128 )
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#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
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#define configMAX_TASK_NAME_LEN 16
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#define configUSE_16_BIT_TICKS 0
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#define configIDLE_SHOULD_YIELD 1
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#define configUSE_MUTEXES 1
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#define configUSE_RECURSIVE_MUTEXES 1
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configQUEUE_REGISTRY_SIZE 2
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#define configUSE_QUEUE_SETS 0
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#define configUSE_TIME_SLICING 0
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#define configUSE_NEWLIB_REENTRANT 0
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#define configENABLE_BACKWARD_COMPATIBILITY 1
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#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
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#define configSUPPORT_STATIC_ALLOCATION 1
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#define configSUPPORT_DYNAMIC_ALLOCATION 0
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/* Hook function related definitions. */
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configRECORD_STACK_HIGH_ADDRESS 1
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#define configUSE_TRACE_FACILITY 1 // legacy trace
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#define configUSE_STATS_FORMATTING_FUNCTIONS 0
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES 2
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/* Software timer related definitions. */
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#define configUSE_TIMERS 1
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#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
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#define configTIMER_QUEUE_LENGTH 32
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#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
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/* Optional functions - most linkers will remove unused functions anyway. */
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#define INCLUDE_vTaskPrioritySet 0
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#define INCLUDE_uxTaskPriorityGet 0
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#define INCLUDE_vTaskDelete 0
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#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
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#define INCLUDE_xResumeFromISR 0
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#define INCLUDE_vTaskDelayUntil 1
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xTaskGetSchedulerState 0
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#define INCLUDE_xTaskGetCurrentTaskHandle 1
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#define INCLUDE_uxTaskGetStackHighWaterMark 0
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#define INCLUDE_xTaskGetIdleTaskHandle 0
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#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
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#define INCLUDE_pcTaskGetTaskName 0
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#define INCLUDE_eTaskGetState 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define vPortSVCHandler SVC_Handler
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//--------------------------------------------------------------------+
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// Interrupt nesting behavior configuration.
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//--------------------------------------------------------------------+
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// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
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#define configPRIO_BITS 2
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/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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#endif /* __FREERTOS_CONFIG__H */
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13
hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake
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13
hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake
Normal file
@ -0,0 +1,13 @@
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set(MCU_VARIANT LPC51U68)
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set(JLINK_DEVICE LPC51U68)
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set(PYOCD_TARGET LPC51U68)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_LPC51U68JBD64
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)
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target_link_libraries(${TARGET} PUBLIC
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${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower.a
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)
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endfunction()
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57
hw/bsp/lpc51/boards/lpcxpresso51u68/board.h
Normal file
57
hw/bsp/lpc51/boards/lpcxpresso51u68/board.h
Normal file
@ -0,0 +1,57 @@
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#ifndef BOARD_H
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#define BOARD_H
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define LED_PORT 0
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#define LED_PIN 29
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#define LED_STATE_ON 0
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// WAKE button
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#define BUTTON_PORT 0
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#define BUTTON_PIN 24
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// IOCON pin mux
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#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
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#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
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#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */
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#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
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#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
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/****************************************************************
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name: BOARD_BootClockFROHF96M
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outputs:
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- {id: SYSTICK_clock.outFreq, value: 96 MHz}
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- {id: System_clock.outFreq, value: 96 MHz}
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settings:
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- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
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sources:
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- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
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******************************************************************/
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static inline void BootClockFROHF96M(void) {
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
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accidentally being below the voltage for current speed */
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POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
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CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
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CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = 96000000U;
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}
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#endif
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@ -1,179 +0,0 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018, hathach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
|
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "bsp/board_api.h"
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#include "fsl_device_registers.h"
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#include "fsl_gpio.h"
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#include "fsl_power.h"
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#include "fsl_iocon.h"
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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//--------------------------------------------------------------------+
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void USB0_IRQHandler(void)
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{
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tud_int_handler(0);
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}
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define LED_PORT 0
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#define LED_PIN 29
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#define LED_STATE_ON 0
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// WAKE button
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#define BUTTON_PORT 0
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#define BUTTON_PIN 24
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// IOCON pin mux
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#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
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#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
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#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */
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#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
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#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
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#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
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/****************************************************************
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name: BOARD_BootClockFROHF96M
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outputs:
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- {id: SYSTICK_clock.outFreq, value: 96 MHz}
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- {id: System_clock.outFreq, value: 96 MHz}
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settings:
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- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
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sources:
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- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
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******************************************************************/
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void BootClockFROHF96M(void)
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{
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/*!< Set up the clock sources */
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/*!< Set up FRO */
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POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
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CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
|
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accidentally being below the voltage for current speed */
|
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POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
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CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
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CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
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/*!< Set up dividers */
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 0U, true); /*!< Reset SYSTICKCLKDIV divider counter and halt it */
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CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U, false); /*!< Set SYSTICKCLKDIV divider to value 1 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = 96000000U;
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}
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void board_init(void)
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{
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// Enable IOCON clock
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CLOCK_EnableClock(kCLOCK_Iocon);
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// Enable GPIO0 clock
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CLOCK_EnableClock(kCLOCK_Gpio0);
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// Init 96 MHz clock
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BootClockFROHF96M();
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#if CFG_TUSB_OS == OPT_OS_NONE
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// 1ms tick timer
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SysTick_Config(SystemCoreClock / 1000);
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#elif CFG_TUSB_OS == OPT_OS_FREERTOS
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// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
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NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
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#endif
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GPIO_PortInit(GPIO, LED_PORT);
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GPIO_PortInit(GPIO, BUTTON_PORT);
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// LED
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gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 0};
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GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
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board_led_write(true);
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// Button
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gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
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GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
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// USB
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const uint32_t port1_pin6_config = (
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IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */
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IOCON_PIO_MODE_INACT | /* No addition pin function */
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IOCON_PIO_INV_DI | /* Input function is not inverted */
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IOCON_PIO_DIGITAL_EN | /* Enables digital function */
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IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
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IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
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);
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IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */
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POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */
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CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */
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||||
}
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||||
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
|
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void board_led_write(bool state)
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{
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GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
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}
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uint32_t board_button_read(void)
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{
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// active low
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return 1-GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN);
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}
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||||
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int board_uart_read(uint8_t* buf, int len)
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{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
141
hw/bsp/lpc51/family.c
Normal file
141
hw/bsp/lpc51/family.c
Normal file
@ -0,0 +1,141 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "fsl_power.h"
|
||||
#include "fsl_iocon.h"
|
||||
|
||||
#include "bsp/board_api.h"
|
||||
#include "board.h"
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void USB0_IRQHandler(void) {
|
||||
tud_int_handler(0);
|
||||
}
|
||||
|
||||
void board_init(void) {
|
||||
// Enable IOCON clock
|
||||
CLOCK_EnableClock(kCLOCK_Iocon);
|
||||
|
||||
// Enable GPIO0 clock
|
||||
CLOCK_EnableClock(kCLOCK_Gpio0);
|
||||
|
||||
// Init 96 MHz clock
|
||||
BootClockFROHF96M();
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
// 1ms tick timer
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||
#endif
|
||||
|
||||
GPIO_PortInit(GPIO, LED_PORT);
|
||||
GPIO_PortInit(GPIO, BUTTON_PORT);
|
||||
|
||||
// LED
|
||||
gpio_pin_config_t const led_config = {kGPIO_DigitalOutput, 0};
|
||||
GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
|
||||
board_led_write(true);
|
||||
|
||||
// Button
|
||||
gpio_pin_config_t const button_config = {kGPIO_DigitalInput, 0};
|
||||
GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
|
||||
|
||||
// USB
|
||||
const uint32_t port1_pin6_config = (
|
||||
IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */
|
||||
IOCON_PIO_MODE_INACT | /* No addition pin function */
|
||||
IOCON_PIO_INV_DI | /* Input function is not inverted */
|
||||
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
|
||||
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
|
||||
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
|
||||
);
|
||||
IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */
|
||||
|
||||
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */
|
||||
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state) {
|
||||
GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void) {
|
||||
// active low
|
||||
return 1 - GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN);
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const* buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler(void) {
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void) {
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef __ICCARM__
|
||||
// Implement _start() since we use linker flag '-nostartfiles'.
|
||||
// Requires defined __STARTUP_CLEAR_BSS,
|
||||
extern int main(void);
|
||||
|
||||
TU_ATTR_UNUSED void _start(void) {
|
||||
// called by startup code
|
||||
main();
|
||||
while (1) {}
|
||||
}
|
||||
|
||||
#ifdef __clang__
|
||||
void _exit (int __status) {
|
||||
while (1) {}
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
123
hw/bsp/lpc51/family.cmake
Normal file
123
hw/bsp/lpc51/family.cmake
Normal file
@ -0,0 +1,123 @@
|
||||
include_guard()
|
||||
|
||||
set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
|
||||
set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
|
||||
|
||||
# include board specific
|
||||
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
|
||||
|
||||
# toolchain set up
|
||||
set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
|
||||
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
|
||||
|
||||
set(FAMILY_MCUS LPC51 CACHE INTERNAL "")
|
||||
|
||||
#------------------------------------
|
||||
# BOARD_TARGET
|
||||
#------------------------------------
|
||||
# only need to be built ONCE for all examples
|
||||
function(add_board_target BOARD_TARGET)
|
||||
if (TARGET ${BOARD_TARGET})
|
||||
return()
|
||||
endif()
|
||||
|
||||
if (NOT DEFINED LD_FILE_GNU)
|
||||
set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}_flash.ld)
|
||||
endif ()
|
||||
set(LD_FILE_Clang ${LD_FILE_GNU})
|
||||
|
||||
if (NOT DEFINED STARTUP_FILE_GNU)
|
||||
set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
|
||||
endif ()
|
||||
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
|
||||
|
||||
add_library(${BOARD_TARGET} STATIC
|
||||
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
|
||||
# driver
|
||||
${SDK_DIR}/drivers/common/fsl_common_arm.c
|
||||
${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
|
||||
${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
|
||||
${SDK_DIR}/drivers/flexcomm/fsl_usart.c
|
||||
# mcu
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
|
||||
)
|
||||
target_include_directories(${BOARD_TARGET} PUBLIC
|
||||
${TOP}/lib/sct_neopixel
|
||||
# driver
|
||||
${SDK_DIR}/drivers/common
|
||||
${SDK_DIR}/drivers/flexcomm
|
||||
${SDK_DIR}/drivers/lpc_iocon
|
||||
${SDK_DIR}/drivers/lpc_gpio
|
||||
${SDK_DIR}/drivers/lpuart
|
||||
# mcu
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
|
||||
${CMSIS_DIR}/CMSIS/Core/Include
|
||||
)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
|
||||
__STARTUP_CLEAR_BSS
|
||||
)
|
||||
|
||||
update_board(${BOARD_TARGET})
|
||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||
target_link_options(${BOARD_TARGET} PUBLIC
|
||||
"LINKER:--script=${LD_FILE_GNU}"
|
||||
--specs=nosys.specs --specs=nano.specs
|
||||
-nostartfiles
|
||||
)
|
||||
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
|
||||
target_link_options(${BOARD_TARGET} PUBLIC
|
||||
"LINKER:--script=${LD_FILE_Clang}"
|
||||
)
|
||||
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
|
||||
target_link_options(${BOARD_TARGET} PUBLIC
|
||||
"LINKER:--config=${LD_FILE_IAR}"
|
||||
)
|
||||
endif ()
|
||||
endfunction()
|
||||
|
||||
|
||||
#------------------------------------
|
||||
# Functions
|
||||
#------------------------------------
|
||||
function(family_configure_example TARGET RTOS)
|
||||
family_configure_common(${TARGET} ${RTOS})
|
||||
|
||||
# Board target
|
||||
add_board_target(board_${BOARD})
|
||||
|
||||
#---------- Port Specific ----------
|
||||
# These files are built for each example since it depends on example's tusb_config.h
|
||||
target_sources(${TARGET} PUBLIC
|
||||
# BSP
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
|
||||
)
|
||||
|
||||
target_include_directories(${TARGET} PUBLIC
|
||||
# family, hw, board
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
|
||||
)
|
||||
|
||||
# Add TinyUSB target and port source
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_LPC51 ${RTOS})
|
||||
target_sources(${TARGET}-tinyusb PUBLIC
|
||||
${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
|
||||
)
|
||||
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
|
||||
|
||||
# Link dependencies
|
||||
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
|
||||
|
||||
# Flashing
|
||||
family_flash_jlink(${TARGET})
|
||||
#family_flash_nxplink(${TARGET})
|
||||
#family_flash_pyocd(${TARGET})
|
||||
endfunction()
|
||||
@ -1,19 +1,21 @@
|
||||
SDK_DIR = hw/mcu/nxp/mcux-sdk
|
||||
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
|
||||
|
||||
MCU_DIR = $(SDK_DIR)/devices/$(MCU)
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
MCU_DIR = $(SDK_DIR)/devices/$(MCU)
|
||||
CPU_CORE ?= cortex-m0plus
|
||||
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-D__STARTUP_CLEAR_BSS \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
|
||||
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
|
||||
|
||||
# mcu driver cause following warnings
|
||||
CFLAGS += -Wno-error=unused-parameter
|
||||
|
||||
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
|
||||
LDFLAGS_GCC += \
|
||||
-nostartfiles \
|
||||
--specs=nosys.specs --specs=nano.specs \
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE = $(MCU_DIR)/gcc/$(MCU)_flash.ld
|
||||
@ -29,7 +31,8 @@ SRC_C += \
|
||||
$(SDK_DIR)/drivers/flexcomm/fsl_usart.c
|
||||
|
||||
INC += \
|
||||
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
|
||||
$(TOP)/$(BOARD_PATH) \
|
||||
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
|
||||
$(TOP)/$(MCU_DIR) \
|
||||
$(TOP)/$(MCU_DIR)/drivers \
|
||||
$(TOP)/$(SDK_DIR)/drivers/common \
|
||||
|
||||
@ -55,7 +55,8 @@
|
||||
#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx
|
||||
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
|
||||
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
|
||||
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
|
||||
#define OPT_MCU_LPC51 9 ///< NXP LPC51
|
||||
#define OPT_MCU_LPC51UXX OPT_MCU_LPC51 ///< NXP LPC51
|
||||
#define OPT_MCU_LPC54 10 ///< NXP LPC54
|
||||
#define OPT_MCU_LPC55 11 ///< NXP LPC55
|
||||
// legacy naming
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user