From 8d5dbb957766921eba78b8762a458e6518521b66 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 5 Jul 2024 15:40:02 +0700 Subject: [PATCH 1/3] add board_reset_to_bootloader(), try to implement that for ch32v203 but not working yet --- examples/device/cdc_dual_ports/src/main.c | 20 ++++++++++++ hw/bsp/board_api.h | 3 ++ .../ch32v20x/boards/ch32v203c_r0_1v0/board.h | 2 +- .../ch32v20x/boards/ch32v203g_r0_1v0/board.h | 2 +- hw/bsp/ch32v20x/family.c | 32 +++++++++++++++++++ 5 files changed, 57 insertions(+), 2 deletions(-) diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c index 1167a5d50..ef12186f2 100644 --- a/examples/device/cdc_dual_ports/src/main.c +++ b/examples/device/cdc_dual_ports/src/main.c @@ -119,6 +119,26 @@ static void cdc_task(void) { } } +// Invoked when cdc when line state changed e.g connected/disconnected +// Use to reset to DFU when disconnect with 1200 bps +void tud_cdc_line_state_cb(uint8_t instance, bool dtr, bool rts) { + (void)rts; + + // DTR = false is counted as disconnected + if (!dtr) { + // touch1200 only with first CDC instance (Serial) + if (instance == 0) { + cdc_line_coding_t coding; + tud_cdc_get_line_coding(&coding); + if (coding.bit_rate == 1200) { + if (board_reset_to_bootloader) { + board_reset_to_bootloader(); + } + } + } + } +} + //--------------------------------------------------------------------+ // BLINKING TASK //--------------------------------------------------------------------+ diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h index eee9ed9c5..774deca24 100644 --- a/hw/bsp/board_api.h +++ b/hw/bsp/board_api.h @@ -72,6 +72,9 @@ void board_init(void); // Init board after tinyusb is initialized void board_init_after_tusb(void) TU_ATTR_WEAK; +// Jump to bootloader +void board_reset_to_bootloader(void) TU_ATTR_WEAK; + // Turn LED on or off void board_led_write(bool state); diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h index 64eaf931e..692cf11bf 100644 --- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h +++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.h @@ -6,7 +6,7 @@ extern "C" { #endif #define LED_PORT GPIOA -#define LED_PIN GPIO_Pin_15 +#define LED_PIN GPIO_Pin_0 #define LED_STATE_ON 0 #define UART_DEV USART1 diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h index d6c3a64c8..783831edd 100644 --- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h +++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.h @@ -7,7 +7,7 @@ extern "C" { #define LED_PORT GPIOA #define LED_PIN GPIO_Pin_0 -#define LED_STATE_ON 1 +#define LED_STATE_ON 0 #define UART_DEV USART2 #define UART_CLOCK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE) diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c index ea98a5e19..e3075757e 100644 --- a/hw/bsp/ch32v20x/family.c +++ b/hw/bsp/ch32v20x/family.c @@ -139,6 +139,34 @@ void board_init(void) { __enable_irq(); } +void board_reset_to_bootloader(void) { + board_led_write(true); + + __disable_irq(); + +#if CFG_TUD_ENABLED + tud_deinit(0); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, DISABLE); +#endif + + SysTick->CTLR = 0; + for (int i = WWDG_IRQn; i< DMA1_Channel8_IRQn; i++) { + NVIC_DisableIRQ(i); + } + + __enable_irq(); + + // define function pointer to BOOT ROM address + void (*bootloader_entry)(void) = (void (*)(void))0x1FFF8000; + + bootloader_entry(); + + board_led_write(false); + + // while(1) { } +} + void board_led_write(bool state) { GPIO_WriteBit(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); } @@ -166,3 +194,7 @@ int board_uart_write(void const *buf, int len) { return len; } + +//-------------------------------------------------------------------- +// Neopixel +//-------------------------------------------------------------------- From c1175b70131fa5020713381a850f2ce1018f390f Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 10 Jul 2024 22:48:06 +0700 Subject: [PATCH 2/3] enable full 224KB flash for ch32v203 with flash enhanced read mode in SystemInit (better with startup). add flash with wlink-rs --- .gitignore | 60 +------------------ examples/build_system/make/rules.mk | 6 ++ .../boards/ch32v203c_r0_1v0/board.cmake | 5 +- .../ch32v20x/boards/ch32v203c_r0_1v0/board.mk | 4 +- .../boards/ch32v203g_r0_1v0/board.cmake | 5 +- .../ch32v20x/boards/ch32v203g_r0_1v0/board.mk | 4 +- .../ch32v20x/boards/nanoch32v203/board.cmake | 5 +- hw/bsp/ch32v20x/boards/nanoch32v203/board.mk | 4 +- hw/bsp/ch32v20x/family.c | 48 +++++++-------- hw/bsp/ch32v20x/family.cmake | 1 + hw/bsp/ch32v20x/family.mk | 3 +- hw/bsp/ch32v20x/system_ch32v20x.c | 11 +++- hw/bsp/family_support.cmake | 12 ++++ 13 files changed, 75 insertions(+), 93 deletions(-) diff --git a/.gitignore b/.gitignore index 7a37d65dc..f2150a26f 100644 --- a/.gitignore +++ b/.gitignore @@ -31,62 +31,4 @@ cov-int __pycache__ cmake-build-* sdkconfig - -# submodules -hw/mcu/allwinner -hw/mcu/bridgetek/ft9xx/ft90x-sdk -hw/mcu/broadcom -hw/mcu/gd/nuclei-sdk -hw/mcu/infineon/mtb-xmclib-cat3 -hw/mcu/microchip -hw/mcu/mindmotion/mm32sdk -hw/mcu/nordic/nrfx -hw/mcu/nuvoton -hw/mcu/nxp/lpcopen -hw/mcu/nxp/mcux-sdk -hw/mcu/nxp/nxp_sdk -hw/mcu/raspberry_pi/Pico-PIO-USB -hw/mcu/renesas/rx -hw/mcu/silabs/cmsis-dfp-efm32gg12b -hw/mcu/sony/cxd56/spresense-exported-sdk -hw/mcu/st/cmsis_device_f0 -hw/mcu/st/cmsis_device_f1 -hw/mcu/st/cmsis_device_f2 -hw/mcu/st/cmsis_device_f3 -hw/mcu/st/cmsis_device_f4 -hw/mcu/st/cmsis_device_f7 -hw/mcu/st/cmsis_device_g0 -hw/mcu/st/cmsis_device_g4 -hw/mcu/st/cmsis_device_h5 -hw/mcu/st/cmsis_device_h7 -hw/mcu/st/cmsis_device_l0 -hw/mcu/st/cmsis_device_l1 -hw/mcu/st/cmsis_device_l4 -hw/mcu/st/cmsis_device_l5 -hw/mcu/st/cmsis_device_u5 -hw/mcu/st/cmsis_device_wb -hw/mcu/st/stm32f0xx_hal_driver -hw/mcu/st/stm32f1xx_hal_driver -hw/mcu/st/stm32f2xx_hal_driver -hw/mcu/st/stm32f3xx_hal_driver -hw/mcu/st/stm32f4xx_hal_driver -hw/mcu/st/stm32f7xx_hal_driver -hw/mcu/st/stm32g0xx_hal_driver -hw/mcu/st/stm32g4xx_hal_driver -hw/mcu/st/stm32h5xx_hal_driver -hw/mcu/st/stm32h7xx_hal_driver -hw/mcu/st/stm32l0xx_hal_driver -hw/mcu/st/stm32l1xx_hal_driver -hw/mcu/st/stm32l4xx_hal_driver -hw/mcu/st/stm32l5xx_hal_driver -hw/mcu/st/stm32u5xx_hal_driver -hw/mcu/st/stm32wbxx_hal_driver -hw/mcu/ti -hw/mcu/wch/ch32v20x -hw/mcu/wch/ch32v307 -hw/mcu/wch/ch32f20x -lib/CMSIS_5 -lib/FreeRTOS-Kernel -lib/lwip -lib/sct_neopixel -tools/uf2 +.PVS-Studio diff --git a/examples/build_system/make/rules.mk b/examples/build_system/make/rules.mk index 102c6db0c..f322dbae6 100644 --- a/examples/build_system/make/rules.mk +++ b/examples/build_system/make/rules.mk @@ -145,6 +145,12 @@ OPENOCD_WCH_OPTION ?= flash-openocd-wch: $(BUILD)/$(PROJECT).elf $(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit +# --------------- wlink-rs ----------------- +# flash with https://github.com/ch32-rs/wlink +WLINK_RS ?= wlink +flash-wlink-rs: $(BUILD)/$(PROJECT).elf + $(WLINK_RS) flash $< + # --------------- dfu-util ----------------- DFU_UTIL_OPTION ?= -a 0 flash-dfu-util: $(BUILD)/$(PROJECT).bin diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake index 3dd87d3de..adb0ea741 100644 --- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake +++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.cmake @@ -1,6 +1,8 @@ set(MCU_VARIANT D6) -set(LD_FLASH_SIZE 64K) +# 64KB zero-wait, 224KB total flash +#set(LD_FLASH_SIZE 64K) +set(LD_FLASH_SIZE 224K) set(LD_RAM_SIZE 20K) # set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${CH32_FAMILY}_tinyuf2.ld) @@ -8,6 +10,7 @@ set(LD_RAM_SIZE 20K) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC SYSCLK_FREQ_144MHz_HSE=144000000 + CH32_FLASH_ENHANCE_READ_MODE=1 CFG_EXAMPLE_MSC_DUAL_READONLY ) endfunction() diff --git a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk index 7d5894629..bdd15f737 100644 --- a/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk +++ b/hw/bsp/ch32v20x/boards/ch32v203c_r0_1v0/board.mk @@ -2,8 +2,10 @@ MCU_VARIANT = D6 CFLAGS += \ -DSYSCLK_FREQ_144MHz_HSE=144000000 \ + -DCH32_FLASH_ENHANCE_READ_MODE=1 \ -DCFG_EXAMPLE_MSC_DUAL_READONLY \ +# 64KB zero-wait, 224KB total flash LDFLAGS += \ - -Wl,--defsym=__FLASH_SIZE=64K \ + -Wl,--defsym=__FLASH_SIZE=224K \ -Wl,--defsym=__RAM_SIZE=20K \ diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake index 6e5305212..6fe3e05b2 100644 --- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake +++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake @@ -1,11 +1,14 @@ set(MCU_VARIANT D6) -set(LD_FLASH_SIZE 32K) +# 32KB zero-wait, 224KB total flash +#set(LD_FLASH_SIZE 32K) +set(LD_FLASH_SIZE 224K) set(LD_RAM_SIZE 10K) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC SYSCLK_FREQ_144MHz_HSI=144000000 + CH32_FLASH_ENHANCE_READ_MODE=1 CFG_EXAMPLE_MSC_DUAL_READONLY ) endfunction() diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk index e5e4d63ba..f71f53478 100644 --- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk +++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk @@ -2,8 +2,10 @@ MCU_VARIANT = D6 CFLAGS += \ -DSYSCLK_FREQ_144MHz_HSI=144000000 \ + -DCH32_FLASH_ENHANCE_READ_MODE=1 \ -DCFG_EXAMPLE_MSC_DUAL_READONLY \ +# 32KB zero-wait, 224KB total flash LDFLAGS += \ - -Wl,--defsym=__FLASH_SIZE=32K \ + -Wl,--defsym=__FLASH_SIZE=224K \ -Wl,--defsym=__RAM_SIZE=10K \ diff --git a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake index f8dc862a7..ed7365797 100644 --- a/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake +++ b/hw/bsp/ch32v20x/boards/nanoch32v203/board.cmake @@ -1,11 +1,14 @@ set(MCU_VARIANT D6) -set(LD_FLASH_SIZE 64K) +# 64KB zero-wait, 224KB total flash +#set(LD_FLASH_SIZE 64K) +set(LD_FLASH_SIZE 224K) set(LD_RAM_SIZE 20K) function(update_board TARGET) target_compile_definitions(${TARGET} PUBLIC SYSCLK_FREQ_144MHz_HSE=144000000 + CH32_FLASH_ENHANCE_READ_MODE=1 CFG_EXAMPLE_MSC_DUAL_READONLY ) endfunction() diff --git a/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk b/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk index 7d5894629..362aace47 100644 --- a/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk +++ b/hw/bsp/ch32v20x/boards/nanoch32v203/board.mk @@ -2,8 +2,10 @@ MCU_VARIANT = D6 CFLAGS += \ -DSYSCLK_FREQ_144MHz_HSE=144000000 \ + -DCH32_FLASH_ENHANCE_READ_MODE=1 \ -DCFG_EXAMPLE_MSC_DUAL_READONLY \ +# 64KB zero-wait , 224KB total flash LDFLAGS += \ - -Wl,--defsym=__FLASH_SIZE=64K \ + -Wl,--defsym=__FLASH_SIZE=224K \ -Wl,--defsym=__RAM_SIZE=20K \ diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c index e3075757e..542d4b5db 100644 --- a/hw/bsp/ch32v20x/family.c +++ b/hw/bsp/ch32v20x/family.c @@ -62,7 +62,6 @@ void USBWakeUp_IRQHandler(void) { #if CFG_TUSB_OS == OPT_OS_NONE - volatile uint32_t system_ticks = 0; __attribute__((interrupt)) @@ -84,7 +83,6 @@ uint32_t SysTick_Config(uint32_t ticks) { uint32_t board_millis(void) { return system_ticks; } - #endif void board_init(void) { @@ -140,29 +138,29 @@ void board_init(void) { } void board_reset_to_bootloader(void) { - board_led_write(true); - - __disable_irq(); - -#if CFG_TUD_ENABLED - tud_deinit(0); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, DISABLE); -#endif - - SysTick->CTLR = 0; - for (int i = WWDG_IRQn; i< DMA1_Channel8_IRQn; i++) { - NVIC_DisableIRQ(i); - } - - __enable_irq(); - - // define function pointer to BOOT ROM address - void (*bootloader_entry)(void) = (void (*)(void))0x1FFF8000; - - bootloader_entry(); - - board_led_write(false); +// board_led_write(true); +// +// __disable_irq(); +// +// #if CFG_TUD_ENABLED +// tud_deinit(0); +// RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, ENABLE); +// RCC_APB1PeriphResetCmd(RCC_APB1Periph_USB, DISABLE); +// #endif +// +// SysTick->CTLR = 0; +// for (int i = WWDG_IRQn; i< DMA1_Channel8_IRQn; i++) { +// NVIC_DisableIRQ(i); +// } +// +// __enable_irq(); +// +// // define function pointer to BOOT ROM address +// void (*bootloader_entry)(void) = (void (*)(void))0x1FFF8000; +// +// bootloader_entry(); +// +// board_led_write(false); // while(1) { } } diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake index faa79ed66..bf929b862 100644 --- a/hw/bsp/ch32v20x/family.cmake +++ b/hw/bsp/ch32v20x/family.cmake @@ -131,6 +131,7 @@ function(family_configure_example TARGET RTOS) # Flashing family_add_bin_hex(${TARGET}) family_flash_openocd_wch(${TARGET}) + family_flash_wlink_rs(${TARGET}) #family_add_uf2(${TARGET} ${UF2_FAMILY_ID}) #family_flash_uf2(${TARGET} ${UF2_FAMILY_ID}) diff --git a/hw/bsp/ch32v20x/family.mk b/hw/bsp/ch32v20x/family.mk index 4485091dc..08761dc0d 100644 --- a/hw/bsp/ch32v20x/family.mk +++ b/hw/bsp/ch32v20x/family.mk @@ -60,4 +60,5 @@ INC += \ FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg -flash: flash-openocd-wch +flash: flash-wlink-rs +#flash: flash-openocd-wch diff --git a/hw/bsp/ch32v20x/system_ch32v20x.c b/hw/bsp/ch32v20x/system_ch32v20x.c index 435feae1b..882e7ed71 100644 --- a/hw/bsp/ch32v20x/system_ch32v20x.c +++ b/hw/bsp/ch32v20x/system_ch32v20x.c @@ -19,9 +19,9 @@ * If none of the define below is enabled, the HSI is used as System clock source. */ //#define SYSCLK_FREQ_HSE HSE_VALUE -//#define SYSCLK_FREQ_48MHz_HSE 48000000 +// #define SYSCLK_FREQ_48MHz_HSE 48000000 //#define SYSCLK_FREQ_56MHz_HSE 56000000 -//#define SYSCLK_FREQ_72MHz_HSE 72000000 +// #define SYSCLK_FREQ_72MHz_HSE 72000000 // #define SYSCLK_FREQ_96MHz_HSE 96000000 //#define SYSCLK_FREQ_120MHz_HSE 120000000 //#define SYSCLK_FREQ_144MHz_HSE 144000000 @@ -109,6 +109,13 @@ static void SetSysClockTo144_HSI( void ); */ void SystemInit (void) { + // Enable Flash enhance read mode for full 224KB +#if defined(CH32_FLASH_ENHANCE_READ_MODE) && CH32_FLASH_ENHANCE_READ_MODE == 1 + FLASH_Unlock_Fast(); + FLASH->CTLR |= (1 << 24); + FLASH_Lock_Fast(); +#endif + RCC->CTLR |= (uint32_t)0x00000001; RCC->CFGR0 &= (uint32_t)0xF8FF0000; RCC->CTLR &= (uint32_t)0xFEF6FFFF; diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 9f2e34691..bc2d481bb 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -455,6 +455,18 @@ function(family_flash_openocd_wch TARGET) family_flash_openocd(${TARGET}) endfunction() +# Add flash with https://github.com/ch32-rs/wlink +function(family_flash_wlink_rs TARGET) + if (NOT DEFINED WLINK_RS) + set(WLINK_RS wlink) + endif () + + add_custom_target(${TARGET}-wlink-rs + DEPENDS ${TARGET} + COMMAND ${WLINK_RS} flash $ + ) +endfunction() + # Add flash pycod target function(family_flash_pyocd TARGET) if (NOT DEFINED PYOC) From e251493a161b5a383fd7f8861e3bf7ea72bf872c Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 10 Jul 2024 22:58:00 +0700 Subject: [PATCH 3/3] skip FLASH_ function to reduce dependency --- hw/bsp/ch32v20x/system_ch32v20x.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/bsp/ch32v20x/system_ch32v20x.c b/hw/bsp/ch32v20x/system_ch32v20x.c index 882e7ed71..d32ee8d17 100644 --- a/hw/bsp/ch32v20x/system_ch32v20x.c +++ b/hw/bsp/ch32v20x/system_ch32v20x.c @@ -111,9 +111,12 @@ void SystemInit (void) { // Enable Flash enhance read mode for full 224KB #if defined(CH32_FLASH_ENHANCE_READ_MODE) && CH32_FLASH_ENHANCE_READ_MODE == 1 - FLASH_Unlock_Fast(); - FLASH->CTLR |= (1 << 24); - FLASH_Lock_Fast(); + FLASH->KEYR = 0x45670123; // FLASH_Unlock_Fast(); + FLASH->KEYR = 0xCDEF89AB; + + FLASH->CTLR |= (1 << 24); // Enhanced Read Mode + + FLASH->CTLR |= (1 << 15); // FLASH_Lock_Fast(); #endif RCC->CTLR |= (uint32_t)0x00000001;