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fix l4 linker with clang

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hathach 2024-04-24 00:33:56 +07:00
parent 0e06c4cfdf
commit 60f39f7b1e
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1 changed files with 6 additions and 6 deletions
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12
hw/bsp/stm32l4/boards/stm32l4p5nucleo/STM32L4P5ZGTX_FLASH.ld
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@ -52,12 +52,6 @@
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + 0x0001FFFF; /* end of "SRAM1" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Memories definition */
MEMORY
{
@ -65,6 +59,12 @@ MEMORY
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
}
/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + 0x0001FFFF; /* end of "SRAM1" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Sections */
SECTIONS
{