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https://github.com/hathach/tinyusb.git
synced 2025-02-15 12:39:50 +00:00
refactor max3421_init() for samd51 to be generic for sercom and eic
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hathach
parent
c074488f75
commit
605ad73ec0
@ -44,13 +44,16 @@
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#define UART_RX_PIN 22
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// SPI for USB host shield
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#define MAX3421_SERCOM 2 // SERCOM2
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#define MAX3421_SCK_PIN 13
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#define MAX3421_MOSI_PIN 12
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#define MAX3421_MISO_PIN 14
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#define MAX3421_CS_PIN 18 // D10
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#define MAX3421_INTR_PIN 20 // D9
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#define MAX3421_SERCOM_ID 2 // SERCOM2
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#define MAX3421_SCK_PIN 13
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#define MAX3421_MOSI_PIN 12
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#define MAX3421_MOSI_PAD 0
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#define MAX3421_MISO_PIN 14
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#define MAX3421_MISO_PAD 2
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#define MAX3421_CS_PIN 18 // D10
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#define MAX3421_INTR_PIN 20 // D9
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#define MAX3421_INTR_EIC_ID 4 // EIC4
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#ifdef __cplusplus
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}
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@ -79,7 +79,8 @@ void USB_3_Handler(void) {
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#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
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static void max3421_init(void);
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//#define
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#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
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#define MAX3421_EIC_Handler TU_XSTRCAT3(EIC_, MAX3421_INTR_EIC_ID, _Handler)
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#endif
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@ -182,41 +183,55 @@ uint32_t board_millis(void) {
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#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
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static void max3421_init(void) {
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// CS pin
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gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
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gpio_set_pin_level(MAX3421_CS_PIN, 1);
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//------------- SPI Init -------------//
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uint32_t const baudrate = 4000000u;
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// Enable the APB clock for SERCOM2
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MCLK->APBBMASK.reg |= MCLK_APBBMASK_SERCOM2;
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struct {
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volatile uint32_t *mck_apb;
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uint32_t mask;
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uint8_t gclk_id_core;
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uint8_t gclk_id_slow;
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} const sercom_clock[] = {
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{ &MCLK->APBAMASK.reg, MCLK_APBAMASK_SERCOM0, SERCOM0_GCLK_ID_CORE, SERCOM0_GCLK_ID_SLOW },
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{ &MCLK->APBAMASK.reg, MCLK_APBAMASK_SERCOM1, SERCOM1_GCLK_ID_CORE, SERCOM1_GCLK_ID_SLOW },
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{ &MCLK->APBBMASK.reg, MCLK_APBBMASK_SERCOM2, SERCOM2_GCLK_ID_CORE, SERCOM2_GCLK_ID_SLOW },
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{ &MCLK->APBBMASK.reg, MCLK_APBBMASK_SERCOM3, SERCOM3_GCLK_ID_CORE, SERCOM3_GCLK_ID_SLOW },
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{ &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM4, SERCOM4_GCLK_ID_CORE, SERCOM4_GCLK_ID_SLOW },
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{ &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM5, SERCOM5_GCLK_ID_CORE, SERCOM5_GCLK_ID_SLOW },
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#ifdef SERCOM6_GCLK_ID_CORE
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{ &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM6, SERCOM6_GCLK_ID_CORE, SERCOM6_GCLK_ID_SLOW },
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#endif
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#ifdef SERCOM7_GCLK_ID_CORE
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{ &MCLK->APBDMASK.reg, MCLK_APBDMASK_SERCOM7, SERCOM7_GCLK_ID_CORE, SERCOM7_GCLK_ID_SLOW },
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#endif
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};
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// Configure GCLK for SERCOM2, initClockNVIC()
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GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
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GCLK->PCHCTRL[SERCOM2_GCLK_ID_SLOW].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
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Sercom* sercom = MAX3421_SERCOM;
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// Enable the APB clock for SERCOM
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*sercom_clock[MAX3421_SERCOM_ID].mck_apb |= sercom_clock[MAX3421_SERCOM_ID].mask;
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// Configure GCLK for SERCOM
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GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_core].reg = GCLK_PCHCTRL_GEN_GCLK0_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
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GCLK->PCHCTRL[sercom_clock[MAX3421_SERCOM_ID].gclk_id_slow].reg = GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos);
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// Disable the SPI module
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SERCOM2->SPI.CTRLA.bit.ENABLE = 0;
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sercom->SPI.CTRLA.bit.ENABLE = 0;
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// Reset the SPI module
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SERCOM2->SPI.CTRLA.bit.SWRST = 1;
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while (SERCOM2->SPI.SYNCBUSY.bit.SWRST);
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sercom->SPI.CTRLA.bit.SWRST = 1;
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while (sercom->SPI.SYNCBUSY.bit.SWRST);
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// Set up SPI in master mode, MSB first, SPI mode 0
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uint8_t const mosi_pad = 0;
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uint8_t const miso_pad = 2;
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SERCOM2->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(mosi_pad) | SERCOM_SPI_CTRLA_DIPO(miso_pad);
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sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_MODE(3) | SERCOM_SPI_CTRLA_DOPO(MAX3421_MOSI_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_MISO_PAD);
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SERCOM2->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
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while (SERCOM2->SPI.SYNCBUSY.bit.CTRLB == 1);
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sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
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while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
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// Set the baud rate
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uint32_t baudrate = 4000000u;
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SERCOM2->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) -
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1); // Replace 1000000 with your desired baud rate
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sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
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// Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2)
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// 2 function C: PIO_SERCOM
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// Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
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gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
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gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
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gpio_set_pin_function(MAX3421_SCK_PIN, 2);
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@ -229,16 +244,16 @@ static void max3421_init(void) {
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gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
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gpio_set_pin_function(MAX3421_MISO_PIN, 2);
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// CS pin
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gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
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gpio_set_pin_level(MAX3421_CS_PIN, 1);
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// Enable the SPI module
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SERCOM2->SPI.CTRLA.bit.ENABLE = 1;
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while (SERCOM2->SPI.SYNCBUSY.bit.ENABLE);
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sercom->SPI.CTRLA.bit.ENABLE = 1;
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while (sercom->SPI.SYNCBUSY.bit.ENABLE);
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//------------- External Interrupt -------------//
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// INT pin with external interrupt
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gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
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gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
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// Enable the APB clock for EIC (External Interrupt Controller)
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MCLK->APBAMASK.reg |= MCLK_APBAMASK_EIC;
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@ -255,19 +270,30 @@ static void max3421_init(void) {
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while (EIC->SYNCBUSY.bit.ENABLE);
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// Configure EXTINT4 (PA20) to trigger on falling edge
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EIC->CONFIG[0].reg |= EIC_CONFIG_SENSE4_FALL;
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volatile uint32_t * eic_config;
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uint8_t sense_shift;
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if ( MAX3421_INTR_EIC_ID < 8 ) {
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eic_config = &EIC->CONFIG[0].reg;
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sense_shift = MAX3421_INTR_EIC_ID * 4;
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} else {
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eic_config = &EIC->CONFIG[1].reg;
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sense_shift = (MAX3421_INTR_EIC_ID - 8) * 4;
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}
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// Enable EXTINT4
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EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << 4);
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*eic_config &= ~(7 << sense_shift);
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*eic_config |= 2 << sense_shift;
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// Enable External Interrupt
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EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
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// Enable EIC
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EIC->CTRLA.bit.ENABLE = 1;
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while (EIC->SYNCBUSY.bit.ENABLE);
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}
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void EIC_4_Handler(void) {
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void MAX3421_EIC_Handler(void) {
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// Clear the interrupt flag
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EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << 4);
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EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
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// Call the TinyUSB interrupt handler
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tuh_int_handler(1);
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@ -291,10 +317,12 @@ void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
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bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_len, uint8_t *rx_buf, size_t rx_len) {
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(void) rhport;
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Sercom* sercom = MAX3421_SERCOM;
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size_t count = 0;
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while (count < tx_len || count < rx_len) {
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// Wait for the transmit buffer to be empty
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while (!SERCOM2->SPI.INTFLAG.bit.DRE);
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while (!sercom->SPI.INTFLAG.bit.DRE);
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// Write data to be transmitted
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uint8_t data = 0x00;
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@ -302,13 +330,13 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
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data = tx_buf[count];
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}
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SERCOM2->SPI.DATA.reg = (uint32_t) data;
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sercom->SPI.DATA.reg = (uint32_t) data;
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// Wait for the receive buffer to be filled
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while (!SERCOM2->SPI.INTFLAG.bit.RXC);
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while (!sercom->SPI.INTFLAG.bit.RXC);
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// Read received data
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data = (uint8_t) SERCOM2->SPI.DATA.reg;
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data = (uint8_t) sercom->SPI.DATA.reg;
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if (count < rx_len) {
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rx_buf[count] = data;
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}
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@ -317,8 +345,8 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l
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}
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// wait for bus idle and clear flags
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while (!(SERCOM2->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
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SERCOM2->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
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while (!(sercom->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
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sercom->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
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return true;
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}
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