mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-14 04:18:56 +00:00
make fundamental changes in project building
add some makefile.defs
This commit is contained in:
parent
f31ade6151
commit
6049b6d0df
92
.project
92
.project
@ -1,92 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<projectDescription>
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<name>tinyusb</name>
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<comment></comment>
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<projects>
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</projects>
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<buildSpec>
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<buildCommand>
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<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
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<arguments>
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<dictionary>
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<key>?name?</key>
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<value></value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.append_environment</key>
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<value>true</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
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<value>all</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.buildArguments</key>
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<value></value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.buildCommand</key>
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<value>make</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.buildLocation</key>
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<value>${workspace_loc:/tinyusb/Debug}</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
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<value>clean</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.contents</key>
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<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
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<value>true</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
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<value>true</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.enableFullBuild</key>
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<value>true</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
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<value>all</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.stopOnError</key>
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<value>true</value>
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</dictionary>
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<dictionary>
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<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
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<value>true</value>
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</dictionary>
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</arguments>
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</buildCommand>
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<buildCommand>
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<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
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<triggers>full,incremental,</triggers>
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<arguments>
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</arguments>
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</buildCommand>
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</buildSpec>
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<natures>
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<nature>org.eclipse.cdt.core.cnature</nature>
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<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
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<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
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</natures>
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<filteredResources>
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<filter>
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<id>1354161221797</id>
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<name>html</name>
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<type>5</type>
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<matcher>
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<id>org.eclipse.ui.ide.multiFilter</id>
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<arguments>1.0-name-matches-false-false-index.htm?</arguments>
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</matcher>
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</filter>
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</filteredResources>
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</projectDescription>
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@ -57,22 +57,22 @@
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#include <stdint.h>
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/// n-th Bit
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/// n-th Bit
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#ifndef BIT
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#define BIT(n) (1 << (n))
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#endif
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#ifndef BOARD
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#define BOARD BOARD_NGX4330_EXPLORER
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#define BOARD_NGX43XX 1
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#define BOARD_LPCXPRESSOUXX 2
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#if BOARD == BOARD_NGX43XX
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//#include "board_ngx4330.h"
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#elif BOARD == BOARD_LPCXPRESSO13UXX
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#else
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#error BOARD is not defined or supported yet
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#endif
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#define BOARD_NGX4330_EXPLORER 1
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#define BOARD_LPCXPRESSO1347 2
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//#ifdef BOARD == BOARD_NGX4330_EXPLORER
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//#include "board_ngx4330_explorer.h"
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//#endif
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/// Init board peripherals : Clock, UART, LEDs, Buttons
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void board_init(void);
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void board_leds(uint32_t mask, uint32_t state);
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@ -37,7 +37,7 @@
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#include "board.h"
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#if BOARD == BOARD_LPCXPRESSO1347
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#if BOARD == BOARD_LPCXPRESSO13UXX
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#include "LPC13Uxx.h"
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@ -37,7 +37,7 @@
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#include "board.h"
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#if BOARD == BOARD_NGX4330_EXPLORER
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#if BOARD == BOARD_NGX43XX
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#include "lpc43xx_uart.h"
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#include "lpc43xx_scu.h"
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252
demos/bsp/lpc11uxx/startup_keil/startup_LPC11Uxx.s
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252
demos/bsp/lpc11uxx/startup_keil/startup_LPC11Uxx.s
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@ -0,0 +1,252 @@
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;/**************************************************************************//**
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; * @file startup_LPC11Uxx.s
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; * @brief CMSIS Cortex-M0 Core Device Startup File
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; * for the NXP LPC11Uxx Device Series
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; * @version V1.10
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; * @date 24. November 2010
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; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
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; *
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; * @note
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; * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
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; *
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; * @par
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; * ARM Limited (ARM) is supplying this software for use with Cortex-M
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; * processor based microcontrollers. This file can be freely distributed
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; * within development tools that are supporting such ARM based processors.
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; *
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; * @par
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; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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; *
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; ******************************************************************************/
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000200
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000100
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD FLEX_INT0_IRQHandler ; All GPIO pin can be routed to FLEX_INTx
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DCD FLEX_INT1_IRQHandler
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DCD FLEX_INT2_IRQHandler
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DCD FLEX_INT3_IRQHandler
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DCD FLEX_INT4_IRQHandler
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DCD FLEX_INT5_IRQHandler
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DCD FLEX_INT6_IRQHandler
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DCD FLEX_INT7_IRQHandler
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DCD GINT0_IRQHandler
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DCD GINT1_IRQHandler ; PIO0 (0:7)
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DCD Reserved_IRQHandler ; Reserved
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DCD Reserved_IRQHandler
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DCD Reserved_IRQHandler
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DCD Reserved_IRQHandler
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DCD SSP1_IRQHandler ; SSP1
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DCD I2C_IRQHandler ; I2C
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DCD TIMER16_0_IRQHandler ; 16-bit Timer0
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DCD TIMER16_1_IRQHandler ; 16-bit Timer1
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DCD TIMER32_0_IRQHandler ; 32-bit Timer0
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DCD TIMER32_1_IRQHandler ; 32-bit Timer1
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DCD SSP0_IRQHandler ; SSP0
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DCD UART_IRQHandler ; UART
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DCD USB_IRQHandler ; USB IRQ
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DCD USB_FIQHandler ; USB FIQ
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DCD ADC_IRQHandler ; A/D Converter
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DCD WDT_IRQHandler ; Watchdog timer
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DCD BOD_IRQHandler ; Brown Out Detect
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DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
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DCD Reserved_IRQHandler ; Reserved
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DCD Reserved_IRQHandler ; Reserved
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DCD USBWakeup_IRQHandler ; USB wake up
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DCD Reserved_IRQHandler ; Reserved
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IF :LNOT::DEF:NO_CRP
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AREA |.ARM.__at_0x02FC|, CODE, READONLY
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CRP_Key DCD 0xFFFFFFFF
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ENDIF
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AREA |.text|, CODE, READONLY
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; Reset Handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
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; for particular peripheral.
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;NMI_Handler PROC
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; EXPORT NMI_Handler [WEAK]
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; B .
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; ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Reserved_IRQHandler PROC
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EXPORT Reserved_IRQHandler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT NMI_Handler [WEAK]
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EXPORT FLEX_INT0_IRQHandler [WEAK]
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EXPORT FLEX_INT1_IRQHandler [WEAK]
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EXPORT FLEX_INT2_IRQHandler [WEAK]
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EXPORT FLEX_INT3_IRQHandler [WEAK]
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EXPORT FLEX_INT4_IRQHandler [WEAK]
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EXPORT FLEX_INT5_IRQHandler [WEAK]
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EXPORT FLEX_INT6_IRQHandler [WEAK]
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EXPORT FLEX_INT7_IRQHandler [WEAK]
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EXPORT GINT0_IRQHandler [WEAK]
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EXPORT GINT1_IRQHandler [WEAK]
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EXPORT SSP1_IRQHandler [WEAK]
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EXPORT I2C_IRQHandler [WEAK]
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EXPORT TIMER16_0_IRQHandler [WEAK]
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EXPORT TIMER16_1_IRQHandler [WEAK]
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EXPORT TIMER32_0_IRQHandler [WEAK]
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EXPORT TIMER32_1_IRQHandler [WEAK]
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EXPORT SSP0_IRQHandler [WEAK]
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EXPORT UART_IRQHandler [WEAK]
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EXPORT USB_IRQHandler [WEAK]
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EXPORT USB_FIQHandler [WEAK]
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EXPORT ADC_IRQHandler [WEAK]
|
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EXPORT WDT_IRQHandler [WEAK]
|
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EXPORT BOD_IRQHandler [WEAK]
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EXPORT FMC_IRQHandler [WEAK]
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EXPORT USBWakeup_IRQHandler [WEAK]
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|
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NMI_Handler
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FLEX_INT0_IRQHandler
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||||
FLEX_INT1_IRQHandler
|
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FLEX_INT2_IRQHandler
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||||
FLEX_INT3_IRQHandler
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||||
FLEX_INT4_IRQHandler
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FLEX_INT5_IRQHandler
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FLEX_INT6_IRQHandler
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FLEX_INT7_IRQHandler
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GINT0_IRQHandler
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GINT1_IRQHandler
|
||||
SSP1_IRQHandler
|
||||
I2C_IRQHandler
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TIMER16_0_IRQHandler
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TIMER16_1_IRQHandler
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TIMER32_0_IRQHandler
|
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TIMER32_1_IRQHandler
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||||
SSP0_IRQHandler
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UART_IRQHandler
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USB_IRQHandler
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USB_FIQHandler
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ADC_IRQHandler
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WDT_IRQHandler
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BOD_IRQHandler
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||||
FMC_IRQHandler
|
||||
USBWakeup_IRQHandler
|
||||
|
||||
B .
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||||
|
||||
ENDP
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||||
|
||||
|
||||
ALIGN
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||||
|
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|
||||
; User Initial Stack & Heap
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|
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IF :DEF:__MICROLIB
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|
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EXPORT __initial_sp
|
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EXPORT __heap_base
|
||||
EXPORT __heap_limit
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|
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ELSE
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IMPORT __use_two_region_memory
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||||
EXPORT __user_initial_stackheap
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__user_initial_stackheap
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|
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LDR R0, = Heap_Mem
|
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LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
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BX LR
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ALIGN
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||||
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||||
ENDIF
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||||
|
||||
|
||||
END
|
386
demos/bsp/lpc11uxx/startup_xpresso/cr_startup_lpc11u.c
Normal file
386
demos/bsp/lpc11uxx/startup_xpresso/cr_startup_lpc11u.c
Normal file
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#ifdef __LPC11UXX__
|
||||
|
||||
//*****************************************************************************
|
||||
// +--+
|
||||
// | ++----+
|
||||
// +-++ |
|
||||
// | |
|
||||
// +-+--+ |
|
||||
// | +--+--+
|
||||
// +----+ Copyright (c) 2011 Code Red Technologies Ltd.
|
||||
//
|
||||
// Microcontroller Startup code for use with Red Suite
|
||||
//
|
||||
// Version : 110323
|
||||
//
|
||||
// Software License Agreement
|
||||
//
|
||||
// The software is owned by Code Red Technologies and/or its suppliers, and is
|
||||
// protected under applicable copyright laws. All rights are reserved. Any
|
||||
// use in violation of the foregoing restrictions may subject the user to criminal
|
||||
// sanctions under applicable laws, as well as to civil liability for the breach
|
||||
// of the terms and conditions of this license.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
|
||||
// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
|
||||
// CODE RED TECHNOLOGIES LTD.
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
#define __USE_CMSIS // Added by nxpUSBlib
|
||||
|
||||
// Code Red - if CMSIS is being used, then SystemInit() routine
|
||||
// will be called by startup code rather than in application's main()
|
||||
#if defined (__USE_CMSIS)
|
||||
#include "LPC11Uxx.h"
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the default handlers. These are aliased.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void SVCall_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Forward declaration of the specific IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
void FLEX_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FLEX_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void I2C_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void UART_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void ADC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void BOD_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for redlib based applications
|
||||
// main() is the entry point for newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
//*****************************************************************************
|
||||
//
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The vector table. Note that the proper constructs must be placed on this to
|
||||
// ensure that it ends up at physical address 0x0000.0000.
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
__attribute__ ((section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVCall_Handler, // SVCall handler
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// LPC11U specific handlers
|
||||
FLEX_INT0_IRQHandler, // 0 - GPIO pin interrupt 0
|
||||
FLEX_INT1_IRQHandler, // 1 - GPIO pin interrupt 1
|
||||
FLEX_INT2_IRQHandler, // 2 - GPIO pin interrupt 2
|
||||
FLEX_INT3_IRQHandler, // 3 - GPIO pin interrupt 3
|
||||
FLEX_INT4_IRQHandler, // 4 - GPIO pin interrupt 4
|
||||
FLEX_INT5_IRQHandler, // 5 - GPIO pin interrupt 5
|
||||
FLEX_INT6_IRQHandler, // 6 - GPIO pin interrupt 6
|
||||
FLEX_INT7_IRQHandler, // 7 - GPIO pin interrupt 7
|
||||
GINT0_IRQHandler, // 8 - GPIO GROUP0 interrupt
|
||||
GINT1_IRQHandler, // 9 - GPIO GROUP1 interrupt
|
||||
0, // 10 - Reserved
|
||||
0, // 11 - Reserved
|
||||
0, // 12 - Reserved
|
||||
0, // 13 - Reserved
|
||||
SSP1_IRQHandler, // 14 - SPI/SSP1 Interrupt
|
||||
I2C_IRQHandler, // 15 - I2C0
|
||||
TIMER16_0_IRQHandler, // 16 - CT16B0 (16-bit Timer 0)
|
||||
TIMER16_1_IRQHandler, // 17 - CT16B1 (16-bit Timer 1)
|
||||
TIMER32_0_IRQHandler, // 18 - CT32B0 (32-bit Timer 0)
|
||||
TIMER32_1_IRQHandler, // 19 - CT32B1 (32-bit Timer 1)
|
||||
SSP0_IRQHandler, // 20 - SPI/SSP0 Interrupt
|
||||
UART_IRQHandler, // 21 - UART0
|
||||
USB_IRQHandler, // 22 - USB IRQ
|
||||
USB_FIQHandler, // 23 - USB FIQ
|
||||
ADC_IRQHandler, // 24 - ADC (A/D Converter)
|
||||
WDT_IRQHandler, // 25 - WDT (Watchdog Timer)
|
||||
BOD_IRQHandler, // 26 - BOD (Brownout Detect)
|
||||
FMC_IRQHandler, // 27 - IP2111 Flash Memory Controller
|
||||
0, // 28 - Reserved
|
||||
0, // 29 - Reserved
|
||||
USBWakeup_IRQHandler, // 30 - USB wake-up interrupt
|
||||
0, // 31 - Reserved
|
||||
};
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
#else
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the load address, execution address and length of the RW data section and
|
||||
// the execution and length of the BSS (zero initialized) section.
|
||||
// Note that these symbols are not normally used by the managed linker script
|
||||
// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux).
|
||||
// They are provide here simply so this startup code can be used with earlier
|
||||
// versions of Red Suite which do not support the more advanced managed linker
|
||||
// script mechanism introduced in the above version. To enable their use,
|
||||
// define "USE_OLD_STYLE_DATA_BSS_INIT".
|
||||
//*****************************************************************************
|
||||
extern unsigned int _etext;
|
||||
extern unsigned int _data;
|
||||
extern unsigned int _edata;
|
||||
extern unsigned int _bss;
|
||||
extern unsigned int _ebss;
|
||||
#endif
|
||||
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void
|
||||
ResetISR(void) {
|
||||
|
||||
#ifndef USE_OLD_STYLE_DATA_BSS_INIT
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
#else
|
||||
// Use Old Style Data and BSS section initialization.
|
||||
// This will only initialize a single RAM bank.
|
||||
unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen;
|
||||
|
||||
// Copy the data segment from flash to SRAM.
|
||||
LoadAddr = &_etext;
|
||||
ExeAddr = &_data;
|
||||
EndAddr = &_edata;
|
||||
SectionLen = (void*)EndAddr - (void*)ExeAddr;
|
||||
data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen);
|
||||
// Zero fill the bss segment
|
||||
ExeAddr = &_bss;
|
||||
EndAddr = &_ebss;
|
||||
SectionLen = (void*)EndAddr - (void*)ExeAddr;
|
||||
bss_init ((unsigned int)ExeAddr, SectionLen);
|
||||
#endif
|
||||
|
||||
#ifdef __USE_CMSIS
|
||||
SystemInit();
|
||||
#endif
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main() ;
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SVCall_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors")))
|
||||
void IntDefaultHandler(void)
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
#endif /* __LPC11UXX__ */
|
44
demos/bsp/lpc13uxx/inc/clkconfig.h
Normal file
44
demos/bsp/lpc13uxx/inc/clkconfig.h
Normal file
@ -0,0 +1,44 @@
|
||||
/****************************************************************************
|
||||
* $Id:: clkconfig.h 6172 2011-01-13 18:22:51Z usb00423 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for clock configuration.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __CLKCONFIG_H
|
||||
#define __CLKCONFIG_H
|
||||
|
||||
#define SYSPLL_SRC_IRC_OSC 0
|
||||
#define SYSPLL_SRC_SYS_OSC 1
|
||||
|
||||
#define MAINCLK_SRC_IRC_OSC 0
|
||||
#define MAINCLK_SRC_SYSPLL_IN 1
|
||||
#define MAINCLK_SRC_WDT_OSC 2
|
||||
#define MAINCLK_SRC_SYS_PLL 3
|
||||
|
||||
#define WDTCLK_SRC_IRC_OSC 0
|
||||
#define WDTCLK_SRC_WDT_OSC 1
|
||||
|
||||
#define CLKOUTCLK_SRC_IRC_OSC 0
|
||||
#define CLKOUTCLK_SRC_SYS_OSC 1
|
||||
#define CLKOUTCLK_SRC_WDT_OSC 2
|
||||
#define CLKOUTCLK_SRC_MAIN_CLK 3
|
||||
|
||||
void WDT_CLK_Setup(uint32_t timer_num);
|
||||
void CLKOUT_Setup(uint32_t timer_num);
|
||||
#endif /* end __CLKCONFIG_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
64
demos/bsp/lpc13uxx/inc/gpio.h
Normal file
64
demos/bsp/lpc13uxx/inc/gpio.h
Normal file
@ -0,0 +1,64 @@
|
||||
/****************************************************************************
|
||||
* $Id:: gpio.h 6172 2011-01-13 18:22:51Z usb00423 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for GPIO.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __GPIO_H
|
||||
#define __GPIO_H
|
||||
|
||||
#define CHANNEL0 0
|
||||
#define CHANNEL1 1
|
||||
#define CHANNEL2 2
|
||||
#define CHANNEL3 3
|
||||
#define CHANNEL4 4
|
||||
#define CHANNEL5 5
|
||||
#define CHANNEL6 6
|
||||
#define CHANNEL7 7
|
||||
|
||||
#define PORT0 0
|
||||
#define PORT1 1
|
||||
|
||||
#define GROUP0 0
|
||||
#define GROUP1 1
|
||||
|
||||
void PIN_INT0_IRQHandler(void);
|
||||
void PIN_INT1_IRQHandler(void);
|
||||
void PIN_INT2_IRQHandler(void);
|
||||
void PIN_INT3_IRQHandler(void);
|
||||
void PIN_INT4_IRQHandler(void);
|
||||
void PIN_INT5_IRQHandler(void);
|
||||
void PIN_INT6_IRQHandler(void);
|
||||
void PIN_INT7_IRQHandler(void);
|
||||
void GINT0_IRQHandler(void);
|
||||
void GINT1_IRQHandler(void);
|
||||
void GPIOInit( void );
|
||||
void GPIOSetPinInterrupt( uint32_t channelNum, uint32_t portNum, uint32_t bitPosi,
|
||||
uint32_t sense, uint32_t event );
|
||||
void GPIOPinIntEnable( uint32_t channelNum, uint32_t event );
|
||||
void GPIOPinIntDisable( uint32_t channelNum, uint32_t event );
|
||||
uint32_t GPIOPinIntStatus( uint32_t channelNum );
|
||||
void GPIOPinIntClear( uint32_t channelNum );
|
||||
void GPIOSetGroupedInterrupt( uint32_t groupNum, uint32_t *bitPattern, uint32_t logic,
|
||||
uint32_t sense, uint32_t *eventPattern );
|
||||
uint32_t GPIOGetPinValue( uint32_t portNum, uint32_t bitPosi );
|
||||
void GPIOSetBitValue( uint32_t portNum, uint32_t bitPosi, uint32_t bitVal );
|
||||
void GPIOSetDir( uint32_t portNum, uint32_t bitPosi, uint32_t dir );
|
||||
|
||||
#endif /* end __GPIO_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
32
demos/bsp/lpc13uxx/inc/nmi.h
Normal file
32
demos/bsp/lpc13uxx/inc/nmi.h
Normal file
@ -0,0 +1,32 @@
|
||||
/****************************************************************************
|
||||
* $Id:: nmi.h 6172 2011-01-13 18:22:51Z usb00423 $
|
||||
* Project: NXP LPC13Uxx NMI software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for NMI interrupt.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __NMI_H
|
||||
#define __NMI_H
|
||||
|
||||
#define NMI_ENABLED 1
|
||||
|
||||
#define MAX_NMI_NUM 32
|
||||
|
||||
void NMI_Init( uint32_t NMI_num );
|
||||
void NMI_Handler(void);
|
||||
#endif /* end __NMI_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
88
demos/bsp/lpc13uxx/inc/power_api.h
Normal file
88
demos/bsp/lpc13uxx/inc/power_api.h
Normal file
@ -0,0 +1,88 @@
|
||||
/****************************************************************************
|
||||
* $Id:: power_api.h 6249 2011-01-25 19:23:47Z usb01267 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* Power API Header File for NXP LPC13Uxx Device Series
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __LPC13UXX_POWER_API_H__
|
||||
#define __LPC13UXX_POWER_API_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define PWRROMD_PRESENT
|
||||
|
||||
#define USBROMD_PRESENT
|
||||
|
||||
#ifdef USBROMD_PRESENT
|
||||
#include "mw_usbd_rom_api.h"
|
||||
#endif
|
||||
|
||||
typedef struct _PWRD {
|
||||
void (*set_pll)(unsigned int cmd[], unsigned int resp[]);
|
||||
void (*set_power)(unsigned int cmd[], unsigned int resp[]);
|
||||
} PWRD;
|
||||
|
||||
typedef struct _ROM {
|
||||
#ifdef USBROMD_PRESENT
|
||||
const USBD_API_T * pUSBD;
|
||||
#else
|
||||
const unsigned p_usbd;
|
||||
#endif /* USBROMD_PRESENT */
|
||||
const unsigned p_clib;
|
||||
const unsigned p_cand;
|
||||
#ifdef PWRROMD_PRESENT
|
||||
const PWRD * pPWRD;
|
||||
#else
|
||||
const unsigned p_pwrd;
|
||||
#endif /* PWRROMD_PRESENT */
|
||||
const unsigned p_dev1;
|
||||
const unsigned p_dev2;
|
||||
const unsigned p_dev3;
|
||||
const unsigned p_dev4;
|
||||
} ROM;
|
||||
|
||||
//PLL setup related definitions
|
||||
#define CPU_FREQ_EQU 0 //main PLL freq must be equal to the specified
|
||||
#define CPU_FREQ_LTE 1 //main PLL freq must be less than or equal the specified
|
||||
#define CPU_FREQ_GTE 2 //main PLL freq must be greater than or equal the specified
|
||||
#define CPU_FREQ_APPROX 3 //main PLL freq must be as close as possible the specified
|
||||
|
||||
#define PLL_CMD_SUCCESS 0 //PLL setup successfully found
|
||||
#define PLL_INVALID_FREQ 1 //specified freq out of range (either input or output)
|
||||
#define PLL_INVALID_MODE 2 //invalid mode (see above for valid) specified
|
||||
#define PLL_FREQ_NOT_FOUND 3 //specified freq not found under specified conditions
|
||||
#define PLL_NOT_LOCKED 4 //PLL not locked => no changes to the PLL setup
|
||||
|
||||
//power setup elated definitions
|
||||
#define PARAM_DEFAULT 0 //default power settings (voltage regulator, flash interface)
|
||||
#define PARAM_CPU_PERFORMANCE 1 //setup for maximum CPU performance (higher current, more computation)
|
||||
#define PARAM_EFFICIENCY 2 //balanced setting (power vs CPU performance)
|
||||
#define PARAM_LOW_CURRENT 3 //lowest active current, lowest CPU performance
|
||||
|
||||
#define PARAM_CMD_SUCCESS 0 //power setting successfully found
|
||||
#define PARAM_INVALID_FREQ 1 //specified freq out of range (=0 or > 50 MHz)
|
||||
#define PARAM_INVALID_MODE 2 //specified mode not valid (see above for valid)
|
||||
|
||||
#define MAX_CLOCK_KHZ_PARAM 50000
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __LPC13UXX_POWER_API_H__ */
|
||||
|
59
demos/bsp/lpc13uxx/inc/timer16.h
Normal file
59
demos/bsp/lpc13uxx/inc/timer16.h
Normal file
@ -0,0 +1,59 @@
|
||||
/****************************************************************************
|
||||
* $Id:: timer16.h 6956 2011-03-23 23:03:25Z usb00423 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for 16-bit timer
|
||||
* configuration.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __TIMER16_H
|
||||
#define __TIMER16_H
|
||||
|
||||
/* The test is either MAT_OUT or CAP_IN. Default is MAT_OUT. */
|
||||
#define TIMER_MATCH 0
|
||||
|
||||
|
||||
#define EMC0 4
|
||||
#define EMC1 6
|
||||
#define EMC2 8
|
||||
#define EMC3 10
|
||||
|
||||
#define MATCH0 (1<<0)
|
||||
#define MATCH1 (1<<1)
|
||||
#define MATCH2 (1<<2)
|
||||
#define MATCH3 (1<<3)
|
||||
|
||||
///* For 16-bit timer, make sure that TIME_INTERVAL should be no
|
||||
//greater than 0xFFFF. */
|
||||
#ifndef TIME_INTERVAL
|
||||
#define TIME_INTERVAL (SystemCoreClock/1000 - 1)
|
||||
#endif
|
||||
|
||||
void delayMs(uint8_t timer_num, uint32_t delayInMs);
|
||||
void CT16B0_IRQHandler(void);
|
||||
void CT16B1_IRQHandler(void);
|
||||
void enable_timer16(uint8_t timer_num);
|
||||
void disable_timer16(uint8_t timer_num);
|
||||
void reset_timer16(uint8_t timer_num);
|
||||
void set_timer16_capture(uint8_t timer_num, uint8_t location );
|
||||
void set_timer16_match(uint8_t timer_num, uint8_t match_enable, uint8_t location);
|
||||
void init_timer16(uint8_t timer_num, uint32_t timerInterval);
|
||||
void init_timer16PWM(uint8_t timer_num, uint32_t period, uint8_t match_enable, uint8_t cap_enabled);
|
||||
void setMatch_timer16PWM (uint8_t timer_num, uint8_t match_nr, uint32_t value);
|
||||
|
||||
#endif /* end __TIMER16_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
58
demos/bsp/lpc13uxx/inc/timer32.h
Normal file
58
demos/bsp/lpc13uxx/inc/timer32.h
Normal file
@ -0,0 +1,58 @@
|
||||
/****************************************************************************
|
||||
* $Id:: timer32.h 7146 2011-04-19 19:48:01Z nxp28548 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for 32-bit timer
|
||||
* configuration.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __TIMER32_H
|
||||
#define __TIMER32_H
|
||||
|
||||
/* The test is either MAT_OUT or CAP_IN. Default is CAP_IN. */
|
||||
#ifndef TIMER_MATCH
|
||||
#define TIMER_MATCH 0
|
||||
#endif//TIMER_MATCH
|
||||
|
||||
#define EMC0 4
|
||||
#define EMC1 6
|
||||
#define EMC2 8
|
||||
#define EMC3 10
|
||||
|
||||
#define MATCH0 (1<<0)
|
||||
#define MATCH1 (1<<1)
|
||||
#define MATCH2 (1<<2)
|
||||
#define MATCH3 (1<<3)
|
||||
|
||||
#ifndef TIME_INTERVAL
|
||||
#define TIME_INTERVAL (SystemCoreClock/100 - 1)
|
||||
#endif
|
||||
|
||||
void delay32Ms(uint8_t timer_num, uint32_t delayInMs);
|
||||
void CT32B0_IRQHandler(void);
|
||||
void CT32B1_IRQHandler(void);
|
||||
void enable_timer32(uint8_t timer_num);
|
||||
void disable_timer32(uint8_t timer_num);
|
||||
void reset_timer32(uint8_t timer_num);
|
||||
void set_timer32_capture(uint8_t timer_num, uint8_t location );
|
||||
void set_timer32_match(uint8_t timer_num, uint8_t match_enable, uint8_t location);
|
||||
void init_timer32(uint8_t timer_num, uint32_t timerInterval);
|
||||
void init_timer32PWM(uint8_t timer_num, uint32_t period, uint8_t match_enable);
|
||||
void setMatch_timer32PWM (uint8_t timer_num, uint8_t match_nr, uint32_t value);
|
||||
|
||||
#endif /* end __TIMER32_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
52
demos/bsp/lpc13uxx/inc/type.h
Normal file
52
demos/bsp/lpc13uxx/inc/type.h
Normal file
@ -0,0 +1,52 @@
|
||||
/****************************************************************************
|
||||
* $Id:: type.h 6172 2011-01-13 18:22:51Z usb00423 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains different type definition.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __TYPE_H__
|
||||
#define __TYPE_H__
|
||||
|
||||
#if defined (__GNUC__)
|
||||
#include <stdint.h>
|
||||
|
||||
#else
|
||||
/* exact-width signed integer types */
|
||||
typedef signed char int8_t;
|
||||
typedef signed short int int16_t;
|
||||
typedef signed int int32_t;
|
||||
typedef signed __int64 int64_t;
|
||||
|
||||
/* exact-width unsigned integer types */
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short int uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
typedef unsigned __int64 uint64_t;
|
||||
#endif
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL ((void *)0)
|
||||
#endif
|
||||
|
||||
#ifndef FALSE
|
||||
#define FALSE (0)
|
||||
#endif
|
||||
|
||||
#ifndef TRUE
|
||||
#define TRUE (1)
|
||||
#endif
|
||||
|
||||
#endif /* __TYPE_H__ */
|
72
demos/bsp/lpc13uxx/inc/uart.h
Normal file
72
demos/bsp/lpc13uxx/inc/uart.h
Normal file
@ -0,0 +1,72 @@
|
||||
/****************************************************************************
|
||||
* $Id:: uart.h 6172 2011-01-13 18:22:51Z usb00423 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for UART configuration.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __UART_H
|
||||
#define __UART_H
|
||||
|
||||
#define AUTOBAUD_ENABLE 0
|
||||
#define FDR_CALIBRATION 0
|
||||
#define RS485_ENABLED 0
|
||||
#define TX_INTERRUPT 0 /* 0 if TX uses polling, 1 interrupt driven. */
|
||||
#define MODEM_TEST 0
|
||||
|
||||
#define IER_RBR (0x01<<0)
|
||||
#define IER_THRE (0x01<<1)
|
||||
#define IER_RLS (0x01<<2)
|
||||
#define IER_ABEO (0x01<<8)
|
||||
#define IER_ABTO (0x01<<9)
|
||||
|
||||
#define IIR_PEND 0x01
|
||||
#define IIR_RLS 0x03
|
||||
#define IIR_RDA 0x02
|
||||
#define IIR_CTI 0x06
|
||||
#define IIR_THRE 0x01
|
||||
#define IIR_ABEO (0x01<<8)
|
||||
#define IIR_ABTO (0x01<<9)
|
||||
|
||||
#define LSR_RDR (0x01<<0)
|
||||
#define LSR_OE (0x01<<1)
|
||||
#define LSR_PE (0x01<<2)
|
||||
#define LSR_FE (0x01<<3)
|
||||
#define LSR_BI (0x01<<4)
|
||||
#define LSR_THRE (0x01<<5)
|
||||
#define LSR_TEMT (0x01<<6)
|
||||
#define LSR_RXFE (0x01<<7)
|
||||
|
||||
#define BUFSIZE 0x40
|
||||
|
||||
/* RS485 mode definition. */
|
||||
#define RS485_NMMEN (0x1<<0)
|
||||
#define RS485_RXDIS (0x1<<1)
|
||||
#define RS485_AADEN (0x1<<2)
|
||||
#define RS485_SEL (0x1<<3)
|
||||
#define RS485_DCTRL (0x1<<4)
|
||||
#define RS485_OINV (0x1<<5)
|
||||
|
||||
void ModemInit( void );
|
||||
void UARTInit(uint32_t Baudrate);
|
||||
void USART_IRQHandler(void);
|
||||
void UARTSend(uint8_t *BufferPtr, uint32_t Length);
|
||||
void print_string( uint8_t *str_ptr );
|
||||
uint8_t get_key( void );
|
||||
|
||||
#endif /* end __UART_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
44
demos/bsp/lpc13uxx/inc/usart.h
Normal file
44
demos/bsp/lpc13uxx/inc/usart.h
Normal file
@ -0,0 +1,44 @@
|
||||
/****************************************************************************
|
||||
* $Id:: usart.h 6172 2011-01-13 18:22:51Z usb00423 $
|
||||
* Project: NXP LPC13Uxx software example
|
||||
*
|
||||
* Description:
|
||||
* This file contains definition and prototype for UART configuration.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
****************************************************************************/
|
||||
#ifndef __USART_H
|
||||
#define __USART_H
|
||||
|
||||
/* Synchronous mode control register definition. */
|
||||
#define SYNC_ON (0x1<<0)
|
||||
#define SYNC_OFF (0x0<<0)
|
||||
|
||||
#define SYNC_MASTER (0x1<<1)
|
||||
#define SYNC_SLAVE (0x0<<1)
|
||||
|
||||
#define SYNC_RE (0x0<<2)
|
||||
#define SYNC_FE (0x1<<2)
|
||||
|
||||
#define SYNC_CONT_CLK_EN (0x1<<4)
|
||||
#define SYNC_CONT_CLK_DIS (0x0<<4)
|
||||
|
||||
#define SYNC_STARTSTOPOFF (0x1<<5)
|
||||
#define SYNC_STARTSTOPON (0x0<<5)
|
||||
|
||||
#define SYNC_CON_CLK_CLR (0x1<<6)
|
||||
|
||||
#endif /* end __USART_H */
|
||||
/*****************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
33
demos/bsp/lpc13uxx/src/Serial.c
Normal file
33
demos/bsp/lpc13uxx/src/Serial.c
Normal file
@ -0,0 +1,33 @@
|
||||
/******************************************************************************/
|
||||
/* SERIAL.C: Low Level Serial Routines */
|
||||
/******************************************************************************/
|
||||
/* This file is part of the uVision/ARM development tools. */
|
||||
/* Copyright (c) 2005-2006 Keil Software. All rights reserved. */
|
||||
/* This software may only be used under the terms of a valid, current, */
|
||||
/* end user licence from KEIL for a compatible version of KEIL software */
|
||||
/* development tools. Nothing else gives you the right to use this software. */
|
||||
/******************************************************************************/
|
||||
|
||||
#include "LPC13Uxx.h" /* LPC13Uxx definitions */
|
||||
#include "uart.h"
|
||||
|
||||
#define CR 0x0D
|
||||
|
||||
/* implementation of putchar (also used by printf function to output data) */
|
||||
int sendchar (int ch) { /* Write character to Serial Port */
|
||||
|
||||
|
||||
if (ch == '\n') {
|
||||
while (!(LPC_USART->LSR & 0x20));
|
||||
LPC_USART->THR = CR; /* output CR */
|
||||
}
|
||||
while (!(LPC_USART->LSR & 0x20));
|
||||
return (LPC_USART->THR = ch);
|
||||
}
|
||||
|
||||
|
||||
int getkey (void) { /* Read character from Serial Port */
|
||||
|
||||
while (!(LPC_USART->LSR & 0x01));
|
||||
return (LPC_USART->RBR);
|
||||
}
|
69
demos/bsp/lpc13uxx/src/clkconfig.c
Normal file
69
demos/bsp/lpc13uxx/src/clkconfig.c
Normal file
@ -0,0 +1,69 @@
|
||||
/****************************************************************************
|
||||
* $Id:: clkconfig.c 6874 2011-03-22 01:58:31Z usb00423 $
|
||||
* Project: NXP LPC13Uxx Clock Configuration example
|
||||
*
|
||||
* Description:
|
||||
* This file contains clock configuration code example which include
|
||||
* watchdog setup and debug clock out setup.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors'
|
||||
* relevant copyright in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
****************************************************************************/
|
||||
#include "LPC13Uxx.h"
|
||||
#include "clkconfig.h"
|
||||
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: WDT_CLK_Setup
|
||||
**
|
||||
** Descriptions: Configure WDT clock.
|
||||
** parameters: clock source: irc_osc(0), main_clk(1), wdt_osc(2).
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void WDT_CLK_Setup ( uint32_t clksrc )
|
||||
{
|
||||
/* Freq = 0.5Mhz, div_sel is 0x1F, divided by 64. WDT_OSC should be 7.8125khz */
|
||||
LPC_SYSCON->WDTOSCCTRL = (0x1<<5)|0x1F;
|
||||
LPC_SYSCON->PDRUNCFG &= ~(0x1<<6); /* Let WDT clock run */
|
||||
|
||||
/* Enables clock for WDT */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<15);
|
||||
LPC_WWDT->CLKSEL = clksrc; /* Select clock source */
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: CLKOUT_Setup
|
||||
**
|
||||
** Descriptions: Configure CLKOUT for reference clock check.
|
||||
** parameters: clock source: irc_osc(0), sys_osc(1), wdt_osc(2),
|
||||
** main_clk(3).
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void CLKOUT_Setup ( uint32_t clksrc )
|
||||
{
|
||||
/* debug PLL after configuration. */
|
||||
LPC_SYSCON->CLKOUTSEL = clksrc; /* Select Main clock */
|
||||
LPC_SYSCON->CLKOUTDIV = 1; /* Divided by 1 */
|
||||
return;
|
||||
}
|
||||
|
838
demos/bsp/lpc13uxx/src/gpio.c
Normal file
838
demos/bsp/lpc13uxx/src/gpio.c
Normal file
@ -0,0 +1,838 @@
|
||||
/****************************************************************************
|
||||
* $Id:: gpio.c 6874 2011-03-22 01:58:31Z usb00423 $
|
||||
* Project: NXP LPC13Uxx GPIO example
|
||||
*
|
||||
* Description:
|
||||
* This file contains GPIO code example which include GPIO
|
||||
* initialization, GPIO interrupt handler, and related APIs for
|
||||
* GPIO access.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors'
|
||||
* relevant copyright in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
****************************************************************************/
|
||||
#include "LPC13Uxx.h" /* LPC13Uxx Peripheral Registers */
|
||||
#include "gpio.h"
|
||||
|
||||
volatile uint32_t pin_int0_counter = 0;
|
||||
volatile uint32_t pin_int1_counter = 0;
|
||||
volatile uint32_t pin_int2_counter = 0;
|
||||
volatile uint32_t pin_int3_counter = 0;
|
||||
volatile uint32_t pin_int4_counter = 0;
|
||||
volatile uint32_t pin_int5_counter = 0;
|
||||
volatile uint32_t pin_int6_counter = 0;
|
||||
volatile uint32_t pin_int7_counter = 0;
|
||||
volatile uint32_t gint0_counter = 0;
|
||||
volatile uint32_t gint1_counter = 0;
|
||||
volatile uint32_t pin_int0_level_counter = 0;
|
||||
volatile uint32_t pin_int0_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int0_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int1_level_counter = 0;
|
||||
volatile uint32_t pin_int1_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int1_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int2_level_counter = 0;
|
||||
volatile uint32_t pin_int2_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int2_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int3_level_counter = 0;
|
||||
volatile uint32_t pin_int3_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int3_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int4_level_counter = 0;
|
||||
volatile uint32_t pin_int4_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int4_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int5_level_counter = 0;
|
||||
volatile uint32_t pin_int5_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int5_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int6_level_counter = 0;
|
||||
volatile uint32_t pin_int6_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int6_falling_edge_counter = 0;
|
||||
volatile uint32_t pin_int7_level_counter = 0;
|
||||
volatile uint32_t pin_int7_rising_edge_counter = 0;
|
||||
volatile uint32_t pin_int7_falling_edge_counter = 0;
|
||||
volatile uint32_t gint0_level_counter = 0;
|
||||
volatile uint32_t gint0_edge_counter = 0;
|
||||
volatile uint32_t gint1_level_counter = 0;
|
||||
volatile uint32_t gint1_edge_counter = 0;
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT0_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT0_IRQHandler(void)
|
||||
{
|
||||
pin_int0_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<0) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<0) )
|
||||
{
|
||||
pin_int0_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<0) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<0) ) )
|
||||
{
|
||||
pin_int0_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<0;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<0) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<0) ) )
|
||||
{
|
||||
pin_int0_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<0;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<0;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT1_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT1_IRQHandler(void)
|
||||
{
|
||||
pin_int1_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<1) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<1) )
|
||||
{
|
||||
pin_int1_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<1) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<1) ) )
|
||||
{
|
||||
pin_int1_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<1;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<1) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<1) ) )
|
||||
{
|
||||
pin_int1_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<1;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<1;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT2_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT2_IRQHandler(void)
|
||||
{
|
||||
pin_int2_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<2) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<2) )
|
||||
{
|
||||
pin_int2_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<2) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<2) ) )
|
||||
{
|
||||
pin_int2_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<2;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<2) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<2) ) )
|
||||
{
|
||||
pin_int2_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<2;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<2;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT3_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT3_IRQHandler(void)
|
||||
{
|
||||
pin_int3_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<3) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<3) )
|
||||
{
|
||||
pin_int3_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<3) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<3) ) )
|
||||
{
|
||||
pin_int3_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<3;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<3) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<3) ) )
|
||||
{
|
||||
pin_int3_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<3;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<3;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT4_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT4_IRQHandler(void)
|
||||
{
|
||||
pin_int4_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<4) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<4) )
|
||||
{
|
||||
pin_int4_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<4) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<4) ) )
|
||||
{
|
||||
pin_int4_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<4;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<4) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<4) ) )
|
||||
{
|
||||
pin_int4_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<4;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<4;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT5_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT5_IRQHandler(void)
|
||||
{
|
||||
pin_int5_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<5) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<5) )
|
||||
{
|
||||
pin_int5_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<5) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<5) ) )
|
||||
{
|
||||
pin_int5_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<5;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<5) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<5) ) )
|
||||
{
|
||||
pin_int5_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<5;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<5;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT6_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT6_IRQHandler(void)
|
||||
{
|
||||
pin_int6_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<6) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<6) )
|
||||
{
|
||||
pin_int6_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<6) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<6) ) )
|
||||
{
|
||||
pin_int6_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<6;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<6) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<6) ) )
|
||||
{
|
||||
pin_int6_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<6;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<6;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: PIN_INT7_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void PIN_INT7_IRQHandler(void)
|
||||
{
|
||||
pin_int7_counter++;
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<7) )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->ISEL & (0x1<<7) )
|
||||
{
|
||||
pin_int7_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( ( LPC_GPIO_PIN_INT->RISE & (0x1<<7) ) && ( LPC_GPIO_PIN_INT->IENR & (0x1<<7) ) )
|
||||
{
|
||||
pin_int7_rising_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->RISE = 0x1<<7;
|
||||
}
|
||||
if ( ( LPC_GPIO_PIN_INT->FALL & (0x1<<7) ) && ( LPC_GPIO_PIN_INT->IENF & (0x1<<7) ) )
|
||||
{
|
||||
pin_int7_falling_edge_counter++;
|
||||
LPC_GPIO_PIN_INT->FALL = 0x1<<7;
|
||||
}
|
||||
LPC_GPIO_PIN_INT->IST = 0x1<<7;
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GINT0_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GINT0_IRQHandler(void)
|
||||
{
|
||||
gint0_counter++;
|
||||
if ( LPC_GPIO_GROUP_INT0->CTRL & (0x1<<0) )
|
||||
{
|
||||
if ( LPC_GPIO_GROUP_INT0->CTRL & (0x1<<2) )
|
||||
{
|
||||
gint0_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
gint0_edge_counter++;
|
||||
}
|
||||
LPC_GPIO_GROUP_INT0->CTRL |= (0x1<<0);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GINT1_IRQHandler
|
||||
**
|
||||
** Descriptions: Use one GPIO pin as interrupt source
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GINT1_IRQHandler(void)
|
||||
{
|
||||
gint1_counter++;
|
||||
if ( LPC_GPIO_GROUP_INT1->CTRL & (0x1<<0) )
|
||||
{
|
||||
if ( LPC_GPIO_GROUP_INT1->CTRL & (0x1<<2) )
|
||||
{
|
||||
gint1_level_counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
gint1_edge_counter++;
|
||||
}
|
||||
LPC_GPIO_GROUP_INT1->CTRL |= (0x1<<0);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOInit
|
||||
**
|
||||
** Descriptions: Initialize GPIO, install the
|
||||
** GPIO interrupt handler
|
||||
**
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: true or false, return false if the VIC table
|
||||
** is full and GPIO interrupt handler can be
|
||||
** installed.
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOInit( void )
|
||||
{
|
||||
/* Enable AHB clock to the GPIO domain. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<6);
|
||||
|
||||
/* Enable AHB clock to the PinInt, GroupedInt domain. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<19) | (1<<23) | (1<<24));
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOSetPinInterrupt
|
||||
**
|
||||
** Descriptions: Set interrupt sense, event, etc.
|
||||
** sense: edge or level, 0 is edge, 1 is level
|
||||
** event/polarity: 0 is active low/falling, 1 is high/rising.
|
||||
**
|
||||
** parameters: channel #, port #, bit position, sense, event(polarity)
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOSetPinInterrupt( uint32_t channelNum, uint32_t portNum, uint32_t bitPosi,
|
||||
uint32_t sense, uint32_t event )
|
||||
{
|
||||
switch ( channelNum )
|
||||
{
|
||||
case CHANNEL0:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[0] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[0] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT0_IRQn);
|
||||
break;
|
||||
case CHANNEL1:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[1] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[1] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT1_IRQn);
|
||||
break;
|
||||
case CHANNEL2:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[2] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[2] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT2_IRQn);
|
||||
break;
|
||||
case CHANNEL3:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[3] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[3] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT3_IRQn);
|
||||
break;
|
||||
case CHANNEL4:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[4] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[4] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT4_IRQn);
|
||||
break;
|
||||
case CHANNEL5:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[5] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[5] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT5_IRQn);
|
||||
break;
|
||||
case CHANNEL6:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[6] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[6] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT6_IRQn);
|
||||
break;
|
||||
case CHANNEL7:
|
||||
if ( portNum )
|
||||
{
|
||||
LPC_SYSCON->PINSEL[7] = bitPosi + 24;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->PINSEL[7] = bitPosi;
|
||||
}
|
||||
NVIC_EnableIRQ(PIN_INT7_IRQn);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if ( sense == 0 )
|
||||
{
|
||||
LPC_GPIO_PIN_INT->ISEL &= ~(0x1<<channelNum); /* Edge trigger */
|
||||
if ( event == 0 )
|
||||
{
|
||||
LPC_GPIO_PIN_INT->IENF |= (0x1<<channelNum); /* faling edge */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->IENR |= (0x1<<channelNum); /* Rising edge */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->ISEL |= (0x1<<channelNum); /* Level trigger. */
|
||||
LPC_GPIO_PIN_INT->IENR |= (0x1<<channelNum); /* Level enable */
|
||||
if ( event == 0 )
|
||||
{
|
||||
LPC_GPIO_PIN_INT->IENF &= ~(0x1<<channelNum); /* active-low */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->IENF |= (0x1<<channelNum); /* active-high */
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOPinIntEnable
|
||||
**
|
||||
** Descriptions: Enable Interrupt
|
||||
**
|
||||
** parameters: channel num, event(0 is falling edge, 1 is rising edge)
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOPinIntEnable( uint32_t channelNum, uint32_t event )
|
||||
{
|
||||
if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) )
|
||||
{
|
||||
if ( event == 0 )
|
||||
{
|
||||
LPC_GPIO_PIN_INT->SIENF |= (0x1<<channelNum); /* faling edge */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->SIENR |= (0x1<<channelNum); /* Rising edge */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->SIENR |= (0x1<<channelNum); /* Level */
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOPinIntDisable
|
||||
**
|
||||
** Descriptions: Disable Interrupt
|
||||
**
|
||||
** parameters: channel num, event(0 is falling edge, 1 is rising edge)
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOPinIntDisable( uint32_t channelNum, uint32_t event )
|
||||
{
|
||||
if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) )
|
||||
{
|
||||
if ( event == 0 )
|
||||
{
|
||||
LPC_GPIO_PIN_INT->CIENF |= (0x1<<channelNum); /* faling edge */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->CIENR |= (0x1<<channelNum); /* Rising edge */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_PIN_INT->CIENR |= (0x1<<channelNum); /* Level */
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOPinIntStatus
|
||||
**
|
||||
** Descriptions: Get Interrupt status
|
||||
**
|
||||
** parameters: channel num
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
uint32_t GPIOPinIntStatus( uint32_t channelNum )
|
||||
{
|
||||
if ( LPC_GPIO_PIN_INT->IST & (0x1<<channelNum) )
|
||||
{
|
||||
return( 1 );
|
||||
}
|
||||
else
|
||||
{
|
||||
return( 0 );
|
||||
}
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOPinIntClear
|
||||
**
|
||||
** Descriptions: Clear Interrupt
|
||||
**
|
||||
** parameters: channel num
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOPinIntClear( uint32_t channelNum )
|
||||
{
|
||||
if ( !( LPC_GPIO_PIN_INT->ISEL & (0x1<<channelNum) ) )
|
||||
{
|
||||
LPC_GPIO_PIN_INT->IST = (1<<channelNum);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOSetGroupedInterrupt
|
||||
**
|
||||
** Descriptions: Set interrupt logic, sense, eventPattern, etc.
|
||||
** logic: AND or OR, 0 is OR, 1 is AND
|
||||
** sensePattern: edge or level, 0 is edge, 1 is level
|
||||
** event/polarity: 0 is active low/falling, 1 is high/rising.
|
||||
**
|
||||
** parameters: group #, bit pattern, logic, sense, event(polarity) pattern
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOSetGroupedInterrupt( uint32_t groupNum, uint32_t *bitPattern, uint32_t logic,
|
||||
uint32_t sense, uint32_t *eventPattern )
|
||||
{
|
||||
switch ( groupNum )
|
||||
{
|
||||
case GROUP0:
|
||||
if ( sense == 0 )
|
||||
{
|
||||
LPC_GPIO_GROUP_INT0->CTRL &= ~(0x1<<2); /* Edge trigger */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_GROUP_INT0->CTRL |= (0x1<<2); /* Level trigger. */
|
||||
}
|
||||
if ( logic == 0 )
|
||||
{
|
||||
LPC_GPIO_GROUP_INT0->CTRL &= ~(0x1<<1); /* OR */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_GROUP_INT0->CTRL |= (0x1<<1); /* AND */
|
||||
}
|
||||
LPC_GPIO_GROUP_INT0->PORT_POL[0] = *((uint32_t *)(eventPattern + 0));
|
||||
LPC_GPIO_GROUP_INT0->PORT_POL[1] = *((uint32_t *)(eventPattern + 1));
|
||||
LPC_GPIO_GROUP_INT0->PORT_ENA[0] = *((uint32_t *)(bitPattern + 0));
|
||||
LPC_GPIO_GROUP_INT0->PORT_ENA[1] = *((uint32_t *)(bitPattern + 1));
|
||||
/* as soon as enabled, an edge may be generated */
|
||||
/* clear interrupt flag and NVIC pending interrupt to */
|
||||
/* workaround the potential edge generated as enabled */
|
||||
LPC_GPIO_GROUP_INT0->CTRL |= (1<<0);
|
||||
NVIC_ClearPendingIRQ(GINT0_IRQn);
|
||||
NVIC_EnableIRQ(GINT0_IRQn);
|
||||
break;
|
||||
case GROUP1:
|
||||
if ( sense == 0 )
|
||||
{
|
||||
LPC_GPIO_GROUP_INT1->CTRL &= ~(0x1<<2); /* Edge trigger */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_GROUP_INT1->CTRL |= (0x1<<2); /* Level trigger. */
|
||||
}
|
||||
if ( logic == 0 )
|
||||
{
|
||||
LPC_GPIO_GROUP_INT1->CTRL &= ~(0x1<<1); /* OR */
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO_GROUP_INT1->CTRL |= (0x1<<1); /* AND */
|
||||
}
|
||||
LPC_GPIO_GROUP_INT1->PORT_POL[0] = *((uint32_t *)(eventPattern + 0));
|
||||
LPC_GPIO_GROUP_INT1->PORT_POL[1] = *((uint32_t *)(eventPattern + 1));
|
||||
LPC_GPIO_GROUP_INT1->PORT_ENA[0] = *((uint32_t *)(bitPattern + 0));
|
||||
LPC_GPIO_GROUP_INT1->PORT_ENA[1] = *((uint32_t *)(bitPattern + 1));
|
||||
/* as soon as enabled, an edge may be generated */
|
||||
/* clear interrupt flag and NVIC pending interrupt to */
|
||||
/* workaround the potential edge generated as enabled */
|
||||
LPC_GPIO_GROUP_INT1->CTRL |= (1<<0);
|
||||
NVIC_ClearPendingIRQ(GINT1_IRQn);
|
||||
NVIC_EnableIRQ(GINT1_IRQn);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOGetPinValue
|
||||
**
|
||||
** Descriptions: Read Current state of port pin, PIN register value
|
||||
**
|
||||
** parameters: port num, bit position
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
uint32_t GPIOGetPinValue( uint32_t portNum, uint32_t bitPosi )
|
||||
{
|
||||
uint32_t regVal = 0;
|
||||
|
||||
if( bitPosi < 0x20 )
|
||||
{
|
||||
if ( LPC_GPIO->PIN[portNum] & (0x1<<bitPosi) )
|
||||
{
|
||||
regVal = 1;
|
||||
}
|
||||
}
|
||||
else if( bitPosi == 0xFF )
|
||||
{
|
||||
regVal = LPC_GPIO->PIN[portNum];
|
||||
}
|
||||
return ( regVal );
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOSetBitValue
|
||||
**
|
||||
** Descriptions: Set/clear a bit in a specific position
|
||||
**
|
||||
** parameters: port num, bit position, bit value
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOSetBitValue( uint32_t portNum, uint32_t bitPosi, uint32_t bitVal )
|
||||
{
|
||||
if ( bitVal )
|
||||
{
|
||||
LPC_GPIO->SET[portNum] = 1<<bitPosi;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO->CLR[portNum] = 1<<bitPosi;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: GPIOSetDir
|
||||
**
|
||||
** Descriptions: Set the direction in GPIO port
|
||||
**
|
||||
** parameters: portNum, bit position, direction (1 out, 0 input)
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void GPIOSetDir( uint32_t portNum, uint32_t bitPosi, uint32_t dir )
|
||||
{
|
||||
if( dir )
|
||||
{
|
||||
LPC_GPIO->DIR[portNum] |= (1<<bitPosi);
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_GPIO->DIR[portNum] &= ~(1<<bitPosi);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
95
demos/bsp/lpc13uxx/src/nmi.c
Normal file
95
demos/bsp/lpc13uxx/src/nmi.c
Normal file
@ -0,0 +1,95 @@
|
||||
/****************************************************************************
|
||||
* $Id:: nmi.c 7227 2011-04-27 20:20:38Z usb01267 $
|
||||
* Project: NXP LPC13Uxx NMI interrupt example
|
||||
*
|
||||
* Description:
|
||||
* This file contains NMI interrupt handler code example.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors'
|
||||
* relevant copyright in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
****************************************************************************/
|
||||
#include "LPC13Uxx.h"
|
||||
#include "nmi.h"
|
||||
|
||||
#if NMI_ENABLED
|
||||
volatile uint32_t NMI_Counter[MAX_NMI_NUM];
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: NMI_Handler
|
||||
**
|
||||
** Descriptions: NMI interrupt handler
|
||||
** parameters: None
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void NMI_Handler( void )
|
||||
{
|
||||
uint32_t regVal;
|
||||
|
||||
regVal = LPC_SYSCON->NMISRC;
|
||||
regVal &= ~0x80000000;
|
||||
if ( regVal < MAX_NMI_NUM )
|
||||
{
|
||||
if ( regVal == CT16B0_IRQn )
|
||||
{
|
||||
/* Use TIMER16_0_IRQHandler as example for real application. */
|
||||
LPC_CT16B0->IR = 0xFF; /* Clear timer16_0 interrupt */
|
||||
}
|
||||
else if ( regVal == CT16B1_IRQn )
|
||||
{
|
||||
/* Use TIMER16_1_IRQHandler as example for real application. */
|
||||
LPC_CT16B1->IR = 0xFF; /* Clear timer16_1 interrupt */
|
||||
}
|
||||
else if ( regVal == CT32B0_IRQn )
|
||||
{
|
||||
/* Use TIMER32_0_IRQHandler as example for real application. */
|
||||
LPC_CT32B0->IR = 0xFF; /* Clear timer32_0 interrupt */
|
||||
}
|
||||
else if ( regVal == CT32B1_IRQn )
|
||||
{
|
||||
/* Use TIMER32_0_IRQHandler as example for real application. */
|
||||
LPC_CT32B1->IR = 0xFF; /* Clear timer32_1 interrupt */
|
||||
}
|
||||
NMI_Counter[regVal]++;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: NMI_Init
|
||||
**
|
||||
** Descriptions: NMI initialization
|
||||
** parameters: NMI number
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void NMI_Init( uint32_t NMI_num )
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
for ( i = 0; i < MAX_NMI_NUM; i++ )
|
||||
{
|
||||
NMI_Counter[i] = 0x0;
|
||||
}
|
||||
LPC_SYSCON->NMISRC = 0x80000000|NMI_num;
|
||||
return;
|
||||
}
|
||||
|
||||
#endif
|
628
demos/bsp/lpc13uxx/src/timer16.c
Normal file
628
demos/bsp/lpc13uxx/src/timer16.c
Normal file
@ -0,0 +1,628 @@
|
||||
/****************************************************************************
|
||||
* $Id:: timer16.c 6950 2011-03-23 22:09:44Z usb00423 $
|
||||
* Project: NXP LPC13Uxx 16-bit timer example
|
||||
*
|
||||
* Description:
|
||||
* This file contains 16-bit timer code example which include timer
|
||||
* initialization, timer interrupt handler, and related APIs for
|
||||
* timer setup.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors'
|
||||
* relevant copyright in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
****************************************************************************/
|
||||
#include "LPC13Uxx.h"
|
||||
#include "timer16.h"
|
||||
#include "nmi.h"
|
||||
|
||||
volatile uint32_t timer16_0_counter[4] = {0,0,0,0};
|
||||
volatile uint32_t timer16_1_counter[4] = {0,0,0,0};
|
||||
volatile uint32_t timer16_0_capture[4] = {0,0,0,0};
|
||||
volatile uint32_t timer16_1_capture[4] = {0,0,0,0};
|
||||
volatile uint32_t timer16_0_period = 0;
|
||||
volatile uint32_t timer16_1_period = 0;
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: delayMs
|
||||
**
|
||||
** Descriptions: Start the timer delay in milo seconds
|
||||
** until elapsed
|
||||
**
|
||||
** parameters: timer number, Delay value in milo second
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void delayMs(uint8_t timer_num, uint32_t delayInMs)
|
||||
{
|
||||
if (timer_num == 0)
|
||||
{
|
||||
/*
|
||||
* setup timer #0 for delay
|
||||
*/
|
||||
LPC_CT16B0->TCR = 0x02; /* reset timer */
|
||||
LPC_CT16B0->PR = 0x00; /* set prescaler to zero */
|
||||
LPC_CT16B0->MR0 = delayInMs * (SystemCoreClock / 1000);
|
||||
LPC_CT16B0->IR = 0xff; /* reset all interrrupts */
|
||||
LPC_CT16B0->MCR = 0x04; /* stop timer on match */
|
||||
LPC_CT16B0->TCR = 0x01; /* start timer */
|
||||
/* wait until delay time has elapsed */
|
||||
while (LPC_CT16B0->TCR & 0x01);
|
||||
}
|
||||
else if (timer_num == 1)
|
||||
{
|
||||
/*
|
||||
* setup timer #1 for delay
|
||||
*/
|
||||
LPC_CT16B1->TCR = 0x02; /* reset timer */
|
||||
LPC_CT16B1->PR = 0x00; /* set prescaler to zero */
|
||||
LPC_CT16B1->MR0 = delayInMs * (SystemCoreClock / 1000);
|
||||
LPC_CT16B1->IR = 0xff; /* reset all interrrupts */
|
||||
LPC_CT16B1->MCR = 0x04; /* stop timer on match */
|
||||
LPC_CT16B1->TCR = 0x01; /* start timer */
|
||||
/* wait until delay time has elapsed */
|
||||
while (LPC_CT16B1->TCR & 0x01);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: CT16B0_IRQHandler
|
||||
**
|
||||
** Descriptions: Timer/CounterX and CaptureX interrupt handler
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void CT16B0_IRQHandler(void)
|
||||
{
|
||||
if ( LPC_CT16B0->IR & (0x1<<0) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<0; /* clear interrupt flag */
|
||||
timer16_0_counter[0]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<1) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<1; /* clear interrupt flag */
|
||||
timer16_0_counter[1]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<2) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<2; /* clear interrupt flag */
|
||||
timer16_0_counter[2]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<3) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<3; /* clear interrupt flag */
|
||||
timer16_0_counter[3]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<4) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<4; /* clear interrupt flag */
|
||||
timer16_0_capture[0]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<5) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<5; /* clear interrupt flag */
|
||||
timer16_0_capture[1]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<6) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<6; /* clear interrupt flag */
|
||||
timer16_0_capture[2]++;
|
||||
}
|
||||
if ( LPC_CT16B0->IR & (0x1<<7) )
|
||||
{
|
||||
LPC_CT16B0->IR = 0x1<<7; /* clear interrupt flag */
|
||||
timer16_0_capture[3]++;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: CT16B1_IRQHandler
|
||||
**
|
||||
** Descriptions: Timer/CounterX and CaptureX interrupt handler
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void CT16B1_IRQHandler(void)
|
||||
{
|
||||
if ( LPC_CT16B1->IR & (0x1<<0) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<0; /* clear interrupt flag */
|
||||
timer16_1_counter[0]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<1) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<1; /* clear interrupt flag */
|
||||
timer16_1_counter[1]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<2) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<2; /* clear interrupt flag */
|
||||
timer16_1_counter[2]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<3) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<3; /* clear interrupt flag */
|
||||
timer16_1_counter[3]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<4) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<4; /* clear interrupt flag */
|
||||
timer16_1_capture[0]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<5) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<5; /* clear interrupt flag */
|
||||
timer16_1_capture[1]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<6) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<6; /* clear interrupt flag */
|
||||
timer16_1_capture[2]++;
|
||||
}
|
||||
if ( LPC_CT16B1->IR & (0x1<<7) )
|
||||
{
|
||||
LPC_CT16B1->IR = 0x1<<7; /* clear interrupt flag */
|
||||
timer16_1_capture[3]++;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: enable_timer
|
||||
**
|
||||
** Descriptions: Enable timer
|
||||
**
|
||||
** parameters: timer number: 0 or 1
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void enable_timer16(uint8_t timer_num)
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
LPC_CT16B0->TCR = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_CT16B1->TCR = 1;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: disable_timer
|
||||
**
|
||||
** Descriptions: Disable timer
|
||||
**
|
||||
** parameters: timer number: 0 or 1
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void disable_timer16(uint8_t timer_num)
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
LPC_CT16B0->TCR = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_CT16B1->TCR = 0;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: reset_timer
|
||||
**
|
||||
** Descriptions: Reset timer
|
||||
**
|
||||
** parameters: timer number: 0 or 1
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void reset_timer16(uint8_t timer_num)
|
||||
{
|
||||
uint32_t regVal;
|
||||
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
regVal = LPC_CT16B0->TCR;
|
||||
regVal |= 0x02;
|
||||
LPC_CT16B0->TCR = regVal;
|
||||
}
|
||||
else
|
||||
{
|
||||
regVal = LPC_CT16B1->TCR;
|
||||
regVal |= 0x02;
|
||||
LPC_CT16B1->TCR = regVal;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: Set_timer_capture
|
||||
**
|
||||
** Descriptions: set timer capture based on LOC number.
|
||||
**
|
||||
** parameters: timer number and location number
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void set_timer16_capture(uint8_t timer_num, uint8_t location )
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
/* Timer0_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_16 &= ~0x07;
|
||||
LPC_IOCON->PIO1_16 |= 0x02; /* Timer0_16 CAP0 */
|
||||
LPC_IOCON->PIO1_17 &= ~0x07;
|
||||
LPC_IOCON->PIO1_17 |= 0x01; /* Timer0_16 CAP2 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO0_2 &= ~0x07;
|
||||
LPC_IOCON->PIO0_2 |= 0x02; /* Timer0_16 CAP0 */
|
||||
}
|
||||
else
|
||||
{
|
||||
while ( 1 ); /* Fatal location number error */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Timer1_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_20 &= ~0x07; /* Timer1_16 I/O config */
|
||||
LPC_IOCON->PIO0_20 |= 0x01; /* Timer1_16 CAP0 */
|
||||
LPC_IOCON->PIO1_18 &= ~0x07;
|
||||
LPC_IOCON->PIO1_18 |= 0x01; /* Timer1_16 CAP1 */
|
||||
}
|
||||
else
|
||||
{
|
||||
while ( 1 ); /* Fatal location number error */
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: Set_timer_match
|
||||
**
|
||||
** Descriptions: set timer match based on LOC number.
|
||||
**
|
||||
** parameters: timer number, match enable, and location number
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void set_timer16_match(uint8_t timer_num, uint8_t match_enable, uint8_t location)
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
if ( match_enable & 0x01 )
|
||||
{
|
||||
/* Timer0_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_8 &= ~0x07;
|
||||
LPC_IOCON->PIO0_8 |= 0x02; /* Timer0_16 MAT0 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_13 &= ~0x07;
|
||||
LPC_IOCON->PIO1_13 |= 0x02; /* Timer0_16 MAT0 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x02 )
|
||||
{
|
||||
/* Timer0_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_9 &= ~0x07;
|
||||
LPC_IOCON->PIO0_9 |= 0x02; /* Timer0_16 MAT1 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_14 &= ~0x07;
|
||||
LPC_IOCON->PIO1_14 |= 0x02; /* Timer0_16 MAT1 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x04 )
|
||||
{
|
||||
/* Timer0_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
#ifdef __SWD_DISABLED
|
||||
LPC_IOCON->SWCLK_PIO0_10 &= ~0x07;
|
||||
LPC_IOCON->SWCLK_PIO0_10 |= 0x03; /* Timer0_16 MAT2 */
|
||||
#endif
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_15 &= ~0x07;
|
||||
LPC_IOCON->PIO1_15 |= 0x02; /* Timer0_16 MAT2 */
|
||||
}
|
||||
}
|
||||
}
|
||||
else if ( timer_num == 1 )
|
||||
{
|
||||
if ( match_enable & 0x01 )
|
||||
{
|
||||
/* Timer1_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_21 &= ~0x07;
|
||||
LPC_IOCON->PIO0_21 |= 0x01; /* Timer1_16 MAT0 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x02 )
|
||||
{
|
||||
/* Timer1_16 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_22 &= ~0x07;
|
||||
LPC_IOCON->PIO0_22 |= 0x02; /* Timer1_16 MAT1 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_23 &= ~0x07;
|
||||
LPC_IOCON->PIO1_23 |= 0x01; /* Timer1_16 MAT1 */
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: init_timer
|
||||
**
|
||||
** Descriptions: Initialize timer, set timer interval, reset timer,
|
||||
** install timer interrupt handler
|
||||
**
|
||||
** parameters: timer number and timer interval
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void init_timer16(uint8_t timer_num, uint32_t TimerInterval)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
/* Some of the I/O pins need to be clearfully planned if
|
||||
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7);
|
||||
|
||||
LPC_CT16B0->MR0 = TimerInterval;
|
||||
LPC_CT16B0->MR1 = TimerInterval;
|
||||
#if TIMER_MATCH
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer16_0_counter[i] = 0;
|
||||
}
|
||||
set_timer16_match(timer_num, 0x07, 0);
|
||||
LPC_CT16B0->EMR &= ~(0xFF<<4);
|
||||
LPC_CT16B0->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8));
|
||||
#else
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer16_0_capture[i] = 0;
|
||||
}
|
||||
set_timer16_capture(timer_num, 0);
|
||||
/* Capture 0 and 2 on rising edge, interrupt enable. */
|
||||
LPC_CT16B0->CCR = (0x5<<0)|(0x5<<6);
|
||||
#endif
|
||||
LPC_CT16B0->MCR = (0x3<<0)|(0x3<<3); /* Interrupt and Reset on MR0 and MR1 */
|
||||
|
||||
/* Enable the TIMER0 Interrupt */
|
||||
#if NMI_ENABLED
|
||||
NVIC_DisableIRQ(CT16B0_IRQn);
|
||||
NMI_Init( CT16B0_IRQn );
|
||||
#else
|
||||
NVIC_EnableIRQ(CT16B0_IRQn);
|
||||
#endif
|
||||
}
|
||||
else if ( timer_num == 1 )
|
||||
{
|
||||
/* Some of the I/O pins need to be clearfully planned if
|
||||
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<8);
|
||||
LPC_CT16B1->MR0 = TimerInterval;
|
||||
LPC_CT16B1->MR1 = TimerInterval;
|
||||
#if TIMER_MATCH
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer16_1_counter[i] = 0;
|
||||
}
|
||||
set_timer16_match(timer_num, 0x07, 0);
|
||||
LPC_CT16B1->EMR &= ~(0xFF<<4);
|
||||
LPC_CT16B1->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8));
|
||||
#else
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer16_1_capture[i] = 0;
|
||||
}
|
||||
set_timer16_capture(timer_num, 0);
|
||||
/* Capture 0 and 1 on rising edge, interrupt enable. */
|
||||
LPC_CT16B1->CCR = (0x5<<0)|(0x5<<3);
|
||||
#endif
|
||||
LPC_CT16B1->MCR = (0x3<<0)|(0x3<<3); /* Interrupt and Reset on MR0 and MR1 */
|
||||
|
||||
/* Enable the TIMER1 Interrupt */
|
||||
#if NMI_ENABLED
|
||||
NVIC_DisableIRQ(CT16B1_IRQn);
|
||||
NMI_Init( CT16B1_IRQn );
|
||||
#else
|
||||
NVIC_EnableIRQ(CT16B1_IRQn);
|
||||
#endif
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: init_timer16PWM
|
||||
**
|
||||
** Descriptions: Initialize timer as PWM
|
||||
**
|
||||
** parameters: timer number, period and match enable:
|
||||
** match_enable[0] = PWM for MAT0
|
||||
** match_enable[1] = PWM for MAT1
|
||||
** match_enable[2] = PWM for MAT2
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void init_timer16PWM(uint8_t timer_num, uint32_t period, uint8_t match_enable, uint8_t cap_enabled)
|
||||
{
|
||||
disable_timer16(timer_num);
|
||||
|
||||
if (timer_num == 1)
|
||||
{
|
||||
/* Some of the I/O pins need to be clearfully planned if
|
||||
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<8);
|
||||
|
||||
/* Setup the external match register */
|
||||
LPC_CT16B1->EMR = (1<<EMC3)|(1<<EMC2)|(1<<EMC1)|(2<<EMC0)|(1<<3)|(match_enable);
|
||||
|
||||
/* Setup the outputs */
|
||||
/* If match0 is enabled, set the output */
|
||||
set_timer16_match(timer_num, match_enable, 0 );
|
||||
|
||||
/* Enable the selected PWMs and enable Match3 */
|
||||
LPC_CT16B1->PWMC = (1<<3)|(match_enable);
|
||||
|
||||
/* Setup the match registers */
|
||||
/* set the period value to a global variable */
|
||||
timer16_1_period = period;
|
||||
LPC_CT16B1->MR3 = timer16_1_period;
|
||||
LPC_CT16B1->MR0 = timer16_1_period/2;
|
||||
LPC_CT16B1->MR1 = timer16_1_period/2;
|
||||
LPC_CT16B1->MR2 = timer16_1_period/2;
|
||||
|
||||
/* Set match control register */
|
||||
LPC_CT16B1->MCR = 1<<10;// | 1<<9; /* Reset on MR3 */
|
||||
|
||||
if (cap_enabled)
|
||||
{
|
||||
/* Use location 0 for test. */
|
||||
set_timer16_capture( timer_num, 0 );
|
||||
LPC_CT16B1->IR = 0xF; /* clear interrupt flag */
|
||||
|
||||
/* Set the capture control register */
|
||||
LPC_CT16B1->CCR = 7;
|
||||
|
||||
}
|
||||
/* Enable the TIMER1 Interrupt */
|
||||
NVIC_EnableIRQ(CT16B1_IRQn);
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<7);
|
||||
|
||||
/* Setup the external match register */
|
||||
LPC_CT16B0->EMR = (1<<EMC3)|(1<<EMC2)|(1<<EMC1)|(1<<EMC0)|(1<<3)|(match_enable);
|
||||
|
||||
/* Setup the outputs */
|
||||
/* If match0 is enabled, set the output */
|
||||
set_timer16_match(timer_num, match_enable, 0 );
|
||||
|
||||
/* Enable the selected PWMs and enable Match3 */
|
||||
LPC_CT16B0->PWMC = (1<<3)|(match_enable);
|
||||
|
||||
/* Setup the match registers */
|
||||
/* set the period value to a global variable */
|
||||
timer16_0_period = period;
|
||||
LPC_CT16B0->MR3 = timer16_0_period;
|
||||
LPC_CT16B0->MR0 = timer16_0_period/2;
|
||||
LPC_CT16B0->MR1 = timer16_0_period/2;
|
||||
LPC_CT16B0->MR2 = timer16_0_period/2;
|
||||
|
||||
/* Set the match control register */
|
||||
LPC_CT16B0->MCR = 1<<10; /* Reset on MR3 */
|
||||
|
||||
/* Enable the TIMER1 Interrupt */
|
||||
NVIC_EnableIRQ(CT16B0_IRQn);
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: pwm16_setMatch
|
||||
**
|
||||
** Descriptions: Set the pwm16 match values
|
||||
**
|
||||
** parameters: timer number, match numner and the value
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void setMatch_timer16PWM (uint8_t timer_num, uint8_t match_nr, uint32_t value)
|
||||
{
|
||||
if (timer_num)
|
||||
{
|
||||
switch (match_nr)
|
||||
{
|
||||
case 0:
|
||||
LPC_CT16B1->MR0 = value;
|
||||
break;
|
||||
case 1:
|
||||
LPC_CT16B1->MR1 = value;
|
||||
break;
|
||||
case 2:
|
||||
LPC_CT16B1->MR2 = value;
|
||||
break;
|
||||
case 3:
|
||||
LPC_CT16B1->MR3 = value;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (match_nr)
|
||||
{
|
||||
case 0:
|
||||
LPC_CT16B0->MR0 = value;
|
||||
break;
|
||||
case 1:
|
||||
LPC_CT16B0->MR1 = value;
|
||||
break;
|
||||
case 2:
|
||||
LPC_CT16B0->MR2 = value;
|
||||
break;
|
||||
case 3:
|
||||
LPC_CT16B0->MR3 = value;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
646
demos/bsp/lpc13uxx/src/timer32.c
Normal file
646
demos/bsp/lpc13uxx/src/timer32.c
Normal file
@ -0,0 +1,646 @@
|
||||
/****************************************************************************
|
||||
* $Id:: timer32.c 6951 2011-03-23 22:11:07Z usb00423 $
|
||||
* Project: NXP LPC13Uxx 32-bit timer example
|
||||
*
|
||||
* Description:
|
||||
* This file contains 32-bit timer code example which include timer
|
||||
* initialization, timer interrupt handler, and related APIs for
|
||||
* timer setup.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors'
|
||||
* relevant copyright in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
****************************************************************************/
|
||||
#include "LPC13Uxx.h"
|
||||
#include "timer32.h"
|
||||
#include "nmi.h"
|
||||
|
||||
volatile uint32_t timer32_0_counter[4] = {0,0,0,0};
|
||||
volatile uint32_t timer32_1_counter[4] = {0,0,0,0};
|
||||
volatile uint32_t timer32_0_capture[4] = {0,0,0,0};
|
||||
volatile uint32_t timer32_1_capture[4] = {0,0,0,0};
|
||||
volatile uint32_t timer32_0_period = 0;
|
||||
volatile uint32_t timer32_1_period = 0;
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: delay32Ms
|
||||
**
|
||||
** Descriptions: Start the timer delay in milo seconds
|
||||
** until elapsed
|
||||
**
|
||||
** parameters: timer number, Delay value in milo second
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void delay32Ms(uint8_t timer_num, uint32_t delayInMs)
|
||||
{
|
||||
if (timer_num == 0)
|
||||
{
|
||||
/* setup timer #0 for delay */
|
||||
LPC_CT32B0->TCR = 0x02; /* reset timer */
|
||||
LPC_CT32B0->PR = 0x00; /* set prescaler to zero */
|
||||
LPC_CT32B0->MR0 = delayInMs * (SystemCoreClock / 1000);
|
||||
LPC_CT32B0->IR = 0xff; /* reset all interrrupts */
|
||||
LPC_CT32B0->MCR = 0x04; /* stop timer on match */
|
||||
LPC_CT32B0->TCR = 0x01; /* start timer */
|
||||
|
||||
/* wait until delay time has elapsed */
|
||||
while (LPC_CT32B0->TCR & 0x01);
|
||||
}
|
||||
else if (timer_num == 1)
|
||||
{
|
||||
/* setup timer #1 for delay */
|
||||
LPC_CT32B1->TCR = 0x02; /* reset timer */
|
||||
LPC_CT32B1->PR = 0x00; /* set prescaler to zero */
|
||||
LPC_CT32B1->MR0 = delayInMs * (SystemCoreClock / 1000);
|
||||
LPC_CT32B1->IR = 0xff; /* reset all interrrupts */
|
||||
LPC_CT32B1->MCR = 0x04; /* stop timer on match */
|
||||
LPC_CT32B1->TCR = 0x01; /* start timer */
|
||||
|
||||
/* wait until delay time has elapsed */
|
||||
while (LPC_CT32B1->TCR & 0x01);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: CT32B0_IRQHandler
|
||||
**
|
||||
** Descriptions: Timer/CounterX and captureX interrupt handler
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void CT32B0_IRQHandler(void)
|
||||
{
|
||||
if ( LPC_CT32B0->IR & (0x01<<0) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<0; /* clear interrupt flag */
|
||||
timer32_0_counter[0]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x01<<1) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<1; /* clear interrupt flag */
|
||||
timer32_0_counter[1]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x01<<2) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<2; /* clear interrupt flag */
|
||||
timer32_0_counter[2]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x01<<3) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<3; /* clear interrupt flag */
|
||||
timer32_0_counter[3]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x1<<4) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<4; /* clear interrupt flag */
|
||||
timer32_0_capture[0]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x1<<5) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<5; /* clear interrupt flag */
|
||||
timer32_0_capture[1]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x1<<6) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<6; /* clear interrupt flag */
|
||||
timer32_0_capture[2]++;
|
||||
}
|
||||
if ( LPC_CT32B0->IR & (0x1<<7) )
|
||||
{
|
||||
LPC_CT32B0->IR = 0x1<<7; /* clear interrupt flag */
|
||||
timer32_0_capture[3]++;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: CT32B1_IRQHandler
|
||||
**
|
||||
** Descriptions: Timer/CounterX and captureX interrupt handler
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void CT32B1_IRQHandler(void)
|
||||
{
|
||||
if ( LPC_CT32B1->IR & (0x01<<0) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<0; /* clear interrupt flag */
|
||||
timer32_1_counter[0]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x01<<1) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<1; /* clear interrupt flag */
|
||||
timer32_1_counter[1]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x01<<2) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<2; /* clear interrupt flag */
|
||||
timer32_1_counter[2]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x01<<3) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<3; /* clear interrupt flag */
|
||||
timer32_1_counter[3]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x1<<4) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<4; /* clear interrupt flag */
|
||||
timer32_1_capture[0]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x1<<5) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<5; /* clear interrupt flag */
|
||||
timer32_1_capture[1]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x1<<6) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<6; /* clear interrupt flag */
|
||||
timer32_1_capture[2]++;
|
||||
}
|
||||
if ( LPC_CT32B1->IR & (0x1<<7) )
|
||||
{
|
||||
LPC_CT32B1->IR = 0x1<<7; /* clear interrupt flag */
|
||||
timer32_1_capture[3]++;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: enable_timer
|
||||
**
|
||||
** Descriptions: Enable timer
|
||||
**
|
||||
** parameters: timer number: 0 or 1
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void enable_timer32(uint8_t timer_num)
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
LPC_CT32B0->TCR = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_CT32B1->TCR = 1;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: disable_timer
|
||||
**
|
||||
** Descriptions: Disable timer
|
||||
**
|
||||
** parameters: timer number: 0 or 1
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void disable_timer32(uint8_t timer_num)
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
LPC_CT32B0->TCR = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
LPC_CT32B1->TCR = 0;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: reset_timer
|
||||
**
|
||||
** Descriptions: Reset timer
|
||||
**
|
||||
** parameters: timer number: 0 or 1
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void reset_timer32(uint8_t timer_num)
|
||||
{
|
||||
uint32_t regVal;
|
||||
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
regVal = LPC_CT32B0->TCR;
|
||||
regVal |= 0x02;
|
||||
LPC_CT32B0->TCR = regVal;
|
||||
}
|
||||
else
|
||||
{
|
||||
regVal = LPC_CT32B1->TCR;
|
||||
regVal |= 0x02;
|
||||
LPC_CT32B1->TCR = regVal;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: set_timer_capture
|
||||
**
|
||||
** Descriptions: Set timer capture based on location
|
||||
**
|
||||
** parameters: timer number: 0~1, location 0~2
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void set_timer32_capture(uint8_t timer_num, uint8_t location )
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
/* Timer0_32 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_28 &= ~0x07;
|
||||
LPC_IOCON->PIO1_28 |= 0x01; /* Timer0_32 CAP0 */
|
||||
LPC_IOCON->PIO1_29 &= ~0x07;
|
||||
LPC_IOCON->PIO1_29 |= 0x02; /* Timer0_32 CAP2 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO0_17 &= ~0x07;
|
||||
LPC_IOCON->PIO0_17 |= 0x02; /* Timer0_32 CAP0 */
|
||||
}
|
||||
else
|
||||
{
|
||||
while ( 1 ); /* Fatal location number error */
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Timer1_32 I/O config */
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_4 &= ~0x07; /* Timer1_32 I/O config */
|
||||
LPC_IOCON->PIO1_4 |= 0x01; /* Timer1_32 CAP0 */
|
||||
LPC_IOCON->PIO1_5 &= ~0x07;
|
||||
LPC_IOCON->PIO1_5 |= 0x01; /* Timer1_32 CAP1 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->TMS_PIO0_12 &= ~0x07;
|
||||
LPC_IOCON->TMS_PIO0_12 |= 0x03; /* Timer1_32 CAP0 */
|
||||
}
|
||||
else
|
||||
{
|
||||
while ( 1 ); /* Fatal location number error */
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: set_timer_match
|
||||
**
|
||||
** Descriptions: Set timer match based on location
|
||||
**
|
||||
** parameters: timer number: 0~1, location 0~2
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void set_timer32_match(uint8_t timer_num, uint8_t match_enable, uint8_t location)
|
||||
{
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
if ( match_enable & 0x01 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_18 &= ~0x07;
|
||||
LPC_IOCON->PIO0_18 |= 0x02; /* Timer0_32 MAT0 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_24 &= ~0x07;
|
||||
LPC_IOCON->PIO1_24 |= 0x01; /* Timer0_32 MAT0 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x02 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_19 &= ~0x07;
|
||||
LPC_IOCON->PIO0_19 |= 0x02; /* Timer0_32 MAT1 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_25 &= ~0x07;
|
||||
LPC_IOCON->PIO1_25 |= 0x01; /* Timer0_32 MAT1 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x04 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO0_1 &= ~0x07;
|
||||
LPC_IOCON->PIO0_1 |= 0x02; /* Timer0_32 MAT2 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_26 &= ~0x07;
|
||||
LPC_IOCON->PIO1_26 |= 0x01; /* Timer0_32 MAT2 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x08 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->TDI_PIO0_11 &= ~0x07;
|
||||
LPC_IOCON->TDI_PIO0_11 |= 0x03; /* Timer0_32 MAT3 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO1_27 &= ~0x07;
|
||||
LPC_IOCON->PIO1_27 |= 0x01; /* Timer0_32 MAT3 */
|
||||
}
|
||||
}
|
||||
}
|
||||
else if ( timer_num == 1 )
|
||||
{
|
||||
if ( match_enable & 0x01 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_0 &= ~0x07;
|
||||
LPC_IOCON->PIO1_0 |= 0x01; /* Timer1_32 MAT0 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->TDO_PIO0_13 &= ~0x07;
|
||||
LPC_IOCON->TDO_PIO0_13 |= 0x03; /* Timer1_32 MAT0 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x02 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_1 &= ~0x07;
|
||||
LPC_IOCON->PIO1_1 |= 0x01; /* Timer1_32 MAT1 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->TRST_PIO0_14 &= ~0x07;
|
||||
LPC_IOCON->TRST_PIO0_14 |= 0x03; /* Timer1_32 MAT1 */
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x04 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_2 &= ~0x07;
|
||||
LPC_IOCON->PIO1_2 |= 0x01; /* Timer1_32 MAT2 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
#if __SWD_DISABLED
|
||||
LPC_IOCON->SWDIO_PIO0_15 &= ~0x07;
|
||||
LPC_IOCON->SWDIO_PIO0_15 |= 0x03; /* Timer1_32 MAT2 */
|
||||
#endif
|
||||
}
|
||||
}
|
||||
if ( match_enable & 0x08 )
|
||||
{
|
||||
if ( location == 0 )
|
||||
{
|
||||
LPC_IOCON->PIO1_3 &= ~0x07;
|
||||
LPC_IOCON->PIO1_3 |= 0x01; /* Timer1_32 MAT3 */
|
||||
}
|
||||
else if ( location == 1 )
|
||||
{
|
||||
LPC_IOCON->PIO0_16 &= ~0x07;
|
||||
LPC_IOCON->PIO0_16 |= 0x02; /* Timer1_32 MAT3 */
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: init_timer
|
||||
**
|
||||
** Descriptions: Initialize timer, set timer interval, reset timer,
|
||||
** install timer interrupt handler
|
||||
**
|
||||
** parameters: timer number and timer interval
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void init_timer32(uint8_t timer_num, uint32_t TimerInterval)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
if ( timer_num == 0 )
|
||||
{
|
||||
/* Some of the I/O pins need to be clearfully planned if
|
||||
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<9);
|
||||
|
||||
LPC_CT32B0->MR0 = TimerInterval;
|
||||
#if TIMER_MATCH
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer32_0_counter[i] = 0;
|
||||
}
|
||||
set_timer32_match(timer_num, 0x0F, 0);
|
||||
LPC_CT32B0->EMR &= ~(0xFF<<4);
|
||||
LPC_CT32B0->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8)|(0x3<<10)); /* MR0/1/2/3 Toggle */
|
||||
#else
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer32_0_capture[i] = 0;
|
||||
}
|
||||
set_timer32_capture(timer_num, 0 );
|
||||
/* Capture 0 on rising edge, interrupt enable. */
|
||||
LPC_CT32B0->CCR = (0x5<<0)|(0x5<<6);
|
||||
#endif
|
||||
LPC_CT32B0->MCR = 3; /* Interrupt and Reset on MR0 */
|
||||
|
||||
/* Enable the TIMER0 Interrupt */
|
||||
#if NMI_ENABLED
|
||||
NVIC_DisableIRQ( CT32B0_IRQn );
|
||||
NMI_Init( CT32B0_IRQn );
|
||||
#else
|
||||
NVIC_EnableIRQ(CT32B0_IRQn);
|
||||
#endif
|
||||
}
|
||||
else if ( timer_num == 1 )
|
||||
{
|
||||
/* Some of the I/O pins need to be clearfully planned if
|
||||
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10);
|
||||
|
||||
LPC_CT32B1->MR0 = TimerInterval;
|
||||
#if TIMER_MATCH
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer32_1_counter[i] = 0;
|
||||
}
|
||||
set_timer32_match(timer_num, 0x0F, 0);
|
||||
LPC_CT32B1->EMR &= ~(0xFF<<4);
|
||||
LPC_CT32B1->EMR |= ((0x3<<4)|(0x3<<6)|(0x3<<8)|(0x3<<10)); /* MR0/1/2 Toggle */
|
||||
#else
|
||||
for ( i = 0; i < 4; i++ )
|
||||
{
|
||||
timer32_1_capture[i] = 0;
|
||||
}
|
||||
set_timer32_capture(timer_num, 0 );
|
||||
/* Capture 0 on rising edge, interrupt enable. */
|
||||
LPC_CT32B1->CCR = (0x5<<0)|(0x5<<3);
|
||||
#endif
|
||||
LPC_CT32B1->MCR = 3; /* Interrupt and Reset on MR0 */
|
||||
|
||||
/* Enable the TIMER1 Interrupt */
|
||||
#if NMI_ENABLED
|
||||
NVIC_DisableIRQ( CT32B1_IRQn );
|
||||
NMI_Init( CT32B1_IRQn );
|
||||
#else
|
||||
NVIC_EnableIRQ(CT32B1_IRQn);
|
||||
#endif
|
||||
}
|
||||
return;
|
||||
}
|
||||
/******************************************************************************
|
||||
** Function name: init_timer32PWM
|
||||
**
|
||||
** Descriptions: Initialize timer as PWM
|
||||
**
|
||||
** parameters: timer number, period and match enable:
|
||||
** match_enable[0] = PWM for MAT0
|
||||
** match_enable[1] = PWM for MAT1
|
||||
** match_enable[2] = PWM for MAT2
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void init_timer32PWM(uint8_t timer_num, uint32_t period, uint8_t match_enable)
|
||||
{
|
||||
disable_timer32(timer_num);
|
||||
if (timer_num == 1)
|
||||
{
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<10);
|
||||
|
||||
/* Setup the external match register */
|
||||
LPC_CT32B1->EMR = (1<<EMC3)|(1<<EMC2)|(2<<EMC1)|(1<<EMC0)|MATCH3|(match_enable);
|
||||
|
||||
/* Setup the outputs */
|
||||
/* If match0 is enabled, set the output, use location 0 for test. */
|
||||
set_timer32_match( timer_num, match_enable, 0 );
|
||||
|
||||
/* Enable the selected PWMs and enable Match3 */
|
||||
LPC_CT32B1->PWMC = MATCH3|(match_enable);
|
||||
|
||||
/* Setup the match registers */
|
||||
/* set the period value to a global variable */
|
||||
timer32_1_period = period;
|
||||
LPC_CT32B1->MR3 = timer32_1_period;
|
||||
LPC_CT32B1->MR0 = timer32_1_period/2;
|
||||
LPC_CT32B1->MR1 = timer32_1_period/2;
|
||||
LPC_CT32B1->MR2 = timer32_1_period/2;
|
||||
LPC_CT32B1->MCR = 1<<10; /* Reset on MR3 */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Some of the I/O pins need to be clearfully planned if
|
||||
you use below module because JTAG and TIMER CAP/MAT pins are muxed. */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<9);
|
||||
|
||||
/* Setup the external match register */
|
||||
LPC_CT32B0->EMR = (1<<EMC3)|(2<<EMC2)|(1<<EMC1)|(1<<EMC0)|MATCH3|(match_enable);
|
||||
|
||||
/* Setup the outputs */
|
||||
/* If match0 is enabled, set the output, use location 0 for test. */
|
||||
set_timer32_match( timer_num, match_enable, 0 );
|
||||
|
||||
/* Enable the selected PWMs and enable Match3 */
|
||||
LPC_CT32B0->PWMC = MATCH3|(match_enable);
|
||||
|
||||
/* Setup the match registers */
|
||||
/* set the period value to a global variable */
|
||||
timer32_0_period = period;
|
||||
LPC_CT32B0->MR3 = timer32_0_period;
|
||||
LPC_CT32B0->MR0 = timer32_0_period/2;
|
||||
LPC_CT32B0->MR1 = timer32_0_period/2;
|
||||
LPC_CT32B0->MR2 = timer32_0_period/2;
|
||||
LPC_CT32B0->MCR = 1<<10; /* Reset on MR3 */
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** Function name: pwm32_setMatch
|
||||
**
|
||||
** Descriptions: Set the pwm32 match values
|
||||
**
|
||||
** parameters: timer number, match numner and the value
|
||||
**
|
||||
** Returned value: None
|
||||
**
|
||||
******************************************************************************/
|
||||
void setMatch_timer32PWM (uint8_t timer_num, uint8_t match_nr, uint32_t value)
|
||||
{
|
||||
if (timer_num)
|
||||
{
|
||||
switch (match_nr)
|
||||
{
|
||||
case 0:
|
||||
LPC_CT32B1->MR0 = value;
|
||||
break;
|
||||
case 1:
|
||||
LPC_CT32B1->MR1 = value;
|
||||
break;
|
||||
case 2:
|
||||
LPC_CT32B1->MR2 = value;
|
||||
break;
|
||||
case 3:
|
||||
LPC_CT32B1->MR3 = value;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
switch (match_nr)
|
||||
{
|
||||
case 0:
|
||||
LPC_CT32B0->MR0 = value;
|
||||
break;
|
||||
case 1:
|
||||
LPC_CT32B0->MR1 = value;
|
||||
break;
|
||||
case 2:
|
||||
LPC_CT32B0->MR2 = value;
|
||||
break;
|
||||
case 3:
|
||||
LPC_CT32B0->MR3 = value;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
437
demos/bsp/lpc13uxx/src/uart.c
Normal file
437
demos/bsp/lpc13uxx/src/uart.c
Normal file
@ -0,0 +1,437 @@
|
||||
/****************************************************************************
|
||||
* $Id:: uart.c 7125 2011-04-15 00:22:12Z usb01267 $
|
||||
* Project: NXP LPC13Uxx UART example
|
||||
*
|
||||
* Description:
|
||||
* This file contains UART code example which include UART
|
||||
* initialization, UART interrupt handler, and related APIs for
|
||||
* UART access.
|
||||
*
|
||||
****************************************************************************
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* products. This software is supplied "AS IS" without any warranties.
|
||||
* NXP Semiconductors assumes no responsibility or liability for the
|
||||
* use of the software, conveys no license or title under any patent,
|
||||
* copyright, or mask work right to the product. NXP Semiconductors
|
||||
* reserves the right to make changes in the software without
|
||||
* notification. NXP Semiconductors also make no representation or
|
||||
* warranty that such application will be suitable for the specified
|
||||
* use without further testing or modification.
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors'
|
||||
* relevant copyright in the software, without fee, provided that it
|
||||
* is used in conjunction with NXP Semiconductors microcontrollers. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies of
|
||||
* this code.
|
||||
****************************************************************************/
|
||||
#include "LPC13Uxx.h"
|
||||
#include "type.h"
|
||||
#include "uart.h"
|
||||
|
||||
volatile uint32_t UARTStatus;
|
||||
volatile uint8_t UARTTxEmpty = 1;
|
||||
volatile uint8_t UARTBuffer[BUFSIZE];
|
||||
volatile uint32_t UARTCount = 0;
|
||||
|
||||
#if AUTOBAUD_ENABLE
|
||||
volatile uint32_t UARTAutoBaud = 0, AutoBaudTimeout = 0;
|
||||
#endif
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: USART_IRQHandler
|
||||
**
|
||||
** Descriptions: USART interrupt handler
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void USART_IRQHandler(void)
|
||||
{
|
||||
uint8_t IIRValue, LSRValue;
|
||||
uint8_t Dummy = Dummy;
|
||||
|
||||
IIRValue = LPC_USART->IIR;
|
||||
|
||||
IIRValue >>= 1; /* skip pending bit in IIR */
|
||||
IIRValue &= 0x07; /* check bit 1~3, interrupt identification */
|
||||
if (IIRValue == IIR_RLS) /* Receive Line Status */
|
||||
{
|
||||
LSRValue = LPC_USART->LSR;
|
||||
/* Receive Line Status */
|
||||
if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
|
||||
{
|
||||
/* There are errors or break interrupt */
|
||||
/* Read LSR will clear the interrupt */
|
||||
UARTStatus = LSRValue;
|
||||
Dummy = LPC_USART->RBR; /* Dummy read on RX to clear
|
||||
interrupt, then bail out */
|
||||
return;
|
||||
}
|
||||
if (LSRValue & LSR_RDR) /* Receive Data Ready */
|
||||
{
|
||||
/* If no error on RLS, normal ready, save into the data buffer. */
|
||||
/* Note: read RBR will clear the interrupt */
|
||||
UARTBuffer[UARTCount++] = LPC_USART->RBR;
|
||||
if (UARTCount == BUFSIZE)
|
||||
{
|
||||
UARTCount = 0; /* buffer overflow */
|
||||
}
|
||||
}
|
||||
}
|
||||
else if (IIRValue == IIR_RDA) /* Receive Data Available */
|
||||
{
|
||||
/* Receive Data Available */
|
||||
UARTBuffer[UARTCount++] = LPC_USART->RBR;
|
||||
if (UARTCount == BUFSIZE)
|
||||
{
|
||||
UARTCount = 0; /* buffer overflow */
|
||||
}
|
||||
}
|
||||
else if (IIRValue == IIR_CTI) /* Character timeout indicator */
|
||||
{
|
||||
/* Character Time-out indicator */
|
||||
UARTStatus |= 0x100; /* Bit 9 as the CTI error */
|
||||
}
|
||||
else if (IIRValue == IIR_THRE) /* THRE, transmit holding register empty */
|
||||
{
|
||||
/* THRE interrupt */
|
||||
LSRValue = LPC_USART->LSR; /* Check status in the LSR to see if
|
||||
valid data in U0THR or not */
|
||||
if (LSRValue & LSR_THRE)
|
||||
{
|
||||
UARTTxEmpty = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
UARTTxEmpty = 0;
|
||||
}
|
||||
}
|
||||
#if AUTOBAUD_ENABLE
|
||||
if (LPC_USART->IIR & IIR_ABEO) /* End of Auto baud */
|
||||
{
|
||||
LPC_USART->IER &= ~IIR_ABEO;
|
||||
/* clear bit ABEOInt in the IIR by set ABEOIntClr in the ACR register */
|
||||
LPC_USART->ACR |= IIR_ABEO;
|
||||
UARTAutoBaud = 1;
|
||||
}
|
||||
else if (LPC_USART->IIR & IIR_ABTO)/* Auto baud time out */
|
||||
{
|
||||
LPC_USART->IER &= ~IIR_ABTO;
|
||||
AutoBaudTimeout = 1;
|
||||
/* clear bit ABTOInt in the IIR by set ABTOIntClr in the ACR register */
|
||||
LPC_USART->ACR |= IIR_ABTO;
|
||||
}
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
#if MODEM_TEST
|
||||
/*****************************************************************************
|
||||
** Function name: ModemInit
|
||||
**
|
||||
** Descriptions: Initialize UART0 port as modem, setup pin select.
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void ModemInit( void )
|
||||
{
|
||||
|
||||
LPC_IOCON->PIO0_7 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO0_7 |= 0x01; /* UART CTS */
|
||||
LPC_IOCON->PIO0_17 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO0_17 |= 0x01; /* UART RTS */
|
||||
#if 1
|
||||
LPC_IOCON->PIO1_13 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_13 |= 0x01; /* UART DTR */
|
||||
LPC_IOCON->PIO1_14 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_14 |= 0x01; /* UART DSR */
|
||||
LPC_IOCON->PIO1_15 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_15 |= 0x01; /* UART DCD */
|
||||
LPC_IOCON->PIO1_16 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_16 |= 0x01; /* UART RI */
|
||||
|
||||
#else
|
||||
LPC_IOCON->PIO1_19 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_19 |= 0x01; /* UART DTR */
|
||||
LPC_IOCON->PIO1_20 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_20 |= 0x01; /* UART DSR */
|
||||
LPC_IOCON->PIO1_21 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_21 |= 0x01; /* UART DCD */
|
||||
LPC_IOCON->PIO1_22 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_22 |= 0x01; /* UART RI */
|
||||
#endif
|
||||
LPC_USART->MCR = 0xC0; /* Enable Auto RTS and Auto CTS. */
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
/***********************************************************************
|
||||
*
|
||||
* Function: uart_set_divisors
|
||||
*
|
||||
* Purpose: Determines best dividers to get a target clock rate
|
||||
*
|
||||
* Processing:
|
||||
* See function.
|
||||
*
|
||||
* Parameters:
|
||||
* UARTClk : UART clock
|
||||
* baudrate : Desired UART baud rate
|
||||
*
|
||||
* Outputs:
|
||||
* baudrate : Sets the estimated buadrate value in DLL, DLM, and FDR.
|
||||
*
|
||||
* Returns: Error status.
|
||||
*
|
||||
* Notes: None
|
||||
*
|
||||
**********************************************************************/
|
||||
uint32_t uart_set_divisors(uint32_t UARTClk, uint32_t baudrate)
|
||||
{
|
||||
uint32_t uClk;
|
||||
uint32_t calcBaudrate = 0;
|
||||
uint32_t temp = 0;
|
||||
|
||||
uint32_t mulFracDiv, dividerAddFracDiv;
|
||||
uint32_t diviser = 0 ;
|
||||
uint32_t mulFracDivOptimal = 1;
|
||||
uint32_t dividerAddOptimal = 0;
|
||||
uint32_t diviserOptimal = 0;
|
||||
|
||||
uint32_t relativeError = 0;
|
||||
uint32_t relativeOptimalError = 100000;
|
||||
|
||||
/* get UART block clock */
|
||||
uClk = UARTClk >> 4; /* div by 16 */
|
||||
/* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
|
||||
* The formula is :
|
||||
* BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
|
||||
* It involves floating point calculations. That's the reason the formulae are adjusted with
|
||||
* Multiply and divide method.*/
|
||||
/* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
|
||||
* 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
|
||||
for (mulFracDiv = 1; mulFracDiv <= 15; mulFracDiv++)
|
||||
{
|
||||
for (dividerAddFracDiv = 0; dividerAddFracDiv <= 15; dividerAddFracDiv++)
|
||||
{
|
||||
temp = (mulFracDiv * uClk) / ((mulFracDiv + dividerAddFracDiv));
|
||||
diviser = temp / baudrate;
|
||||
if ((temp % baudrate) > (baudrate / 2))
|
||||
diviser++;
|
||||
|
||||
if (diviser > 2 && diviser < 65536)
|
||||
{
|
||||
calcBaudrate = temp / diviser;
|
||||
|
||||
if (calcBaudrate <= baudrate)
|
||||
relativeError = baudrate - calcBaudrate;
|
||||
else
|
||||
relativeError = calcBaudrate - baudrate;
|
||||
|
||||
if ((relativeError < relativeOptimalError))
|
||||
{
|
||||
mulFracDivOptimal = mulFracDiv ;
|
||||
dividerAddOptimal = dividerAddFracDiv;
|
||||
diviserOptimal = diviser;
|
||||
relativeOptimalError = relativeError;
|
||||
if (relativeError == 0)
|
||||
break;
|
||||
}
|
||||
} /* End of if */
|
||||
} /* end of inner for loop */
|
||||
if (relativeError == 0)
|
||||
break;
|
||||
} /* end of outer for loop */
|
||||
|
||||
if (relativeOptimalError < (baudrate / 30))
|
||||
{
|
||||
/* Set the `Divisor Latch Access Bit` and enable so the DLL/DLM access*/
|
||||
/* Initialise the `Divisor latch LSB` and `Divisor latch MSB` registers */
|
||||
LPC_USART->DLM = (diviserOptimal >> 8) & 0xFF;
|
||||
LPC_USART->DLL = diviserOptimal & 0xFF;
|
||||
|
||||
/* Initialise the Fractional Divider Register */
|
||||
LPC_USART->FDR = ((mulFracDivOptimal & 0xF) << 4) | (dividerAddOptimal & 0xF);
|
||||
return( TRUE );
|
||||
}
|
||||
return ( FALSE );
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: UARTInit
|
||||
**
|
||||
** Descriptions: Initialize UART0 port, setup pin select,
|
||||
** clock, parity, stop bits, FIFO, etc.
|
||||
**
|
||||
** parameters: UART baudrate
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void UARTInit(uint32_t baudrate)
|
||||
{
|
||||
#if !AUTOBAUD_ENABLE
|
||||
uint32_t Fdiv;
|
||||
#endif
|
||||
volatile uint32_t regVal;
|
||||
|
||||
UARTTxEmpty = 1;
|
||||
UARTCount = 0;
|
||||
|
||||
NVIC_DisableIRQ(USART_IRQn);
|
||||
/* Select only one location from below. */
|
||||
#if 1
|
||||
LPC_IOCON->PIO0_18 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO0_18 |= 0x01; /* UART RXD */
|
||||
LPC_IOCON->PIO0_19 &= ~0x07;
|
||||
LPC_IOCON->PIO0_19 |= 0x01; /* UART TXD */
|
||||
#endif
|
||||
#if 0
|
||||
LPC_IOCON->PIO1_14 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_14 |= 0x03; /* UART RXD */
|
||||
LPC_IOCON->PIO1_13 &= ~0x07;
|
||||
LPC_IOCON->PIO1_13 |= 0x03; /* UART TXD */
|
||||
#endif
|
||||
#if 0
|
||||
LPC_IOCON->PIO1_17 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_17 |= 0x02; /* UART RXD */
|
||||
LPC_IOCON->PIO1_18 &= ~0x07;
|
||||
LPC_IOCON->PIO1_18 |= 0x02; /* UART TXD */
|
||||
#endif
|
||||
#if 0
|
||||
LPC_IOCON->PIO1_26 &= ~0x07; /* UART I/O config */
|
||||
LPC_IOCON->PIO1_26 |= 0x02; /* UART RXD */
|
||||
LPC_IOCON->PIO1_27 &= ~0x07;
|
||||
LPC_IOCON->PIO1_27 |= 0x02; /* UART TXD */
|
||||
#endif
|
||||
|
||||
/* Enable UART clock */
|
||||
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
|
||||
LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
|
||||
|
||||
LPC_USART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
|
||||
#if !AUTOBAUD_ENABLE
|
||||
#if FDR_CALIBRATION
|
||||
if ( uart_set_divisors(SystemCoreClock/LPC_SYSCON->UARTCLKDIV, baudrate) != TRUE )
|
||||
{
|
||||
Fdiv = ((SystemCoreClock/LPC_SYSCON->UARTCLKDIV)/16)/baudrate ; /*baud rate */
|
||||
LPC_USART->DLM = Fdiv / 256;
|
||||
LPC_USART->DLL = Fdiv % 256;
|
||||
LPC_USART->FDR = 0x10; /* Default */
|
||||
}
|
||||
#else
|
||||
Fdiv = ((SystemCoreClock/LPC_SYSCON->UARTCLKDIV)/16)/baudrate ; /*baud rate */
|
||||
LPC_USART->DLM = Fdiv / 256;
|
||||
LPC_USART->DLL = Fdiv % 256;
|
||||
LPC_USART->FDR = 0x10; /* Default */
|
||||
#endif
|
||||
#endif
|
||||
LPC_USART->LCR = 0x03; /* DLAB = 0 */
|
||||
LPC_USART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
|
||||
|
||||
/* Read to clear the line status. */
|
||||
regVal = LPC_USART->LSR;
|
||||
|
||||
/* Ensure a clean start, no data in either TX or RX FIFO. */
|
||||
while (( LPC_USART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
|
||||
while ( LPC_USART->LSR & LSR_RDR )
|
||||
{
|
||||
regVal = LPC_USART->RBR; /* Dump data from RX FIFO */
|
||||
}
|
||||
|
||||
/* Enable the UART Interrupt */
|
||||
NVIC_EnableIRQ(USART_IRQn);
|
||||
|
||||
#if TX_INTERRUPT
|
||||
LPC_USART->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART interrupt */
|
||||
#else
|
||||
LPC_USART->IER = IER_RBR | IER_RLS; /* Enable UART interrupt */
|
||||
#endif
|
||||
#if AUTOBAUD_ENABLE
|
||||
LPC_USART->IER |= IER_ABEO | IER_ABTO;
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: UARTSend
|
||||
**
|
||||
** Descriptions: Send a block of data to the UART 0 port based
|
||||
** on the data length
|
||||
**
|
||||
** parameters: buffer pointer, and data length
|
||||
** Returned value: None
|
||||
**
|
||||
*****************************************************************************/
|
||||
void UARTSend(uint8_t *BufferPtr, uint32_t Length)
|
||||
{
|
||||
|
||||
while ( Length != 0 )
|
||||
{
|
||||
/* THRE status, contain valid data */
|
||||
#if !TX_INTERRUPT
|
||||
while ( !(LPC_USART->LSR & LSR_THRE) );
|
||||
LPC_USART->THR = *BufferPtr;
|
||||
#else
|
||||
/* Below flag is set inside the interrupt handler when THRE occurs. */
|
||||
while ( !(UARTTxEmpty & 0x01) );
|
||||
LPC_USART->THR = *BufferPtr;
|
||||
UARTTxEmpty = 0; /* not empty in the THR until it shifts out */
|
||||
#endif
|
||||
BufferPtr++;
|
||||
Length--;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: print_string
|
||||
**
|
||||
** Descriptions: print out string on the terminal
|
||||
**
|
||||
** parameters: pointer to the string end with NULL char.
|
||||
** Returned value: none.
|
||||
**
|
||||
*****************************************************************************/
|
||||
void print_string( uint8_t *str_ptr )
|
||||
{
|
||||
while(*str_ptr != 0x00)
|
||||
{
|
||||
while((LPC_USART->LSR & 0x60) != 0x60);
|
||||
LPC_USART->THR = *str_ptr;
|
||||
str_ptr++;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
** Function name: get_key
|
||||
**
|
||||
** Descriptions: Get a character from the terminal
|
||||
**
|
||||
** parameters: None
|
||||
** Returned value: character, zero is none.
|
||||
**
|
||||
*****************************************************************************/
|
||||
uint8_t get_key( void )
|
||||
{
|
||||
uint8_t dummy;
|
||||
|
||||
while ( !(LPC_USART->LSR & 0x01) );
|
||||
dummy = LPC_USART->RBR;
|
||||
if ((dummy>=65) && (dummy<=90))
|
||||
{
|
||||
/* convert capital to non-capital character, A2a, B2b, C2c. */
|
||||
dummy +=32;
|
||||
}
|
||||
/* echo */
|
||||
LPC_USART->THR = dummy;
|
||||
return(dummy);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
** End Of File
|
||||
******************************************************************************/
|
279
demos/bsp/lpc13uxx/startup_keil/startup_LPC13Uxx.s
Normal file
279
demos/bsp/lpc13uxx/startup_keil/startup_LPC13Uxx.s
Normal file
@ -0,0 +1,279 @@
|
||||
;/**************************************************************************//**
|
||||
; * @file startup_LPC13Uxx.s
|
||||
; * @brief CMSIS Cortex-M3 Core Device Startup File
|
||||
; * for the NXP LPC13Uxx Device Series
|
||||
; * @version V1.10
|
||||
; * @date 24. November 2010
|
||||
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
; *
|
||||
; * @note
|
||||
; * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
|
||||
; *
|
||||
; * @par
|
||||
; * ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
; * processor based microcontrollers. This file can be freely distributed
|
||||
; * within development tools that are supporting such ARM based processors.
|
||||
; *
|
||||
; * @par
|
||||
; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
|
||||
; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
|
||||
; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
|
||||
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
; *
|
||||
; ******************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
||||
; Vector Table Mapped to Address 0 at Reset
|
||||
|
||||
AREA RESET, DATA, READONLY
|
||||
EXPORT __Vectors
|
||||
|
||||
__Vectors DCD __initial_sp ; Top of Stack
|
||||
DCD Reset_Handler ; Reset Handler
|
||||
DCD NMI_Handler ; NMI Handler
|
||||
DCD HardFault_Handler ; Hard Fault Handler
|
||||
DCD MemManage_Handler ; MPU Fault Handler
|
||||
DCD BusFault_Handler ; Bus Fault Handler
|
||||
DCD UsageFault_Handler ; Usage Fault Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD 0 ; Reserved
|
||||
DCD SVC_Handler ; SVCall Handler
|
||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||
DCD 0 ; Reserved
|
||||
DCD PendSV_Handler ; PendSV Handler
|
||||
DCD SysTick_Handler ; SysTick Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD PIN_INT0_IRQHandler ; All GPIO pin can be routed to PIN_INTx
|
||||
DCD PIN_INT1_IRQHandler
|
||||
DCD PIN_INT2_IRQHandler
|
||||
DCD PIN_INT3_IRQHandler
|
||||
DCD PIN_INT4_IRQHandler
|
||||
DCD PIN_INT5_IRQHandler
|
||||
DCD PIN_INT6_IRQHandler
|
||||
DCD PIN_INT7_IRQHandler
|
||||
DCD GINT0_IRQHandler
|
||||
DCD GINT1_IRQHandler ; PIO0 (0:7)
|
||||
DCD Reserved_IRQHandler ; Reserved
|
||||
DCD Reserved_IRQHandler
|
||||
DCD OSTIMER_IRQHandler
|
||||
DCD Reserved_IRQHandler
|
||||
DCD SSP1_IRQHandler ; SSP1
|
||||
DCD I2C_IRQHandler ; I2C
|
||||
DCD CT16B0_IRQHandler ; 16-bit Timer0
|
||||
DCD CT16B1_IRQHandler ; 16-bit Timer1
|
||||
DCD CT32B0_IRQHandler ; 32-bit Timer0
|
||||
DCD CT32B1_IRQHandler ; 32-bit Timer1
|
||||
DCD SSP0_IRQHandler ; SSP0
|
||||
DCD USART_IRQHandler ; USART
|
||||
DCD USB_IRQHandler ; USB IRQ
|
||||
DCD USB_FIQHandler ; USB FIQ
|
||||
DCD ADC_IRQHandler ; A/D Converter
|
||||
DCD WDT_IRQHandler ; Watchdog timer
|
||||
DCD BOD_IRQHandler ; Brown Out Detect
|
||||
DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
|
||||
DCD OSCFAIL_IRQHandler ; OSC FAIL
|
||||
DCD PVTCIRCUIT_IRQHandler ; PVT CIRCUIT
|
||||
DCD USBWakeup_IRQHandler ; USB wake up
|
||||
DCD Reserved_IRQHandler ; Reserved
|
||||
|
||||
|
||||
IF :LNOT::DEF:NO_CRP
|
||||
AREA |.ARM.__at_0x02FC|, CODE, READONLY
|
||||
CRP_Key DCD 0xFFFFFFFF
|
||||
ENDIF
|
||||
|
||||
|
||||
AREA |.text|, CODE, READONLY
|
||||
|
||||
|
||||
; Reset Handler
|
||||
|
||||
Reset_Handler PROC
|
||||
EXPORT Reset_Handler [WEAK]
|
||||
IMPORT SystemInit
|
||||
IMPORT __main
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =__main
|
||||
BX R0
|
||||
ENDP
|
||||
|
||||
|
||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||
|
||||
; now, under COMMON NMI.c and NMI.h, a real NMI handler is created if NMI is enabled
|
||||
; for particular peripheral.
|
||||
;NMI_Handler PROC
|
||||
; EXPORT NMI_Handler [WEAK]
|
||||
; B .
|
||||
; ENDP
|
||||
HardFault_Handler\
|
||||
PROC
|
||||
EXPORT HardFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SVC_Handler PROC
|
||||
EXPORT SVC_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
MemManage_Handler\
|
||||
PROC
|
||||
EXPORT MemManage_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
BusFault_Handler\
|
||||
PROC
|
||||
EXPORT BusFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
DebugMon_Handler\
|
||||
PROC
|
||||
EXPORT DebugMon_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
UsageFault_Handler\
|
||||
PROC
|
||||
EXPORT UsageFault_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
PendSV_Handler PROC
|
||||
EXPORT PendSV_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
SysTick_Handler PROC
|
||||
EXPORT SysTick_Handler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
Reserved_IRQHandler PROC
|
||||
EXPORT Reserved_IRQHandler [WEAK]
|
||||
B .
|
||||
ENDP
|
||||
|
||||
Default_Handler PROC
|
||||
EXPORT NMI_Handler [WEAK]
|
||||
EXPORT PIN_INT0_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT1_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT2_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT3_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT4_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT5_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT6_IRQHandler [WEAK]
|
||||
EXPORT PIN_INT7_IRQHandler [WEAK]
|
||||
EXPORT GINT0_IRQHandler [WEAK]
|
||||
EXPORT GINT1_IRQHandler [WEAK]
|
||||
EXPORT OSTIMER_IRQHandler [WEAK]
|
||||
EXPORT SSP1_IRQHandler [WEAK]
|
||||
EXPORT I2C_IRQHandler [WEAK]
|
||||
EXPORT CT16B0_IRQHandler [WEAK]
|
||||
EXPORT CT16B1_IRQHandler [WEAK]
|
||||
EXPORT CT32B0_IRQHandler [WEAK]
|
||||
EXPORT CT32B1_IRQHandler [WEAK]
|
||||
EXPORT SSP0_IRQHandler [WEAK]
|
||||
EXPORT USART_IRQHandler [WEAK]
|
||||
|
||||
EXPORT USB_IRQHandler [WEAK]
|
||||
EXPORT USB_FIQHandler [WEAK]
|
||||
EXPORT ADC_IRQHandler [WEAK]
|
||||
EXPORT WDT_IRQHandler [WEAK]
|
||||
EXPORT BOD_IRQHandler [WEAK]
|
||||
EXPORT FMC_IRQHandler [WEAK]
|
||||
EXPORT OSCFAIL_IRQHandler [WEAK]
|
||||
EXPORT PVTCIRCUIT_IRQHandler [WEAK]
|
||||
EXPORT USBWakeup_IRQHandler [WEAK]
|
||||
|
||||
NMI_Handler
|
||||
PIN_INT0_IRQHandler
|
||||
PIN_INT1_IRQHandler
|
||||
PIN_INT2_IRQHandler
|
||||
PIN_INT3_IRQHandler
|
||||
PIN_INT4_IRQHandler
|
||||
PIN_INT5_IRQHandler
|
||||
PIN_INT6_IRQHandler
|
||||
PIN_INT7_IRQHandler
|
||||
GINT0_IRQHandler
|
||||
GINT1_IRQHandler
|
||||
OSTIMER_IRQHandler
|
||||
SSP1_IRQHandler
|
||||
I2C_IRQHandler
|
||||
CT16B0_IRQHandler
|
||||
CT16B1_IRQHandler
|
||||
CT32B0_IRQHandler
|
||||
CT32B1_IRQHandler
|
||||
SSP0_IRQHandler
|
||||
USART_IRQHandler
|
||||
USB_IRQHandler
|
||||
USB_FIQHandler
|
||||
ADC_IRQHandler
|
||||
WDT_IRQHandler
|
||||
BOD_IRQHandler
|
||||
FMC_IRQHandler
|
||||
OSCFAIL_IRQHandler
|
||||
PVTCIRCUIT_IRQHandler
|
||||
USBWakeup_IRQHandler
|
||||
|
||||
B .
|
||||
|
||||
ENDP
|
||||
|
||||
|
||||
ALIGN
|
||||
|
||||
|
||||
; User Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
__user_initial_stackheap
|
||||
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
|
||||
END
|
@ -45,6 +45,8 @@ extern "C" {
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
#define __USE_CMSIS // Added by nxpUSBlib
|
||||
|
||||
// Code Red - if CMSIS is being used, then SystemInit() routine
|
||||
// will be called by startup code rather than in application's main()
|
||||
#if defined (__USE_CMSIS)
|
72
demos/demos.mk
Normal file
72
demos/demos.mk
Normal file
@ -0,0 +1,72 @@
|
||||
#Compiler Flags = Include Path + Macros Defines
|
||||
CFLAGS = $(MACROS_DEF) $(INC_PATH)
|
||||
|
||||
#Macros is Board and Mcu
|
||||
MACROS_DEF += -DBOARD=$(board) -DMCU=MCU_$(MCU)
|
||||
|
||||
#MCU currently supported
|
||||
mcu_support = 13UXX
|
||||
|
||||
################ Board and MCU determination ################
|
||||
#all configuration build's name must be named after the macro BOARD_NAME defined in the tinyusb/demos/boards/board.h
|
||||
buildname := $(shell echo $(notdir $(build_dir)) | tr a-z A-Z)
|
||||
board = $(buildname)
|
||||
mcu = $(shell echo $(MCU) | tr A-Z a-z)
|
||||
|
||||
$(info board $(board) )
|
||||
|
||||
ifeq (,$(findstring BOARD_,$(board)))
|
||||
$(error build's name must be name exactly the same as the macro BOARD_NAME defined in the tinyusb/demos/boards/board.h)
|
||||
endif
|
||||
|
||||
MCU := LPC$(findstring $(mcu_support),$(board))
|
||||
|
||||
ifeq (,$(MCU))
|
||||
$(error build name must contain one of supported mcu: $(mcu_support))
|
||||
endif
|
||||
|
||||
$(info MCU $(MCU) $(mcu))
|
||||
|
||||
################ Build Manipulate ################
|
||||
#Remove all other mcu in demos/bsp and keep only needed one
|
||||
OBJS := $(filter-out ./bsp/lpc%,$(OBJS)) $(filter ./bsp/$(mcu)%,$(OBJS))
|
||||
|
||||
#remove all other toolchain startup script
|
||||
toolchain = xpresso
|
||||
OBJS := $(filter-out ./bsp/$(mcu)/startup%,$(OBJS)) $(filter ./bsp/$(mcu)/startup_$(toolchain)%,$(OBJS))
|
||||
|
||||
#CMSIS include path & lib path
|
||||
cmsis_proj = CMSISv2p10_$(shell echo $(MCU) | tr X x)
|
||||
rel_include += $(cmsis_proj)/inc
|
||||
rel_include += demos/bsp/boards
|
||||
rel_include += demos/bsp/$(mcu)/inc
|
||||
INC_PATH = $(addprefix -I"$(workspace_dir)/, $(addsuffix ",$(rel_include)))
|
||||
|
||||
LIBS += -l$(cmsis_proj) -L"$(workspace_dir)/$(cmsis_proj)/Debug"
|
||||
#$(warning $(OBJS))
|
||||
|
||||
#generate makefiles.def containing MCU define for tinyusb lib
|
||||
$(shell echo CFLAGS = -DMCU=MCU_$(MCU) > $(workspace_dir)/tinyusb/makefile.defs)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#startup_objs := $(subst $(workspace_dir)/demos,.,$(shell find $(workspace_dir)/demos/ -type f))
|
||||
#startup_objs := $(patsubst %.c,%.o,$(startup_objs))
|
||||
#startup_objs := $(patsubst %.s,%.o,$(startup_objs))
|
||||
#$(error $(startup_objs))
|
||||
#OBJS := $(filter-out $(startup_objs),$(OBJS))
|
||||
|
||||
# add required startup script $(mcu) serves as sub folders inside startup
|
||||
#startup_lpxpresso = $(mcu).*cr_startup
|
||||
#startup_require += $(strip $(foreach entry,$(startup_objs), $(shell echo $(entry) | grep -i $(startup_lpxpresso))))
|
||||
#OBJS += $(startup_require)
|
||||
#$(warning $(startup_require))
|
||||
|
||||
#Remove Other MCU source, start
|
||||
#$(warning $(CFLAGS) )
|
||||
#$(warning $(S_SRCS) )
|
||||
|
@ -4,7 +4,7 @@
|
||||
<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="com.crt.advproject.config.exe.debug.856400198">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198" moduleId="org.eclipse.cdt.core.settings" name="Debug">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.856400198" moduleId="org.eclipse.cdt.core.settings" name="BOARD_LPCXPRESSO13UXX">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
@ -18,7 +18,7 @@
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Debug build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.856400198" name="Debug" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size "${BuildArtifactFileName}"; # arm-none-eabi-objcopy -O binary "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin" ; checksum -p ${TargetChip} -d "${BuildArtifactFileBaseName}.bin"; ">
|
||||
<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.debug.856400198" name="BOARD_LPCXPRESSO13UXX" parent="com.crt.advproject.config.exe.debug" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size "${BuildArtifactFileName}"; # arm-none-eabi-objcopy -O binary "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin" ; checksum -p ${TargetChip} -d "${BuildArtifactFileBaseName}.bin"; ">
|
||||
<folderInfo id="com.crt.advproject.config.exe.debug.856400198." name="/" resourcePath="">
|
||||
<toolChain id="com.crt.advproject.toolchain.exe.debug.469819926" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.debug">
|
||||
<targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.debug.548956113" name="ARM-based MCU (Debug)" superClass="com.crt.advproject.platform.exe.debug"/>
|
||||
@ -29,20 +29,15 @@
|
||||
<option id="com.crt.advproject.gcc.thumb.697143257" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
|
||||
<option id="gnu.c.compiler.option.preprocessor.def.symbols.371325215" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
|
||||
<listOptionValue builtIn="false" value="__REDLIB__"/>
|
||||
<listOptionValue builtIn="false" value="BOARD=BOARD_LPCXPRESSO1347"/>
|
||||
<listOptionValue builtIn="false" value="MCU=MCU_LPC134X"/>
|
||||
<listOptionValue builtIn="false" value="DEBUG"/>
|
||||
<listOptionValue builtIn="false" value="__CODE_RED"/>
|
||||
</option>
|
||||
<option id="gnu.c.compiler.option.misc.other.204394496" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections" valueType="string"/>
|
||||
<option id="gnu.c.compiler.option.misc.other.204394496" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections $(CFLAGS)" valueType="string"/>
|
||||
<option id="gnu.c.compiler.option.include.paths.1207481236" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CDL/CMSISv2p10_LPC13Uxx/lpcinc}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/boards}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CDL/CMSISv2p10_LPC13Uxx/inc}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CDL/LPC13UxxLib/inc}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tinyusb/tinyusb}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tinyusb}""/>
|
||||
</option>
|
||||
<option id="gnu.c.compiler.option.include.files.318820756" name="Include files (-include)" superClass="gnu.c.compiler.option.include.files"/>
|
||||
<option id="com.crt.advproject.c.misc.dialect.1002654194" name="C Dialect" superClass="com.crt.advproject.c.misc.dialect" value="com.crt.advproject.misc.dialect.gnu99" valueType="enumerated"/>
|
||||
<inputType id="com.crt.advproject.compiler.input.932601394" superClass="com.crt.advproject.compiler.input"/>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.gas.exe.debug.1050918013" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.debug">
|
||||
@ -63,11 +58,9 @@
|
||||
<listOptionValue builtIn="false" value="--gc-sections"/>
|
||||
</option>
|
||||
<option id="gnu.c.link.option.paths.1465143173" name="Library search path (-L)" superClass="gnu.c.link.option.paths" valueType="libPaths">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CDL/LPC13Uxx}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tinyusb/lpc134x}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/tinyusb/Debug}""/>
|
||||
</option>
|
||||
<option id="gnu.c.link.option.libs.447978281" name="Libraries (-l)" superClass="gnu.c.link.option.libs" valueType="libs">
|
||||
<listOptionValue builtIn="false" value="CDL"/>
|
||||
<listOptionValue builtIn="false" value="tinyusb"/>
|
||||
</option>
|
||||
<option id="com.crt.advproject.link.gcc.hdrlib.1111642583" name="Use C library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.nohost" valueType="enumerated"/>
|
||||
@ -426,410 +419,6 @@
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="com.crt.advproject.config.exe.release.2127212492">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.release.2127212492" moduleId="org.eclipse.cdt.core.settings" name="Release">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="Release build" errorParsers="org.eclipse.cdt.core.MakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.release.2127212492" name="Release" parent="com.crt.advproject.config.exe.release" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size "${BuildArtifactFileName}"; # arm-none-eabi-objcopy -O binary "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin" ; checksum -p ${TargetChip} -d "${BuildArtifactFileBaseName}.bin"; ">
|
||||
<folderInfo id="com.crt.advproject.config.exe.release.2127212492." name="/" resourcePath="">
|
||||
<toolChain id="com.crt.advproject.toolchain.exe.release.272781778" name="Code Red MCU Tools" superClass="com.crt.advproject.toolchain.exe.release">
|
||||
<targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release.765476662" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
|
||||
<builder buildPath="${workspace_loc:/device_keyboard/Release}" id="com.crt.advproject.builder.exe.release.1079210842" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="com.crt.advproject.builder.exe.release"/>
|
||||
<tool id="com.crt.advproject.cpp.exe.release.1922869988" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release"/>
|
||||
<tool id="com.crt.advproject.gcc.exe.release.121334604" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release">
|
||||
<option id="com.crt.advproject.gcc.arch.2096880793" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.cm3" valueType="enumerated"/>
|
||||
<option id="com.crt.advproject.gcc.thumb.83314458" name="Thumb mode" superClass="com.crt.advproject.gcc.thumb" value="true" valueType="boolean"/>
|
||||
<option id="gnu.c.compiler.option.preprocessor.def.symbols.561167434" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
|
||||
<listOptionValue builtIn="false" value="__REDLIB__"/>
|
||||
<listOptionValue builtIn="false" value="NDEBUG"/>
|
||||
<listOptionValue builtIn="false" value="__CODE_RED"/>
|
||||
</option>
|
||||
<option id="gnu.c.compiler.option.misc.other.9967708" name="Other flags" superClass="gnu.c.compiler.option.misc.other" value="-c -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections" valueType="string"/>
|
||||
<inputType id="com.crt.advproject.compiler.input.114648017" superClass="com.crt.advproject.compiler.input"/>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.gas.exe.release.2134084776" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release">
|
||||
<option id="com.crt.advproject.gas.arch.1408809141" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.cm3" valueType="enumerated"/>
|
||||
<option id="com.crt.advproject.gas.thumb.1325613237" name="Thumb mode" superClass="com.crt.advproject.gas.thumb" value="true" valueType="boolean"/>
|
||||
<option id="gnu.both.asm.option.flags.crt.8528156" name="Assembler flags" superClass="gnu.both.asm.option.flags.crt" value="-c -x assembler-with-cpp -D__REDLIB__ -DNDEBUG -D__CODE_RED" valueType="string"/>
|
||||
<inputType id="com.crt.advproject.assembler.input.2131712301" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.link.cpp.exe.release.1461368660" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release"/>
|
||||
<tool id="com.crt.advproject.link.exe.release.1813757803" name="MCU Linker" superClass="com.crt.advproject.link.exe.release">
|
||||
<option id="com.crt.advproject.link.arch.1944642250" name="Architecture" superClass="com.crt.advproject.link.arch" value="com.crt.advproject.link.target.cm3" valueType="enumerated"/>
|
||||
<option id="com.crt.advproject.link.thumb.1932667490" name="Thumb mode" superClass="com.crt.advproject.link.thumb" value="true" valueType="boolean"/>
|
||||
<option id="com.crt.advproject.link.script.760917204" name="Linker script" superClass="com.crt.advproject.link.script" value=""device_keyboard_Release.ld"" valueType="string"/>
|
||||
<option id="com.crt.advproject.link.manage.15477715" name="Manage linker script" superClass="com.crt.advproject.link.manage" value="true" valueType="boolean"/>
|
||||
<option id="gnu.c.link.option.nostdlibs.924645935" name="No startup or default libs (-nostdlib)" superClass="gnu.c.link.option.nostdlibs" value="true" valueType="boolean"/>
|
||||
<option id="gnu.c.link.option.other.1157365439" name="Other options (-Xlinker [option])" superClass="gnu.c.link.option.other" valueType="stringList">
|
||||
<listOptionValue builtIn="false" value="-Map="${BuildArtifactFileBaseName}.map""/>
|
||||
<listOptionValue builtIn="false" value="--gc-sections"/>
|
||||
</option>
|
||||
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.515562302" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
</toolChain>
|
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</buildOutputProvider>
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|
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<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
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||||
<buildOutputProvider>
|
||||
<openAction enabled="true" filePath=""/>
|
||||
<parser enabled="true"/>
|
||||
</buildOutputProvider>
|
||||
<scannerInfoProvider id="makefileGenerator">
|
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<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
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||||
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<parser enabled="true"/>
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||||
<scannerInfoProvider id="specsFile">
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<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
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<scannerInfoProvider id="specsFile">
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||||
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||||
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||||
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||||
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|
||||
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|
||||
</profile>
|
||||
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|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.debug.856400198;com.crt.advproject.config.exe.debug.856400198.;com.crt.advproject.gcc.exe.debug.2040685134;com.crt.advproject.compiler.input.932601394">
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
</buildOutputProvider>
|
||||
<scannerInfoProvider id="makefileGenerator">
|
||||
<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
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||||
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||||
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||||
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<buildOutputProvider>
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||||
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||||
<parser enabled="true"/>
|
||||
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|
||||
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|
||||
<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
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||||
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|
||||
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|
||||
<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
|
||||
<buildOutputProvider>
|
||||
<openAction enabled="true" filePath=""/>
|
||||
<parser enabled="true"/>
|
||||
</buildOutputProvider>
|
||||
<scannerInfoProvider id="specsFile">
|
||||
<runAction arguments="-c 'gcc -E -P -v -dD "${plugin_state_location}/${specs_file}"'" command="sh" useDefault="true"/>
|
||||
<parser enabled="true"/>
|
||||
</scannerInfoProvider>
|
||||
</profile>
|
||||
<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
|
||||
<buildOutputProvider>
|
||||
<openAction enabled="true" filePath=""/>
|
||||
<parser enabled="true"/>
|
||||
</buildOutputProvider>
|
||||
<scannerInfoProvider id="specsFile">
|
||||
<runAction arguments="-c 'g++ -E -P -v -dD "${plugin_state_location}/specs.cpp"'" command="sh" useDefault="true"/>
|
||||
<parser enabled="true"/>
|
||||
</scannerInfoProvider>
|
||||
</profile>
|
||||
<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
|
||||
<buildOutputProvider>
|
||||
<openAction enabled="true" filePath=""/>
|
||||
<parser enabled="true"/>
|
||||
</buildOutputProvider>
|
||||
<scannerInfoProvider id="specsFile">
|
||||
<runAction arguments="-c 'gcc -E -P -v -dD "${plugin_state_location}/specs.c"'" command="sh" useDefault="true"/>
|
||||
<parser enabled="true"/>
|
||||
</scannerInfoProvider>
|
||||
</profile>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="device_keyboard.com.crt.advproject.projecttype.exe.752873811" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
|
||||
|
@ -3,7 +3,6 @@
|
||||
<name>device_keyboard</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
<project>tinyusb</project>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
@ -82,9 +81,9 @@
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>boards</name>
|
||||
<name>bsp</name>
|
||||
<type>2</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/boards</locationURI>
|
||||
<location>C:/Users/hathach/Dropbox/tinyusb/tinyusb/demos/bsp</location>
|
||||
</link>
|
||||
</linkedResources>
|
||||
</projectDescription>
|
||||
|
10
demos/device/keyboard/makefile.defs
Normal file
10
demos/device/keyboard/makefile.defs
Normal file
@ -0,0 +1,10 @@
|
||||
#Project absolute path
|
||||
build_dir = $(subst \,/,$(PWD))
|
||||
proj_path = $(build_dir)/..
|
||||
|
||||
#get workspace absolute path
|
||||
workspace_dir = $(shell cd $(proj_path)/../../.. ; pwd)
|
||||
#workspace_dir = $(proj_path)/../../../
|
||||
$(info workspace $(workspace_dir))
|
||||
|
||||
include $(workspace_dir)/demos/demos.mk
|
1808
doxygen.Doxyfile
1808
doxygen.Doxyfile
File diff suppressed because it is too large
Load Diff
27
license.md
27
license.md
@ -1,27 +0,0 @@
|
||||
# License
|
||||
|
||||
<pre>Software License Agreement (BSD License)
|
||||
Copyright (c) 2012, hathach (tinyusb.net)
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without modification,
|
||||
are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
3. The name of the author may not be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||
SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
||||
OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
OF SUCH DAMAGE.</pre>
|
29
license.txt
29
license.txt
@ -1,29 +0,0 @@
|
||||
/*
|
||||
* Software License Agreement (BSD License)
|
||||
* Copyright (c) 2012, hathach (tinyusb.net)
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
||||
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the tiny usb stack.
|
||||
*/
|
@ -1,3 +0,0 @@
|
||||
# What is tinyUSB
|
||||
|
||||

|
@ -104,7 +104,7 @@
|
||||
#define ASSERT_MESSAGE(condition, value, message) \
|
||||
do{\
|
||||
if (!(condition)) {\
|
||||
PRINTF("Assert at %s line %d: %s\n", __func__, __LINE__, message); \
|
||||
PRINTF("Assert at %s line %d: %s\n", __PRETTY_FUNCTION__, __LINE__, message); \
|
||||
return (value);\
|
||||
}\
|
||||
}while(0)
|
||||
|
@ -60,7 +60,7 @@
|
||||
/// If this attribute is used on a function declaration and a call to such a function is not eliminated through dead code elimination or other optimizations, a warning that includes message is diagnosed. This is useful for compile-time checking
|
||||
#define ATTR_WARNING(Message) __attribute__ ((warning(Message)))
|
||||
|
||||
/** \ingroup Group_GCC
|
||||
/**
|
||||
* \defgroup Group_VariableAttr Variable Attributes
|
||||
* @{
|
||||
*/
|
||||
@ -74,7 +74,7 @@
|
||||
#define ATTR_PREPACKED
|
||||
/** @} */
|
||||
|
||||
/** \ingroup Group_GCC
|
||||
/**
|
||||
* \defgroup Group_FuncAttr Function Attributes
|
||||
* @{
|
||||
*/
|
||||
@ -118,6 +118,66 @@
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \defgroup Group_BuiltinFunc Built-in Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** You can use the built-in function \b __builtin_constant_p to determine if a value is known to be constant at compile time and hence that GCC can perform constant-folding on expressions involving that value. The argument of the function is the value to test. The function returns the integer 1 if the argument is known to be a compile-time constant and 0 if it is not known to be a compile-time constant. A return of 0 does not indicate that the value is not a constant, but merely that GCC cannot prove it is a constant with the specified value of the -O option.
|
||||
You typically use this function in an embedded application where memory is a critical resource. If you have some complex calculation, you may want it to be folded if it involves constants, but need to call a function if it does not. For example:
|
||||
\code
|
||||
#define Scale_Value(X) \
|
||||
(__builtin_constant_p (X) ? ((X) * SCALE + OFFSET) : Scale (X))
|
||||
\endcode
|
||||
You may use this built-in function in either a macro or an inline function. However, if you use it in an inlined function and pass an argument of the function as the argument to the built-in, GCC never returns 1 when you call the inline function with a string constant or compound literal (see Compound Literals) and does not return 1 when you pass a constant numeric value to the inline function unless you specify the -O option.
|
||||
You may also use __builtin_constant_p in initializers for static data. For instance, you can write
|
||||
static const int table[] = { __builtin_constant_p (EXPRESSION) ? (EXPRESSION) : -1, };
|
||||
This is an acceptable initializer even if EXPRESSION is not a constant expression, including the case where __builtin_constant_p returns 1 because EXPRESSION can be folded to a constant but EXPRESSION contains operands that are not otherwise permitted in a static initializer (for example, 0 && foo ()). GCC must be more conservative about evaluating the built-in in this case, because it has no opportunity to perform optimization.
|
||||
*/
|
||||
#define BUILTIN_CONSTANT(exp) __builtin_constant_p(exp)
|
||||
|
||||
/** You can use the built-in function \b __builtin_types_compatible_p to determine whether two types are the same. This built-in function returns 1 if the unqualified versions of the types type1 and type2 (which are types, not expressions) are compatible, 0 otherwise. The result of this built-in function can be used in integer constant expressions.
|
||||
This built-in function ignores top level qualifiers (e.g., const, volatile). For example, int is equivalent to const int. The type int[] and int[5] are compatible. On the other hand, int and char * are not compatible, even if the size of their types, on the particular architecture are the same. Also, the amount of pointer indirection is taken into account when determining similarity. Consequently, short * is not similar to short **. Furthermore, two types that are typedefed are considered compatible if their underlying types are compatible.
|
||||
An enum type is not considered to be compatible with another enum type even if both are compatible with the same integer type; this is what the C standard specifies. For example, enum {foo, bar} is not similar to enum {hot, dog}.
|
||||
You typically use this function in code whose execution varies depending on the arguments' types. For example:
|
||||
\code
|
||||
#define foo(x) \
|
||||
({ \
|
||||
typeof (x) tmp = (x); \
|
||||
if (__builtin_types_compatible_p (typeof (x), long double)) \
|
||||
tmp = foo_long_double (tmp); \
|
||||
else if (__builtin_types_compatible_p (typeof (x), double)) \
|
||||
tmp = foo_double (tmp); \
|
||||
else if (__builtin_types_compatible_p (typeof (x), float)) \
|
||||
tmp = foo_float (tmp); \
|
||||
else \
|
||||
abort (); \
|
||||
tmp; \
|
||||
})
|
||||
\endcode
|
||||
*/
|
||||
#define BUILTIN_TYPE_COMPATIBLE(type1, type2) __builtin_types_compatible_p(type1, type2)
|
||||
|
||||
/** You can use the built-in function \b __builtin_choose_expr to evaluate code depending on the value of a constant expression. This built-in function returns exp1 if const_exp, which is an integer constant expression, is nonzero. Otherwise it returns exp2.
|
||||
This built-in function is analogous to the `? :' operator in C, except that the expression returned has its type unaltered by promotion rules. Also, the built-in function does not evaluate the expression that is not chosen. For example, if const_exp evaluates to true, exp2 is not evaluated even if it has side-effects.
|
||||
This built-in function can return an lvalue if the chosen argument is an lvalue. If exp1 is returned, the return type is the same as exp1's type. Similarly, if exp2 is returned, its return type is the same as exp2.
|
||||
Example:
|
||||
\code
|
||||
#define foo(x) \
|
||||
__builtin_choose_expr ( \
|
||||
__builtin_types_compatible_p (typeof (x), double), \
|
||||
foo_double (x), \
|
||||
__builtin_choose_expr ( \
|
||||
__builtin_types_compatible_p (typeof (x), float), \
|
||||
foo_float (x), \
|
||||
\\The void expression results in a compile-time error when assigning the result to something. \
|
||||
(void)0))\
|
||||
\endcode
|
||||
*/
|
||||
#define BUILTIN_CHOOSE_EXPR(const_exp, exp1, exp2) __builtin_choose_expr (const_exp, exp1, exp2)
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
@ -53,21 +53,21 @@
|
||||
|
||||
//#define MCU MCU_LPC43XX
|
||||
|
||||
#define MCU_LPC134X 1
|
||||
#define MCU_LPC11XX 2
|
||||
#define MCU_LPC13UXX 1
|
||||
#define MCU_LPC11UXX 2
|
||||
#define MCU_LPC43XX 3
|
||||
|
||||
#define ENDIAN_LITTLE ///< MCU Endian
|
||||
#define ALIGNMENT (4) ///< MCU Alignment
|
||||
|
||||
#if MCU == MCU_LPC134X
|
||||
#include "mcu_lpc134x.h"
|
||||
#if MCU == MCU_LPC13UXX
|
||||
#include "mcu_lpc13uxx.h"
|
||||
#elif MCU == MCU_LPC43XX
|
||||
#include "mcu_lpc43xx.h"
|
||||
#elif MCU == MCU_LPC11XX
|
||||
#elif MCU == MCU_LPC11UXX
|
||||
#include "mcu_lpc11xx.h"
|
||||
#else
|
||||
#error Arch is not supported yet
|
||||
#error MCU is not defined or supported yet
|
||||
#endif
|
||||
|
||||
#endif /* _TUSB_MCU_H_ */
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* mcu_lpc134x.h
|
||||
* mcu_lpc13uxx.h
|
||||
*
|
||||
* Created on: Nov 26, 2012
|
||||
* Author: hathach
|
||||
@ -46,14 +46,14 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _TUSB_MCU_LPC134_X_H_
|
||||
#define _TUSB_MCU_LPC134_X_H_
|
||||
#ifndef _TUSB_MCU_LPC13UXX_H_
|
||||
#define _TUSB_MCU_LPC13UXX_H_
|
||||
|
||||
#include "LPC13Uxx.h"
|
||||
|
||||
#define DEVICE_ROMDRIVER
|
||||
|
||||
#endif /* _TUSB_MCU_LPC134_X_H_ */
|
||||
#endif /* _TUSB_MCU_LPC13UXX_H_ */
|
||||
|
||||
/** @} */
|
||||
|
@ -133,8 +133,9 @@ typedef enum
|
||||
} ErrorCode_t;
|
||||
|
||||
|
||||
|
||||
#ifndef offsetof
|
||||
#define offsetof(s,m) (int)&(((s *)0)->m)
|
||||
#endif
|
||||
#define COMPILE_TIME_ASSERT(pred) switch(0){case 0:case pred:;}
|
||||
|
||||
#endif /* __LPC_ERROR_H__ */
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* hal_lpc134x.c
|
||||
* hal_lpc13uxx.c
|
||||
*
|
||||
* Created on: Dec 2, 2012
|
||||
* Author: hathach
|
||||
@ -37,7 +37,7 @@
|
||||
|
||||
#include "common/common.h"
|
||||
|
||||
#if MCU == MCU_LPC134X
|
||||
#if MCU == MCU_LPC13UXX
|
||||
|
||||
TUSB_Error_t hal_init()
|
||||
{
|
@ -57,10 +57,10 @@
|
||||
#define CFG_TUSB_DEBUG_LEVEL 3
|
||||
|
||||
/// Enable Host Support
|
||||
#define CFG_TUSB_HOST
|
||||
//#define CFG_TUSB_HOST
|
||||
|
||||
/// Enable Device Support
|
||||
//#define CFG_TUSB_DEVICE
|
||||
#define CFG_TUSB_DEVICE
|
||||
|
||||
/// Enable CDC Support
|
||||
#define CFG_CLASS_CDC
|
||||
|
Loading…
x
Reference in New Issue
Block a user