mirror of
https://github.com/hathach/tinyusb.git
synced 2025-02-05 18:40:28 +00:00
MCX A and MCX N merged to MCX family
This commit is contained in:
parent
69ad3e2c8d
commit
5c14bd13da
@ -139,9 +139,7 @@ Following CPUs are supported, check out `Supported Devices`_ for comprehensive l
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| +---------+--------------------------------------------------+
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| | LPC | 11u, 13, 15, 17, 18, 40, 43, 51u, 54, 55 |
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| +---------+--------------------------------------------------+
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| | MCXA | A153 |
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| +---------+--------------------------------------------------+
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| | MCXN | N9 |
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| | MCX | A15, N9 |
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+--------------+---------+--------------------------------------------------+
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| Raspberry Pi | RP2040 |
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+--------------+-----+------------------------------------------------------+
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@ -1,10 +1,15 @@
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set(MCU_VARIANT MCXA153)
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set(MCU_CORE MCXA153)
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set(FAMILY_MCUS MCXA15 CACHE INTERNAL "")
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set(CMAKE_SYSTEM_PROCESSOR cortex-m33-nodsp-nofp CACHE INTERNAL "System Processor")
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set(JLINK_DEVICE MCXA153_M33)
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set(PYOCD_TARGET MCXA153)
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set(NXPLINK_DEVICE MCXA153:MCXA153)
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set(PORT 0)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_MCXA153VLH
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@ -2,10 +2,11 @@ MCU_VARIANT = MCXA153
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MCU_CORE = MCXA153
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PORT = 0
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CPU_CORE ?= cortex-m33-nodsp-nofp
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CFLAGS += \
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-DCPU_MCXA153VLH \
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-DCFG_TUSB_MCU=OPT_MCU_MCXA15 \
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JLINK_DEVICE = MCXA153
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PYOCD_TARGET = MCXA153
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@ -1,6 +1,9 @@
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set(MCU_VARIANT MCXN947)
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set(MCU_CORE MCXN947_cm33_core0)
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set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
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set(FAMILY_MCUS MCXN9 CACHE INTERNAL "")
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set(JLINK_DEVICE MCXN947_M33_0)
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set(PYOCD_TARGET MCXN947)
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set(NXPLINK_DEVICE MCXN947:MCXN947)
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@ -2,7 +2,10 @@ MCU_VARIANT = MCXN947
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MCU_CORE = MCXN947_cm33_core0
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PORT ?= 1
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CFLAGS += -DCPU_MCXN947VDF_cm33_core0
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CPU_CORE ?= cortex-m33
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CFLAGS += \
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-DCPU_MCXN947VDF_cm33_core0 \
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-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
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JLINK_DEVICE = MCXN947_M33_0
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PYOCD_TARGET = MCXN947
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@ -1,6 +1,9 @@
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set(MCU_VARIANT MCXN947)
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set(MCU_CORE MCXN947_cm33_core0)
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set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
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set(FAMILY_MCUS MCXN9 CACHE INTERNAL "")
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set(JLINK_DEVICE MCXN947_M33_0)
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set(PYOCD_TARGET MCXN947)
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set(NXPLINK_DEVICE MCXN947:MCXN947)
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@ -2,7 +2,10 @@ MCU_VARIANT = MCXN947
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MCU_CORE = MCXN947_cm33_core0
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PORT ?= 1
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CFLAGS += -DCPU_MCXN947VDF_cm33_core0
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CPU_CORE ?= cortex-m33
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CFLAGS += \
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-DCPU_MCXN947VDF_cm33_core0 \
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-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
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JLINK_DEVICE = MCXN947_M33_0
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PYOCD_TARGET = MCXN947
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@ -52,6 +52,8 @@
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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//--------------------------------------------------------------------+
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#if CFG_TUSB_MCU == OPT_MCU_MCXN9
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void USB0_FS_IRQHandler(void)
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{
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tud_int_handler(0);
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@ -62,6 +64,14 @@ void USB1_HS_IRQHandler(void)
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tud_int_handler(1);
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}
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#elif CFG_TUSB_MCU == OPT_MCU_MCXA15
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void USB0_IRQHandler(void)
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{
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tud_int_handler(0);
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}
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#endif
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void board_init(void)
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{
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BOARD_InitPins();
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@ -123,16 +133,28 @@ void board_init(void)
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// USB VBUS
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/* PORT0 PIN22 configured as USB0_VBUS */
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#if PORT_SUPPORT_DEVICE(0)
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/* MCXA15 USB configurations */
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#if PORT_SUPPORT_DEVICE(0) && (CFG_TUSB_MCU == OPT_MCU_MCXA15)
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RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn);
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CLOCK_EnableUsbfsClock();
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#endif
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/* MCXN9 USB configurations */
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#if PORT_SUPPORT_DEVICE(0) && (CFG_TUSB_MCU == OPT_MCU_MCXN9)
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// Port0 is Full Speed
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CLOCK_AttachClk(kCLK_48M_to_USB0);
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CLOCK_EnableClock(kCLOCK_Usb0Ram);
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CLOCK_EnableClock(kCLOCK_Usb0Fs);
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CLOCK_EnableUsbfsClock();
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#endif
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#if PORT_SUPPORT_DEVICE(1)
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#if PORT_SUPPORT_DEVICE(1) && (CFG_TUSB_MCU == OPT_MCU_MCXN9)
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// Port1 is High Speed
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// Power
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@ -11,12 +11,8 @@ set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
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include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
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# toolchain set up
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set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
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set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
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set(FAMILY_MCUS MCXN9 CACHE INTERNAL "")
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#------------------------------------
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# BOARD_TARGET
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#------------------------------------
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@ -31,12 +27,23 @@ function(add_board_target BOARD_TARGET)
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
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# mcu
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
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${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
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)
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if (${FAMILY_MCUS} STREQUAL "MCXN9")
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target_sources(${BOARD_TARGET} PRIVATE
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpflexcomm.c
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)
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elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
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target_sources(${BOARD_TARGET} PRIVATE
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_spc.c
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)
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endif()
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# target_compile_definitions(${BOARD_TARGET} PUBLIC
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# )
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target_include_directories(${BOARD_TARGET} PUBLIC
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@ -93,7 +100,12 @@ function(family_configure_example TARGET RTOS)
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)
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# Add TinyUSB target and port source
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family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS})
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if (${FAMILY_MCUS} STREQUAL "MCXN9")
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family_add_tinyusb(${TARGET} OPT_MCU_MCXN9 ${RTOS})
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elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
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family_add_tinyusb(${TARGET} OPT_MCU_MCXA15 ${RTOS})
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endif()
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target_sources(${TARGET}-tinyusb PUBLIC
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# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
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${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
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@ -4,14 +4,12 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
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DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
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include $(TOP)/$(BOARD_PATH)/board.mk
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CPU_CORE ?= cortex-m33
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# Default to Highspeed PORT1
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PORT ?= 1
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CFLAGS += \
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-flto \
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-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
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-DBOARD_TUD_RHPORT=$(PORT) \
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# mcu driver cause following warnings
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@ -38,9 +36,25 @@ SRC_C += \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \
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# fsl_lpflexcomm just needed for MCXN9
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ifeq ($(MCU_VARIANT), MCXN947)
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SRC_C += \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpflexcomm.c \
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endif
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# fsl_spc just needed for MCXNA15
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ifeq ($(MCU_VARIANT), MCXA153)
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SRC_C += \
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$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_spc.c \
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endif
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INC += \
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$(TOP)/$(BOARD_PATH) \
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@ -1,161 +0,0 @@
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018, hathach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "bsp/board_api.h"
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#include "fsl_device_registers.h"
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#include "fsl_gpio.h"
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#include "fsl_lpuart.h"
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#include "board.h"
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#include "pin_mux.h"
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#include "clock_config.h"
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#ifdef BOARD_TUD_RHPORT
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#define PORT_SUPPORT_DEVICE(_n) (BOARD_TUD_RHPORT == _n)
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#else
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#define PORT_SUPPORT_DEVICE(_n) 0
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#endif
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#ifdef BOARD_TUH_RHPORT
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#define PORT_SUPPORT_HOST(_n) (BOARD_TUH_RHPORT == _n)
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#else
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#define PORT_SUPPORT_HOST(_n) 0
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#endif
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
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//--------------------------------------------------------------------+
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void USB0_IRQHandler(void)
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{
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tud_int_handler(0);
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}
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void board_init(void)
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{
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BOARD_InitPins();
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BOARD_InitBootClocks();
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CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
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// 1ms tick timer
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SysTick_Config(SystemCoreClock / 1000);
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// LED
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CLOCK_EnableClock(LED_CLK);
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gpio_pin_config_t LED_RED_config = {
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.pinDirection = kGPIO_DigitalOutput,
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.outputLogic = 0U
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};
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/* Initialize GPIO functionality on pin PIO3_12 (pin 38) */
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GPIO_PinInit(LED_GPIO, LED_PIN, &LED_RED_config);
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board_led_write(1);
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// Button
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#ifdef BUTTON_GPIO
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CLOCK_EnableClock(BUTTON_CLK);
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gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
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GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
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#endif
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#ifdef UART_DEV
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CLOCK_SetClockDiv(kCLOCK_DivLPUART0, 1u);
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CLOCK_AttachClk(kFRO12M_to_LPUART0);
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RESET_PeripheralReset(kLPUART0_RST_SHIFT_RSTn);
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lpuart_config_t uart_config;
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LPUART_GetDefaultConfig(&uart_config);
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uart_config.baudRate_Bps = 115200;
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uart_config.enableTx = true;
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uart_config.enableRx = false;
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LPUART_Init(UART_DEV, &uart_config, 12000000u);
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#endif
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// USB VBUS
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/* PORT0 PIN22 configured as USB0_VBUS */
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#if PORT_SUPPORT_DEVICE(0)
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RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn);
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CLOCK_EnableUsbfsClock();
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#endif
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}
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//--------------------------------------------------------------------+
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// Board porting API
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//--------------------------------------------------------------------+
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void board_led_write(bool state)
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{
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GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
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}
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uint32_t board_button_read(void)
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{
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#ifdef BUTTON_GPIO
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return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
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#else
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return 1;
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#endif
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}
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int board_uart_read(uint8_t* buf, int len)
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{
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(void) buf; (void) len;
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return 0;
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}
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int board_uart_write(void const * buf, int len)
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{
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#ifdef UART_DEV
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LPUART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len);
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return len;
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#else
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(void) buf; (void) len;
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return 0;
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#endif
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}
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#if CFG_TUSB_OS == OPT_OS_NONE
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volatile uint32_t system_ticks = 0;
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void SysTick_Handler(void)
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{
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system_ticks++;
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}
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uint32_t board_millis(void)
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{
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return system_ticks;
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}
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#endif
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|
@ -1,110 +0,0 @@
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include_guard()
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if (NOT BOARD)
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message(FATAL_ERROR "BOARD not specified")
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endif ()
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set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
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set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
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# include board specific
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include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
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# toolchain set up
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set(CMAKE_SYSTEM_PROCESSOR cortex-m33-nodsp-nofp CACHE INTERNAL "System Processor")
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set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
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set(FAMILY_MCUS MCXA CACHE INTERNAL "")
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#------------------------------------
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# BOARD_TARGET
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#------------------------------------
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# only need to be built ONCE for all examples
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function(add_board_target BOARD_TARGET)
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if (NOT TARGET ${BOARD_TARGET})
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add_library(${BOARD_TARGET} STATIC
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# external driver
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#lib/sct_neopixel/sct_neopixel.c
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# driver
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_gpio.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_common_arm.c
|
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_lpuart.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_spc.c
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# mcu
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
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${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
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)
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# target_compile_definitions(${BOARD_TARGET} PUBLIC
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# )
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target_include_directories(${BOARD_TARGET} PUBLIC
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# driver
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# mcu
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${CMSIS_DIR}/CMSIS/Core/Include
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${SDK_DIR}/devices/${MCU_VARIANT}
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers
|
||||
)
|
||||
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update_board(${BOARD_TARGET})
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||||
|
||||
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
|
||||
target_sources(${BOARD_TARGET} PUBLIC
|
||||
${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S
|
||||
)
|
||||
target_link_options(${BOARD_TARGET} PUBLIC
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# linker file
|
||||
"LINKER:--script=${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld"
|
||||
# nanolib
|
||||
--specs=nosys.specs
|
||||
--specs=nano.specs
|
||||
)
|
||||
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
|
||||
target_link_options(${BOARD_TARGET} PUBLIC
|
||||
"LINKER:--config=${LD_FILE_IAR}"
|
||||
)
|
||||
endif ()
|
||||
endif ()
|
||||
endfunction()
|
||||
|
||||
|
||||
#------------------------------------
|
||||
# Functions
|
||||
#------------------------------------
|
||||
function(family_configure_example TARGET RTOS)
|
||||
family_configure_common(${TARGET} ${RTOS})
|
||||
|
||||
# Board target
|
||||
add_board_target(board_${BOARD})
|
||||
|
||||
#---------- Port Specific ----------
|
||||
# These files are built for each example since it depends on example's tusb_config.h
|
||||
target_sources(${TARGET} PUBLIC
|
||||
# BSP
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
|
||||
)
|
||||
target_include_directories(${TARGET} PUBLIC
|
||||
# family, hw, board
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
|
||||
)
|
||||
|
||||
# Add TinyUSB target and port source
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_MCXA ${RTOS})
|
||||
target_sources(${TARGET}-tinyusb PUBLIC
|
||||
# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
|
||||
${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
|
||||
)
|
||||
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
|
||||
|
||||
# Link dependencies
|
||||
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
|
||||
|
||||
# Flashing
|
||||
family_flash_jlink(${TARGET})
|
||||
#family_flash_nxplink(${TARGET})
|
||||
#family_flash_pyocd(${TARGET})
|
||||
endfunction()
|
@ -1,42 +0,0 @@
|
||||
UF2_FAMILY_ID = 0x2abc77ec
|
||||
SDK_DIR = hw/mcu/nxp/mcux-sdk
|
||||
|
||||
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5 #not found
|
||||
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
CPU_CORE ?= cortex-m33-nodsp-nofp
|
||||
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_MCXA \
|
||||
-DBOARD_TUD_RHPORT=0
|
||||
|
||||
# mcu driver cause following warnings
|
||||
CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
|
||||
|
||||
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
|
||||
|
||||
# All source paths should be relative to the top level.
|
||||
LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
|
||||
|
||||
# TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
|
||||
$(info "PORT0 Full Speed")
|
||||
CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
|
||||
SRC_C += src/portable/chipidea/ci_fs/dcd_ci_fs.c
|
||||
|
||||
SRC_C += \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_gpio.c \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_lpuart.c \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_common_arm.c \
|
||||
$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_spc.c
|
||||
INC += \
|
||||
$(TOP)/$(BOARD_PATH) \
|
||||
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
|
||||
$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \
|
||||
$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers
|
||||
|
||||
|
||||
SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
|
@ -1,149 +0,0 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V10.0.0
|
||||
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software. If you wish to use our Amazon
|
||||
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
// skip if included from IAR assembler
|
||||
#ifndef __IASMARM__
|
||||
#include "fsl_device_registers.h"
|
||||
#endif
|
||||
|
||||
/* Cortex M23/M33 port configuration. */
|
||||
#define configENABLE_MPU 0
|
||||
#define configENABLE_FPU 1
|
||||
#define configENABLE_TRUSTZONE 0
|
||||
#define configMINIMAL_SECURE_STACK_SIZE (1024)
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configCPU_CLOCK_HZ SystemCoreClock
|
||||
#define configTICK_RATE_HZ ( 1000 )
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configMINIMAL_STACK_SIZE ( 128 )
|
||||
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
|
||||
#define configMAX_TASK_NAME_LEN 16
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 4
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TIME_SLICING 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configENABLE_BACKWARD_COMPATIBILITY 1
|
||||
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
|
||||
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 0
|
||||
|
||||
/* Hook function related definitions. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configCHECK_HANDLER_INSTALLATION 0
|
||||
|
||||
/* Run time and task stats gathering related definitions. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define configRECORD_STACK_HIGH_ADDRESS 1
|
||||
#define configUSE_TRACE_FACILITY 1 // legacy trace
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES 2
|
||||
|
||||
/* Software timer related definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
|
||||
#define configTIMER_QUEUE_LENGTH 32
|
||||
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
|
||||
|
||||
/* Optional functions - most linkers will remove unused functions anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 0
|
||||
#define INCLUDE_uxTaskPriorityGet 0
|
||||
#define INCLUDE_vTaskDelete 0
|
||||
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
|
||||
#define INCLUDE_xResumeFromISR 0
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
|
||||
#define INCLUDE_pcTaskGetTaskName 0
|
||||
#define INCLUDE_eTaskGetState 0
|
||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 0
|
||||
|
||||
/* FreeRTOS hooks to NVIC vectors */
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
#define xPortSysTickHandler SysTick_Handler
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Interrupt nesting behavior configuration.
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
|
||||
#define configPRIO_BITS 3
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
#endif
|
@ -1,5 +0,0 @@
|
||||
int SetupTarget(void) {
|
||||
JLINK_ExecCommand("SetRTTSearchRanges 0x20000000 0x40000");
|
||||
|
||||
return 0;
|
||||
}
|
@ -100,10 +100,10 @@
|
||||
#define TUP_DCD_ENDPOINT_MAX 8
|
||||
#define TUP_RHPORT_HIGHSPEED 1
|
||||
|
||||
#elif TU_CHECK_MCU(OPT_MCU_MCXA)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_MCXA15)
|
||||
// USB0 is chipidea FS
|
||||
#define TUP_USBIP_CHIPIDEA_FS
|
||||
#define TUP_USBIP_CHIPIDEA_FS_MCXA
|
||||
#define TUP_USBIP_CHIPIDEA_FS_MCX
|
||||
|
||||
#define TUP_DCD_ENDPOINT_MAX 16
|
||||
|
||||
|
@ -29,19 +29,30 @@
|
||||
|
||||
#include "fsl_device_registers.h"
|
||||
|
||||
#define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE)
|
||||
#if CFG_TUSB_MCU == OPT_MCU_MCXN9
|
||||
#define CI_FS_REG(_port) ((ci_fs_regs_t*) USBFS0_BASE)
|
||||
#define USB0_IRQN USB0_FS_IRQn
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_MCXA15
|
||||
#define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE)
|
||||
#define USB0_IRQN USB0_IRQn
|
||||
|
||||
#else
|
||||
#error "MCU is not supported"
|
||||
#endif
|
||||
|
||||
#define CI_REG CI_FS_REG(0)
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(USB0_FS_IRQn);
|
||||
NVIC_EnableIRQ(USB0_IRQN);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(USB0_FS_IRQn);
|
||||
NVIC_DisableIRQ(USB0_IRQN);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
@ -1,47 +0,0 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2023 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
#ifndef _CI_FS_MCXA_H
|
||||
#define _CI_FS_MCXA_H
|
||||
|
||||
#include "fsl_device_registers.h"
|
||||
|
||||
#define CI_FS_REG(_port) ((ci_fs_regs_t*) USB0_BASE)
|
||||
#define CI_REG CI_FS_REG(0)
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(USB0_IRQn);
|
||||
}
|
||||
|
||||
#endif
|
@ -35,8 +35,6 @@
|
||||
#include "ci_fs_kinetis.h"
|
||||
#elif defined(TUP_USBIP_CHIPIDEA_FS_MCX)
|
||||
#include "ci_fs_mcx.h"
|
||||
#elif defined(TUP_USBIP_CHIPIDEA_FS_MCXA)
|
||||
#include "ci_fs_mcxa.h"
|
||||
#else
|
||||
#error "MCU is not supported"
|
||||
#endif
|
||||
|
@ -175,7 +175,7 @@
|
||||
|
||||
// NXP LPC MCX
|
||||
#define OPT_MCU_MCXN9 2300 ///< NXP MCX N9 Series
|
||||
#define OPT_MCU_MCXA 2301 ///< NXP MCX A Series
|
||||
#define OPT_MCU_MCXA15 2301 ///< NXP MCX A15 Series
|
||||
|
||||
// Check if configured MCU is one of listed
|
||||
// Apply _TU_CHECK_MCU with || as separator to list of input
|
||||
|
Loading…
x
Reference in New Issue
Block a user