From 5a7493ed42d4aa2519e7e3377ed7168a2ceca373 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 5 Dec 2018 21:12:10 +0700 Subject: [PATCH] fix more host build error --- examples/host/cdc_msc_hid/src/main.c | 4 ++-- src/host/ehci/ehci.c | 3 +-- src/host/usbh.c | 25 +++++++++++++------------ src/host/usbh.h | 2 +- src/osal/osal_none.h | 6 ++++++ src/tusb.c | 2 +- 6 files changed, 24 insertions(+), 18 deletions(-) diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index a8a34ef8f..2459ec329 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -58,11 +58,11 @@ int main(void) board_init(); print_greeting(); - //tusb_init(); + tusb_init(); while (1) { - //tusb_task(); + tusb_task(); led_blinking_task(); diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 1dbf03682..abf5e5613 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -180,9 +180,8 @@ static tusb_error_t hcd_controller_init(uint8_t hostid) //------------- CTRLDSSEGMENT Register (skip) -------------// //------------- USB INT Register -------------// regs->usb_int_enable = 0; // 1. disable all the interrupt -#ifndef _TEST_ // the fake controller does not have write-to-clear behavior regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status -#endif + regs->usb_int_enable = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | #if EHCI_PERIODIC_LIST EHCI_INT_MASK_NXP_PERIODIC | diff --git a/src/host/usbh.c b/src/host/usbh.c index a0df57657..80e59037f 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -152,13 +152,13 @@ uint32_t tuh_device_get_mounted_class_flag(uint8_t dev_addr) //--------------------------------------------------------------------+ // CLASS-USBD API (don't require to verify parameters) //--------------------------------------------------------------------+ -tusb_error_t usbh_init(void) +bool usbh_init(void) { tu_memclr(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1)); //------------- Enumeration & Reporter Task init -------------// _usbh_q = osal_queue_create( &_usbh_qdef ); - TU_ASSERT(_usbh_q, TUSB_ERROR_OSAL_QUEUE_FAILED); + TU_ASSERT(_usbh_q != NULL); osal_task_create(&_usbh_task_def); @@ -168,10 +168,10 @@ tusb_error_t usbh_init(void) usbh_device_info_t * const p_device = &usbh_devices[i]; p_device->control.sem_hdl = osal_semaphore_create(&p_device->control.sem_def); - TU_ASSERT(p_device->control.sem_hdl, TUSB_ERROR_OSAL_SEMAPHORE_FAILED); + TU_ASSERT(p_device->control.sem_hdl != NULL); p_device->control.mutex_hdl = osal_mutex_create(&p_device->control.mutex_def); - TU_ASSERT(p_device->control.mutex_hdl, TUSB_ERROR_OSAL_MUTEX_FAILED); + TU_ASSERT(p_device->control.mutex_hdl != NULL); } //------------- class init -------------// @@ -183,9 +183,10 @@ tusb_error_t usbh_init(void) } } - TU_ASSERT_ERR( hcd_init() ); + TU_ASSERT( hcd_init() == TUSB_ERROR_NONE ); + hcd_int_enable(TUH_OPT_RHPORT); - return TUSB_ERROR_NONE; + return true; } //------------- USBH control transfer -------------// @@ -199,7 +200,7 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, // OSAL_SUBTASK_BEGIN error = osal_mutex_lock(usbh_devices[dev_addr].control.mutex_hdl, OSAL_TIMEOUT_NORMAL); - STASK_ASSERT_ERR_HDLR(error, osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl)); + TU_VERIFY_ERR_HDLR(error, osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl)); usbh_devices[dev_addr].control.request = (tusb_control_request_t) { {.bmRequestType = bmRequestType}, @@ -214,9 +215,9 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, if ( TUSB_ERROR_NONE == error ) error = osal_semaphore_wait(usbh_devices[dev_addr].control.sem_hdl, OSAL_TIMEOUT_NORMAL); osal_mutex_unlock(usbh_devices[dev_addr].control.mutex_hdl); - STASK_ASSERT_ERR(error); - if (XFER_RESULT_STALLED == usbh_devices[dev_addr].control.pipe_status) STASK_RETURN(TUSB_ERROR_USBH_XFER_STALLED); - if (XFER_RESULT_FAILED == usbh_devices[dev_addr].control.pipe_status) STASK_RETURN(TUSB_ERROR_USBH_XFER_FAILED); + TU_ASSERT_ERR(error); + if (XFER_RESULT_STALLED == usbh_devices[dev_addr].control.pipe_status) return (TUSB_ERROR_USBH_XFER_STALLED); + if (XFER_RESULT_FAILED == usbh_devices[dev_addr].control.pipe_status) return (TUSB_ERROR_USBH_XFER_FAILED); // STASK_ASSERT_HDLR(TUSB_ERROR_NONE == error && // XFER_RESULT_SUCCESS == usbh_devices[dev_addr].control.pipe_status, @@ -228,7 +229,7 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) { osal_semaphore_reset( usbh_devices[dev_addr].control.sem_hdl ); - osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); + //osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl ); TU_ASSERT_ERR( hcd_pipe_control_open(dev_addr, max_packet_size) ); @@ -373,7 +374,7 @@ tusb_error_t usbh_task_body(void) static uint8_t configure_selected = 1; // TODO move static uint8_t *p_desc = NULL; // TODO move - if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return; + if ( !osal_queue_receive(_usbh_q, &enum_entry) ) return TUSB_ERROR_NONE; usbh_devices[0].core_id = enum_entry.core_id; // TODO refractor integrate to device_pool usbh_devices[0].hub_addr = enum_entry.hub_addr; diff --git a/src/host/usbh.h b/src/host/usbh.h index 22c85a5d0..f4433ae31 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -97,8 +97,8 @@ ATTR_WEAK void tuh_device_mount_failed_cb(tusb_error_t error, tusb_desc_devic //--------------------------------------------------------------------+ #ifdef _TINY_USB_SOURCE_FILE_ +bool usbh_init(void); void usbh_task(void* param); -tusb_error_t usbh_init(void); tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, uint8_t bmRequestType, uint8_t bRequest, uint16_t wValue, uint16_t wIndex, uint16_t wLength, uint8_t* data); diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 4d5a4dd57..042c7a6e8 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -62,6 +62,12 @@ static inline bool osal_task_create(osal_task_def_t* taskdef) return true; } +static inline void osal_task_delay(uint32_t msec) +{ + uint32_t start = tusb_hal_millis(); + while ( ( tusb_hal_millis() - start ) < msec ) {} +} + //--------------------------------------------------------------------+ // Binary Semaphore API //--------------------------------------------------------------------+ diff --git a/src/tusb.c b/src/tusb.c index 6d2b92dc8..931cc0ebe 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -56,7 +56,7 @@ bool tusb_init(void) if (_initialized) return true; #if MODE_HOST_SUPPORTED - TU_VERIFY( usbh_init() == TUSB_ERROR_NONE ); // init host stack + TU_VERIFY( usbh_init() ); // init host stack #endif #if TUSB_OPT_DEVICE_ENABLED