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Merge pull request #554 from hathach/initial-same7x

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Initial same7x
This commit is contained in:
Ha Thach 2020-11-09 11:22:29 +07:00 committed by GitHub
commit 589dfdb0e5
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GPG Key ID: 4AEE18F83AFDEB23
25 changed files with 6219 additions and 210 deletions
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12
examples/device/cdc_msc/ses/samd21/samd21.emProject
View File

@ -28,7 +28,7 @@
linker_memory_map_file="$(ProjectDir)/ATSAMD21G18A_MemoryMap.xml"
linker_section_placement_file="flash_placement.xml"
linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x20000000 0x00030000"
macros="DeviceFamily=SAMD21;Target=ATSAMD21G18A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/samd/asf4/samd21"
macros="DeviceFamily=SAMD21;Target=ATSAMD21G18A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/asf4/samd21"
project_directory=""
project_type="Executable"
target_reset_script="Reset();"
@ -54,22 +54,22 @@
<folder Name="asf4">
<folder Name="samd21">
<folder Name="gcc">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c" />
</folder>
<folder Name="hpl">
<folder Name="gclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c" />
</folder>
<folder Name="pm">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c" />
</folder>
<folder Name="sysctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c" />
</folder>
</folder>
<folder Name="hal">
<folder Name="src">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c" />
</folder>
</folder>
</folder>

14
examples/device/cdc_msc/ses/samd51/samd51.emProject
View File

@ -29,7 +29,7 @@
linker_memory_map_file="ATSAMD51J19A_MemoryMap.xml"
linker_section_placement_file="flash_placement.xml"
linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x20000000 0x00030000"
macros="DeviceFamily=SAMD51;Target=ATSAMD51J19A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/samd/asf4/samd51"
macros="DeviceFamily=SAMD51;Target=ATSAMD51J19A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/asf4/samd51"
project_directory=""
project_type="Executable"
target_reset_script="Reset();"
@ -55,25 +55,25 @@
<folder Name="asf4">
<folder Name="samd51">
<folder Name="gcc">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/gcc/system_samd51.c" />
</folder>
<folder Name="hpl">
<folder Name="osc32kctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c" />
</folder>
<folder Name="oscctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c" />
</folder>
<folder Name="mclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/mclk/hpl_mclk.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/mclk/hpl_mclk.c" />
</folder>
<folder Name="gclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/gclk/hpl_gclk.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/gclk/hpl_gclk.c" />
</folder>
</folder>
<folder Name="hal">
<folder Name="src">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hal/src/hal_atomic.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hal/src/hal_atomic.c" />
</folder>
</folder>
</folder>

12
examples/device/cdc_msc_freertos/ses/samd21/samd21.emProject
View File

@ -27,7 +27,7 @@
linker_memory_map_file="$(ProjectDir)/ATSAMD21G18A_MemoryMap.xml"
linker_section_placement_file="flash_placement.xml"
linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x20000000 0x00030000"
macros="DeviceFamily=SAMD21;Target=ATSAMD21G18A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/samd/asf4/samd21;freertosDir=../../../../../lib/FreeRTOS"
macros="DeviceFamily=SAMD21;Target=ATSAMD21G18A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/asf4/samd21;freertosDir=../../../../../lib/FreeRTOS"
project_directory=""
project_type="Executable"
target_reset_script="Reset();"
@ -52,20 +52,20 @@
<folder Name="asf4">
<folder Name="samd21">
<folder Name="gcc">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c" />
</folder>
<folder Name="hpl">
<folder Name="core">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/core/hpl_init.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/core/hpl_init.c" />
</folder>
<folder Name="gclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c" />
</folder>
<folder Name="pm">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c" />
</folder>
<folder Name="sysctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c" />
</folder>
</folder>
</folder>

14
examples/device/cdc_msc_freertos/ses/samd51/samd51.emProject
View File

@ -28,7 +28,7 @@
linker_memory_map_file="ATSAMD51J19A_MemoryMap.xml"
linker_section_placement_file="flash_placement.xml"
linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x20000000 0x00030000"
macros="DeviceFamily=SAMD51;Target=ATSAMD51J19A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/samd/asf4/samd51;freertosDir=../../../../../lib/FreeRTOS"
macros="DeviceFamily=SAMD51;Target=ATSAMD51J19A;Placement=Flash;rootDir=../../../../..;asf4Dir=../../../../../hw/mcu/microchip/asf4/samd51;freertosDir=../../../../../lib/FreeRTOS"
project_directory=""
project_type="Executable"
target_reset_script="Reset();"
@ -53,23 +53,23 @@
<folder Name="asf4">
<folder Name="samd51">
<folder Name="gcc">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/gcc/system_samd51.c" />
</folder>
<folder Name="hpl">
<folder Name="core">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/core/hpl_init.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/core/hpl_init.c" />
</folder>
<folder Name="osc32kctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c" />
</folder>
<folder Name="oscctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c" />
</folder>
<folder Name="mclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/mclk/hpl_mclk.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/mclk/hpl_mclk.c" />
</folder>
<folder Name="gclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/gclk/hpl_gclk.c" />
<file file_name="../../../../../hw/mcu/microchip/asf4/samd51/hpl/gclk/hpl_gclk.c" />
</folder>
</folder>
</folder>

30
hw/bsp/atsamd21_xpro/board.mk
View File

@ -12,23 +12,23 @@ CFLAGS += \
LD_FILE = hw/bsp/atsamd21_xpro/samd21j18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/circuitplayground_express/board.mk
View File

@ -11,23 +11,23 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/samd21g18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

24
hw/bsp/d5035_01/board.mk
View File

@ -21,30 +21,30 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/same51j19a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/same51/gcc/gcc/startup_same51.c \
hw/mcu/microchip/samd/asf4/same51/gcc/system_same51.c \
hw/mcu/microchip/asf4/same51/gcc/gcc/startup_same51.c \
hw/mcu/microchip/asf4/same51/gcc/system_same51.c \
ifdef SYSCALLS
ifneq ($(SYSCALLS),0)
SRC_C += hw/mcu/microchip/samd/asf4/same51/hal/utils/src/utils_syscalls.c
SRC_C += hw/mcu/microchip/asf4/same51/hal/utils/src/utils_syscalls.c
endif
endif
ifdef LOG
ifneq ($(LOG),0)
SRC_C += hw/mcu/microchip/samd/asf4/same51/hal/utils/src/utils_syscalls.c
SRC_C += hw/mcu/microchip/asf4/same51/hal/utils/src/utils_syscalls.c
endif
endif
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/ \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/config \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/include \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/same51/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/same51/ \
$(TOP)/hw/mcu/microchip/asf4/same51/config \
$(TOP)/hw/mcu/microchip/asf4/same51/include \
$(TOP)/hw/mcu/microchip/asf4/same51/hal/include \
$(TOP)/hw/mcu/microchip/asf4/same51/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/same51/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/same51/hri \
$(TOP)/hw/mcu/microchip/asf4/same51/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/feather_m0_express/board.mk
View File

@ -12,23 +12,23 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/samd21g18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/feather_m4_express/board.mk
View File

@ -15,23 +15,23 @@ CFLAGS += -Wno-error=undef
LD_FILE = hw/bsp/$(BOARD)/samd51g19a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd51/gcc/gcc/startup_samd51.c \
hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/mclk/hpl_mclk.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c \
hw/mcu/microchip/samd/asf4/samd51/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd51/gcc/gcc/startup_samd51.c \
hw/mcu/microchip/asf4/samd51/gcc/system_samd51.c \
hw/mcu/microchip/asf4/samd51/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd51/hpl/mclk/hpl_mclk.c \
hw/mcu/microchip/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c \
hw/mcu/microchip/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c \
hw/mcu/microchip/asf4/samd51/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd51/ \
$(TOP)/hw/mcu/microchip/asf4/samd51/config \
$(TOP)/hw/mcu/microchip/asf4/samd51/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd51/hri \
$(TOP)/hw/mcu/microchip/asf4/samd51/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/itsybitsy_m0/board.mk
View File

@ -12,23 +12,23 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/samd21g18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/itsybitsy_m4/board.mk
View File

@ -15,23 +15,23 @@ CFLAGS += -Wno-error=undef
LD_FILE = hw/bsp/$(BOARD)/samd51g19a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd51/gcc/gcc/startup_samd51.c \
hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/mclk/hpl_mclk.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c \
hw/mcu/microchip/samd/asf4/samd51/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd51/gcc/gcc/startup_samd51.c \
hw/mcu/microchip/asf4/samd51/gcc/system_samd51.c \
hw/mcu/microchip/asf4/samd51/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd51/hpl/mclk/hpl_mclk.c \
hw/mcu/microchip/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c \
hw/mcu/microchip/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c \
hw/mcu/microchip/asf4/samd51/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd51/ \
$(TOP)/hw/mcu/microchip/asf4/samd51/config \
$(TOP)/hw/mcu/microchip/asf4/samd51/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd51/hri \
$(TOP)/hw/mcu/microchip/asf4/samd51/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/luna/board.mk
View File

@ -12,23 +12,23 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/samd21g18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/metro_m0_express/board.mk
View File

@ -12,23 +12,23 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/samd21g18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

30
hw/bsp/metro_m4_express/board.mk
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@ -15,23 +15,23 @@ CFLAGS += -Wno-error=undef
LD_FILE = hw/bsp/$(BOARD)/samd51g19a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd51/gcc/gcc/startup_samd51.c \
hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/mclk/hpl_mclk.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c \
hw/mcu/microchip/samd/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c \
hw/mcu/microchip/samd/asf4/samd51/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd51/gcc/gcc/startup_samd51.c \
hw/mcu/microchip/asf4/samd51/gcc/system_samd51.c \
hw/mcu/microchip/asf4/samd51/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd51/hpl/mclk/hpl_mclk.c \
hw/mcu/microchip/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c \
hw/mcu/microchip/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c \
hw/mcu/microchip/asf4/samd51/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd51/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd51/ \
$(TOP)/hw/mcu/microchip/asf4/samd51/config \
$(TOP)/hw/mcu/microchip/asf4/samd51/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd51/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd51/hri \
$(TOP)/hw/mcu/microchip/asf4/samd51/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

58
hw/bsp/same70_xplained/board.mk Normal file
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@ -0,0 +1,58 @@
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m7 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-D__SAME70Q21B__ \
-DCFG_TUSB_MCU=OPT_MCU_NONE
# suppress following warnings from mcu driver
CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
ASF_DIR = hw/mcu/microchip/same70
# All source paths should be relative to the top level.
LD_FILE = $(ASF_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
SRC_C += \
$(ASF_DIR)/same70b/gcc/gcc/startup_same70q21b.c \
$(ASF_DIR)/same70b/gcc/system_same70q21b.c \
$(ASF_DIR)/hpl/core/hpl_init.c \
$(ASF_DIR)/hpl/usart/hpl_usart.c \
$(ASF_DIR)/hpl/pmc/hpl_pmc.c \
$(ASF_DIR)/hal/src/hal_usart_async.c \
$(ASF_DIR)/hal/src/hal_io.c \
$(ASF_DIR)/hal/src/hal_atomic.c \
$(ASF_DIR)/hal/utils/src/utils_ringbuffer.c
INC += \
$(TOP)/hw/bsp/$(BOARD) \
$(TOP)/$(ASF_DIR) \
$(TOP)/$(ASF_DIR)/config \
$(TOP)/$(ASF_DIR)/same70b/include \
$(TOP)/$(ASF_DIR)/hal/include \
$(TOP)/$(ASF_DIR)/hal/utils/include \
$(TOP)/$(ASF_DIR)/hpl/core \
$(TOP)/$(ASF_DIR)/hpl/pio \
$(TOP)/$(ASF_DIR)/hpl/pmc \
$(TOP)/$(ASF_DIR)/hri \
$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
# For TinyUSB port source
#SRC_C += src/portable/template/dcd_template.c
VENDOR = .
CHIP_FAMILY = template
# For freeRTOS port source
FREERTOS_PORT = ARM_CM7
# For flash-jlink target
JLINK_DEVICE = SAME70Q21B
# flash using edbg from https://github.com/ataradov/edbg
# Note: SAME70's GPNVM1 must be set to 1 to boot from flash with
# edbg -t same70 -F w0,1,1
flash: $(BUILD)/$(BOARD)-firmware.bin
edbg --verbose -t same70 -pv -f $<

1053
hw/bsp/same70_xplained/hpl_pmc_config.h Normal file
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215
hw/bsp/same70_xplained/hpl_usart_config.h Normal file
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@ -0,0 +1,215 @@
/* Auto-generated config file hpl_usart_config.h */
#ifndef HPL_USART_CONFIG_H
#define HPL_USART_CONFIG_H
// <<< Use Configuration Wizard in Context Menu >>>
#include <peripheral_clk_config.h>
#ifndef CONF_USART_1_ENABLE
#define CONF_USART_1_ENABLE 1
#endif
// <h> Basic Configuration
// <o> Frame parity
// <0x0=>Even parity
// <0x1=>Odd parity
// <0x2=>Parity forced to 0
// <0x3=>Parity forced to 1
// <0x4=>No parity
// <i> Parity bit mode for USART frame
// <id> usart_parity
#ifndef CONF_USART_1_PARITY
#define CONF_USART_1_PARITY 0x4
#endif
// <o> Character Size
// <0x0=>5 bits
// <0x1=>6 bits
// <0x2=>7 bits
// <0x3=>8 bits
// <i> Data character size in USART frame
// <id> usart_character_size
#ifndef CONF_USART_1_CHSIZE
#define CONF_USART_1_CHSIZE 0x3
#endif
// <o> Stop Bit
// <0=>1 stop bit
// <1=>1.5 stop bits
// <2=>2 stop bits
// <i> Number of stop bits in USART frame
// <id> usart_stop_bit
#ifndef CONF_USART_1_SBMODE
#define CONF_USART_1_SBMODE 0
#endif
// <o> Clock Output Select
// <0=>The USART does not drive the SCK pin
// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
// <id> usart_clock_output_select
#ifndef CONF_USART_1_CLKO
#define CONF_USART_1_CLKO 0
#endif
// <o> Baud rate <1-3000000>
// <i> USART baud rate setting
// <id> usart_baud_rate
#ifndef CONF_USART_1_BAUD
#define CONF_USART_1_BAUD 9600
#endif
// </h>
// <e> Advanced configuration
// <id> usart_advanced
#ifndef CONF_USART_1_ADVANCED_CONFIG
#define CONF_USART_1_ADVANCED_CONFIG 0
#endif
// <o> Channel Mode
// <0=>Normal Mode
// <1=>Automatic Echo
// <2=>Local Loopback
// <3=>Remote Loopback
// <i> Channel mode in USART frame
// <id> usart_channel_mode
#ifndef CONF_USART_1_CHMODE
#define CONF_USART_1_CHMODE 0
#endif
// <q> 9 bits character enable
// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
// <id> usart_9bits_enable
#ifndef CONF_USART_1_MODE9
#define CONF_USART_1_MODE9 0
#endif
// <o> Variable Sync
// <0=>User defined configuration
// <1=>sync field is updated when a character is written into US_THR
// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
// <id> variable_sync
#ifndef CONF_USART_1_VAR_SYNC
#define CONF_USART_1_VAR_SYNC 0
#endif
// <o> Oversampling Mode
// <0=>16 Oversampling
// <1=>8 Oversampling
// <i> Oversampling Mode in UART mode
// <id> usart__oversampling_mode
#ifndef CONF_USART_1_OVER
#define CONF_USART_1_OVER 0
#endif
// <o> Inhibit Non Ack
// <0=>The NACK is generated
// <1=>The NACK is not generated
// <i> Inhibit Non Acknowledge
// <id> usart__inack
#ifndef CONF_USART_1_INACK
#define CONF_USART_1_INACK 1
#endif
// <o> Disable Successive NACK
// <0=>NACK is sent on the ISO line as soon as a parity error occurs
// <1=>Many parity errors generate a NACK on the ISO line
// <i> Disable Successive NACK
// <id> usart_dsnack
#ifndef CONF_USART_1_DSNACK
#define CONF_USART_1_DSNACK 0
#endif
// <o> Inverted Data
// <0=>Data isn't inverted, nomal mode
// <1=>Data is inverted
// <i> Inverted Data
// <id> usart_invdata
#ifndef CONF_USART_1_INVDATA
#define CONF_USART_1_INVDATA 0
#endif
// <o> Maximum Number of Automatic Iteration <0-7>
// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
// <id> usart_max_iteration
#ifndef CONF_USART_1_MAX_ITERATION
#define CONF_USART_1_MAX_ITERATION 0
#endif
// <q> Receive Line Filter enable
// <i> whether the USART filters the receive line using a three-sample filter
// <id> usart_receive_filter_enable
#ifndef CONF_USART_1_FILTER
#define CONF_USART_1_FILTER 0
#endif
// <q> Manchester Encoder/Decoder Enable
// <i> whether the USART Manchester Encoder/Decoder
// <id> usart_manchester_filter_enable
#ifndef CONF_USART_1_MAN
#define CONF_USART_1_MAN 0
#endif
// <o> Manchester Synchronization Mode
// <0=>The Manchester start bit is a 0 to 1 transition
// <1=>The Manchester start bit is a 1 to 0 transition
// <i> Manchester Synchronization Mode
// <id> usart_manchester_synchronization_mode
#ifndef CONF_USART_1_MODSYNC
#define CONF_USART_1_MODSYNC 0
#endif
// <o> Start Frame Delimiter Selector
// <0=>Start frame delimiter is COMMAND or DATA SYNC
// <1=>Start frame delimiter is one bit
// <i> Start Frame Delimiter Selector
// <id> usart_start_frame_delimiter
#ifndef CONF_USART_1_ONEBIT
#define CONF_USART_1_ONEBIT 0
#endif
// <o> Fractional Part <0-7>
// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
// <id> usart_arch_fractional
#ifndef CONF_USART_1_FRACTIONAL
#define CONF_USART_1_FRACTIONAL 0x0
#endif
// <o> Data Order
// <0=>LSB is transmitted first
// <1=>MSB is transmitted first
// <i> Data order of the data bits in the frame
// <id> usart_arch_msbf
#ifndef CONF_USART_1_MSBF
#define CONF_USART_1_MSBF 0
#endif
// </e>
#define CONF_USART_1_MODE 0x0
// Calculate BAUD register value in UART mode
#if CONF_USART1_CK_SRC < 3
#ifndef CONF_USART_1_BAUD_CD
#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
#endif
#ifndef CONF_USART_1_BAUD_FP
#define CONF_USART_1_BAUD_FP \
((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
#endif
#elif CONF_USART1_CK_SRC == 3
// No division is active. The value written in US_BRGR has no effect.
#ifndef CONF_USART_1_BAUD_CD
#define CONF_USART_1_BAUD_CD 1
#endif
#ifndef CONF_USART_1_BAUD_FP
#define CONF_USART_1_BAUD_FP 1
#endif
#endif
// <<< end of configuration section >>>
#endif // HPL_USART_CONFIG_H

4400
hw/bsp/same70_xplained/hpl_xdmac_config.h Normal file
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126
hw/bsp/same70_xplained/peripheral_clk_config.h Normal file
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@ -0,0 +1,126 @@
/* Auto-generated config file peripheral_clk_config.h */
#ifndef PERIPHERAL_CLK_CONFIG_H
#define PERIPHERAL_CLK_CONFIG_H
// <<< Use Configuration Wizard in Context Menu >>>
/**
* \def CONF_HCLK_FREQUENCY
* \brief HCLK's Clock frequency
*/
#ifndef CONF_HCLK_FREQUENCY
#define CONF_HCLK_FREQUENCY 300000000
#endif
/**
* \def CONF_FCLK_FREQUENCY
* \brief FCLK's Clock frequency
*/
#ifndef CONF_FCLK_FREQUENCY
#define CONF_FCLK_FREQUENCY 300000000
#endif
/**
* \def CONF_CPU_FREQUENCY
* \brief CPU's Clock frequency
*/
#ifndef CONF_CPU_FREQUENCY
#define CONF_CPU_FREQUENCY 300000000
#endif
/**
* \def CONF_SLCK_FREQUENCY
* \brief Slow Clock frequency
*/
#define CONF_SLCK_FREQUENCY 0
/**
* \def CONF_MCK_FREQUENCY
* \brief Master Clock frequency
*/
#define CONF_MCK_FREQUENCY 150000000
/**
* \def CONF_PCK6_FREQUENCY
* \brief Programmable Clock Controller 6 frequency
*/
#define CONF_PCK6_FREQUENCY 1714285
// <h> USART Clock Settings
// <o> USART Clock source
// <0=> Master Clock (MCK)
// <1=> MCK / 8 for USART
// <2=> Programmable Clock Controller 4 (PMC_PCK4)
// <3=> External Clock
// <i> This defines the clock source for the USART
// <id> usart_clock_source
#ifndef CONF_USART1_CK_SRC
#define CONF_USART1_CK_SRC 0
#endif
// <o> USART External Clock Input on SCK <1-4294967295>
// <i> Inputs the external clock frequency on SCK
// <id> usart_clock_freq
#ifndef CONF_USART1_SCK_FREQ
#define CONF_USART1_SCK_FREQ 10000000
#endif
// </h>
/**
* \def USART FREQUENCY
* \brief USART's Clock frequency
*/
#ifndef CONF_USART1_FREQUENCY
#define CONF_USART1_FREQUENCY 150000000
#endif
#ifndef CONF_SRC_USB_480M
#define CONF_SRC_USB_480M 0
#endif
#ifndef CONF_SRC_USB_48M
#define CONF_SRC_USB_48M 1
#endif
// <y> USB Full/Low Speed Clock
// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
// <id> usb_fsls_clock_source
// <i> 48MHz clock source for low speed and full speed.
// <i> It must be available when low speed is supported by host driver.
// <i> It must be available when low power mode is selected.
#ifndef CONF_USBHS_FSLS_SRC
#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
#endif
// <y> USB Clock Source(Normal/Low-power Mode Selection)
// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
// <id> usb_clock_source
// <i> Select the clock source for USB.
// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
#ifndef CONF_USBHS_SRC
#define CONF_USBHS_SRC CONF_SRC_USB_480M
#endif
/**
* \def CONF_USBHS_FSLS_FREQUENCY
* \brief USBHS's Full/Low Speed Clock Source frequency
*/
#ifndef CONF_USBHS_FSLS_FREQUENCY
#define CONF_USBHS_FSLS_FREQUENCY 48000000
#endif
/**
* \def CONF_USBHS_FREQUENCY
* \brief USBHS's Selected Clock Source frequency
*/
#ifndef CONF_USBHS_FREQUENCY
#define CONF_USBHS_FREQUENCY 480000000
#endif
// <<< end of configuration section >>>
#endif // PERIPHERAL_CLK_CONFIG_H

167
hw/bsp/same70_xplained/same70_xplained.c Normal file
View File

@ -0,0 +1,167 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2019, hathach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#include "sam.h"
#include "bsp/board.h"
#include "peripheral_clk_config.h"
#include "hpl/usart/hpl_usart_base.h"
#include "hpl/pmc/hpl_pmc.h"
#include "hal/include/hal_init.h"
#include "hal/include/hal_usart_async.h"
#include "hal/include/hal_gpio.h"
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
#define LED_PIN GPIO(GPIO_PORTC, 8)
#define BUTTON_PIN GPIO(GPIO_PORTA, 11)
#define BUTTON_STATE_ACTIVE 0
#define UART_TX_PIN GPIO(GPIO_PORTB, 4)
#define UART_RX_PIN GPIO(GPIO_PORTA, 21)
static struct usart_async_descriptor edbg_com;
static uint8_t edbg_com_buffer[64];
static volatile bool uart_busy = false;
static void tx_cb_EDBG_COM(const struct usart_async_descriptor *const io_descr)
{
uart_busy = false;
}
//------------- IMPLEMENTATION -------------//
void board_init(void)
{
init_mcu();
/* Disable Watchdog */
hri_wdt_set_MR_WDDIS_bit(WDT);
// LED
_pmc_enable_periph_clock(ID_PIOC);
gpio_set_pin_level(LED_PIN, false);
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
// Button
_pmc_enable_periph_clock(ID_PIOA);
gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
// Uart via EDBG Com
_pmc_enable_periph_clock(ID_USART1);
gpio_set_pin_function(UART_RX_PIN, MUX_PA21A_USART1_RXD1);
gpio_set_pin_function(UART_TX_PIN, MUX_PB4D_USART1_TXD1);
usart_async_init(&edbg_com, USART1, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_cb_EDBG_COM);
// usart_async_register_callback(&EDBG_COM, USART_ASYNC_RXC_CB, rx_cb_EDBG_COM);
usart_async_enable(&edbg_com);
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
#endif
#if 0
// USB Pin, Clock init
/* Clear SYSIO 10 & 11 for USB DM & DP */
hri_matrix_clear_CCFG_SYSIO_reg(MATRIX, CCFG_SYSIO_SYSIO10 | CCFG_SYSIO_SYSIO11);
// Enable clock
_pmc_enable_periph_clock(ID_UDP);
/* USB Device mode & Transceiver active */
hri_matrix_write_CCFG_USBMR_reg(MATRIX, CCFG_USBMR_USBMODE);
#endif
}
//--------------------------------------------------------------------+
// USB Interrupt Handler
//--------------------------------------------------------------------+
void UDP_Handler(void)
{
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
tud_int_handler(0);
#endif
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
gpio_set_pin_level(LED_PIN, state);
}
uint32_t board_button_read(void)
{
return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
// while until previous transfer is complete
while(uart_busy) {}
uart_busy = true;
io_write(&edbg_com.io, buf, len);
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void)
{
}

14
hw/bsp/samg55xplained/samg55xplained.c
View File

@ -45,7 +45,7 @@
#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
struct _usart_sync_device _edbg_com;
struct _usart_sync_device edbg_com;
//------------- IMPLEMENTATION -------------//
void board_init(void)
@ -72,10 +72,10 @@ void board_init(void)
gpio_set_pin_function(UART_RX_PIN, MUX_PA27B_FLEXCOM7_RXD);
gpio_set_pin_function(UART_TX_PIN, MUX_PA28B_FLEXCOM7_TXD);
_usart_sync_init(&_edbg_com, FLEXCOM7);
_usart_sync_set_baud_rate(&_edbg_com, CFG_BOARD_UART_BAUDRATE);
_usart_sync_set_mode(&_edbg_com, USART_MODE_ASYNCHRONOUS);
_usart_sync_enable(&_edbg_com);
_usart_sync_init(&edbg_com, FLEXCOM7);
_usart_sync_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
_usart_sync_set_mode(&edbg_com, USART_MODE_ASYNCHRONOUS);
_usart_sync_enable(&edbg_com);
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
@ -129,8 +129,8 @@ int board_uart_write(void const * buf, int len)
uint8_t const * buf8 = (uint8_t const *) buf;
for(int i=0; i<len; i++)
{
while ( !_usart_sync_is_ready_to_send(&_edbg_com) ) {}
_usart_sync_write_byte(&_edbg_com, buf8[i]);
while ( !_usart_sync_is_ready_to_send(&edbg_com) ) {}
_usart_sync_write_byte(&edbg_com, buf8[i]);
}
return len;
}

30
hw/bsp/seeeduino_xiao/board.mk
View File

@ -12,23 +12,23 @@ CFLAGS += \
LD_FILE = hw/bsp/$(BOARD)/samd21g18a_flash.ld
SRC_C += \
hw/mcu/microchip/samd/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/samd/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/samd/asf4/samd21/hal/src/hal_atomic.c
hw/mcu/microchip/asf4/samd21/gcc/gcc/startup_samd21.c \
hw/mcu/microchip/asf4/samd21/gcc/system_samd21.c \
hw/mcu/microchip/asf4/samd21/hpl/gclk/hpl_gclk.c \
hw/mcu/microchip/asf4/samd21/hpl/pm/hpl_pm.c \
hw/mcu/microchip/asf4/samd21/hpl/sysctrl/hpl_sysctrl.c \
hw/mcu/microchip/asf4/samd21/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/samd/asf4/samd21/CMSIS/Include
$(TOP)/hw/mcu/microchip/asf4/samd21/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/config \
$(TOP)/hw/mcu/microchip/asf4/samd21/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hal/utils/include \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/pm/ \
$(TOP)/hw/mcu/microchip/asf4/samd21/hpl/port \
$(TOP)/hw/mcu/microchip/asf4/samd21/hri \
$(TOP)/hw/mcu/microchip/asf4/samd21/CMSIS/Include
# For TinyUSB port source
VENDOR = microchip

2
hw/mcu/microchip

@ -1 +1 @@
Subproject commit 434e384e8f1c6a05377f82e1f0796467a2267ad5
Subproject commit 6fd71727de19733a96766fb93990d7d3ab24ce8a

14
src/portable/template/dcd_template.c
View File

@ -45,20 +45,6 @@ void dcd_init (uint8_t rhport)
(void) rhport;
}
#if HAS_INTERNAL_PULLUP
// Enable internal D+/D- pullup
void dcd_connect(uint8_t rhport) TU_ATTR_WEAK
{
(void) rhport;
}
// Disable internal D+/D- pullup
void dcd_disconnect(uint8_t rhport) TU_ATTR_WEAK
{
(void) rhport;
}
#endif
// Enable device interrupt
void dcd_int_enable (uint8_t rhport)
{

4
tools/build_all.py
View File

@ -76,6 +76,10 @@ def skip_example(example, board):
if 'CROSS_COMPILE = xtensa-esp32s2-elf-' in mk_contents:
return 1
# Skip all OPT_MCU_NONE these are WIP port
if '-DCFG_TUSB_MCU=OPT_MCU_NONE' in mk_contents:
return 1
# Skip if CFG_TUSB_MCU in board.mk to match skip file
for skip_file in glob.iglob(ex_dir + '/.skip.MCU_*'):
mcu_cflag = '-DCFG_TUSB_MCU=OPT_' + os.path.basename(skip_file).split('.')[2]