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revert dcd_edpt_xfer_fifo() implementation for samg

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samg fifo is accessed byte by byte (although the register is 32 bit).
This commit is contained in:
hathach 2021-04-04 21:33:19 +07:00
parent 1ac9e7e3a7
commit 586a46c7d3
1 changed files with 6 additions and 23 deletions
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29
src/portable/microchip/samg/dcd_samg.c
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@ -297,34 +297,13 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
return true;
}
#if 0 // TODO support dcd_edpt_xfer_fifo API
bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
{
(void) rhport;
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr);
xfer_desc_t* xfer = &_dcd_xfer[epnum];
xfer->total_len = total_bytes;
xfer->actual_len = 0;
xfer->buffer = NULL; // Indicates a FIFO shall be used
xfer->ff = ff;
if (dir == TUSB_DIR_OUT)
{
// Enable interrupt when starting OUT transfer
if (epnum != 0) UDP->UDP_IER |= (1 << epnum);
}
else
{
tu_fifo_read_n(ff, (void *) &UDP->UDP_FDR[epnum], xfer_packet_len(xfer));
// TX ready for transfer
csr_set(epnum, UDP_CSR_TXPKTRDY_Msk);
}
return true;
}
#endif
// Stall endpoint
void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
@ -435,11 +414,13 @@ void dcd_int_handler(uint8_t rhport)
if (xact_len)
{
// write to EP fifo
#if 0 // TODO support dcd_edpt_xfer_fifo
if (xfer->ff)
{
tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *) &UDP->UDP_FDR[epnum], xact_len);
}
else
#endif
{
xact_ep_write(epnum, xfer->buffer, xact_len);
}
@ -468,11 +449,13 @@ void dcd_int_handler(uint8_t rhport)
uint16_t const xact_len = (uint16_t) ((UDP->UDP_CSR[epnum] & UDP_CSR_RXBYTECNT_Msk) >> UDP_CSR_RXBYTECNT_Pos);
// Read from EP fifo
#if 0 // TODO support dcd_edpt_xfer_fifo API
if (xfer->ff)
{
tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void *) &UDP->UDP_FDR[epnum], xact_len);
}
else
#endif
{
xact_ep_read(epnum, xfer->buffer, xact_len);
}