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[STM32 FSDEV] Introduce a typedef for bus access width

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Okarss 2024-01-11 00:59:39 +02:00
parent 0d4b24e56c
commit 545821399b
2 changed files with 8 additions and 5 deletions
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10
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
View File

@ -673,13 +673,13 @@ void dcd_int_handler(uint8_t rhport) {
/* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */ /* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
if(int_status & USB_ISTR_SOF) { if(int_status & USB_ISTR_SOF) {
USB->ISTR = ~USB_ISTR_SOF; USB->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
dcd_event_sof(0, USB->FNR & USB_FNR_FN, true); dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
} }
if(int_status & USB_ISTR_RESET) { if(int_status & USB_ISTR_RESET) {
// USBRST is start of reset. // USBRST is start of reset.
USB->ISTR = ~USB_ISTR_RESET; USB->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
dcd_handle_bus_reset(); dcd_handle_bus_reset();
dcd_event_bus_reset(0, TUSB_SPEED_FULL, true); dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
return; // Don't do the rest of the things here; perhaps they've been cleared? return; // Don't do the rest of the things here; perhaps they've been cleared?
@ -697,7 +697,7 @@ void dcd_int_handler(uint8_t rhport) {
USB->CNTR &= ~USB_CNTR_LPMODE; USB->CNTR &= ~USB_CNTR_LPMODE;
USB->CNTR &= ~USB_CNTR_FSUSP; USB->CNTR &= ~USB_CNTR_FSUSP;
USB->ISTR = ~USB_ISTR_WKUP; USB->ISTR = (fsdev_bus_t)~USB_ISTR_WKUP;
dcd_event_bus_signal(0, DCD_EVENT_RESUME, true); dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
} }
@ -711,7 +711,7 @@ void dcd_int_handler(uint8_t rhport) {
USB->CNTR |= USB_CNTR_LPMODE; USB->CNTR |= USB_CNTR_LPMODE;
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
USB->ISTR = ~USB_ISTR_SUSP; USB->ISTR = (fsdev_bus_t)~USB_ISTR_SUSP;
dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true); dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
} }
@ -724,7 +724,7 @@ void dcd_int_handler(uint8_t rhport) {
{ {
remoteWakeCountdown--; remoteWakeCountdown--;
} }
USB->ISTR = ~USB_ISTR_ESOF; USB->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
} }
} }

3
src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
View File

@ -173,8 +173,11 @@
// For type-safety create a new macro for the volatile address of PMAADDR // For type-safety create a new macro for the volatile address of PMAADDR
// The compiler should warn us if we cast it to a non-volatile type? // The compiler should warn us if we cast it to a non-volatile type?
#ifdef PMA_32BIT_ACCESS #ifdef PMA_32BIT_ACCESS
typedef uint32_t fsdev_bus_t;
static __IO uint32_t * const pma32 = (__IO uint32_t*)USB_PMAADDR; static __IO uint32_t * const pma32 = (__IO uint32_t*)USB_PMAADDR;
#else #else
typedef uint16_t fsdev_bus_t;
// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden) // Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR; static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;