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[STM32 FSDEV] Introduce a typedef for bus access width
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@ -673,13 +673,13 @@ void dcd_int_handler(uint8_t rhport) {
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/* Put SOF flag at the beginning of ISR in case to get least amount of jitter if it is used for timing purposes */
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if(int_status & USB_ISTR_SOF) {
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USB->ISTR = ~USB_ISTR_SOF;
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_SOF;
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dcd_event_sof(0, USB->FNR & USB_FNR_FN, true);
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}
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if(int_status & USB_ISTR_RESET) {
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// USBRST is start of reset.
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USB->ISTR = ~USB_ISTR_RESET;
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_RESET;
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dcd_handle_bus_reset();
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dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
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return; // Don't do the rest of the things here; perhaps they've been cleared?
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@ -697,7 +697,7 @@ void dcd_int_handler(uint8_t rhport) {
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USB->CNTR &= ~USB_CNTR_LPMODE;
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USB->CNTR &= ~USB_CNTR_FSUSP;
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USB->ISTR = ~USB_ISTR_WKUP;
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_WKUP;
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dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
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}
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@ -711,7 +711,7 @@ void dcd_int_handler(uint8_t rhport) {
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USB->CNTR |= USB_CNTR_LPMODE;
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/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
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USB->ISTR = ~USB_ISTR_SUSP;
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_SUSP;
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dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
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}
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@ -724,7 +724,7 @@ void dcd_int_handler(uint8_t rhport) {
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{
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remoteWakeCountdown--;
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}
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USB->ISTR = ~USB_ISTR_ESOF;
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USB->ISTR = (fsdev_bus_t)~USB_ISTR_ESOF;
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}
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}
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@ -173,8 +173,11 @@
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// For type-safety create a new macro for the volatile address of PMAADDR
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// The compiler should warn us if we cast it to a non-volatile type?
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#ifdef PMA_32BIT_ACCESS
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typedef uint32_t fsdev_bus_t;
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static __IO uint32_t * const pma32 = (__IO uint32_t*)USB_PMAADDR;
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#else
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typedef uint16_t fsdev_bus_t;
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// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
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static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
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