mirror of
https://github.com/hathach/tinyusb.git
synced 2025-03-14 04:18:56 +00:00
rename endpoint_handle_t to edpt_hdl_t
This commit is contained in:
parent
6392903fb2
commit
539fbe5d62
@ -373,7 +373,7 @@ static inline volatile uint32_t * get_reg_control_addr(uint8_t port, uint8_t phy
|
||||
return &(LPC_USB[port]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
|
||||
}
|
||||
|
||||
void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl)
|
||||
void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
volatile uint32_t * reg_control = get_reg_control_addr(edpt_hdl.port, edpt_hdl.index);
|
||||
|
||||
@ -389,7 +389,7 @@ void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
|
||||
(*reg_control) &= ~(ENDPTCTRL_MASK_STALL << ((edpt_addr & TUSB_DIR_DEV_TO_HOST_MASK) ? 16 : 0));
|
||||
}
|
||||
|
||||
bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, endpoint_handle_t* eh)
|
||||
bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh)
|
||||
{
|
||||
// TODO USB1 only has 4 non-control enpoint (USB0 has 5)
|
||||
// TODO not support ISO yet
|
||||
@ -421,7 +421,7 @@ bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoi
|
||||
return true;
|
||||
}
|
||||
|
||||
bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
|
||||
bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
dcd_qhd_t const * p_qhd = &dcd_data_ptr[edpt_hdl.port]->qhd[edpt_hdl.index];
|
||||
|
||||
@ -430,7 +430,7 @@ bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
|
||||
}
|
||||
|
||||
// add only, controller virtually cannot know
|
||||
static tusb_error_t pipe_add_xfer(endpoint_handle_t edpt_hdl, void * buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
static tusb_error_t pipe_add_xfer(edpt_hdl_t edpt_hdl, void * buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
uint8_t qtd_idx = qtd_find_free(edpt_hdl.port);
|
||||
ASSERT(qtd_idx != 0, TUSB_ERROR_DCD_NOT_ENOUGH_QTD);
|
||||
@ -458,12 +458,12 @@ static tusb_error_t pipe_add_xfer(endpoint_handle_t edpt_hdl, void * buffer, uin
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
return pipe_add_xfer( edpt_hdl, buffer, total_bytes, false);
|
||||
}
|
||||
|
||||
tusb_error_t hal_dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
tusb_error_t hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
ASSERT_STATUS ( pipe_add_xfer(edpt_hdl, buffer, total_bytes, int_on_complete) );
|
||||
|
||||
@ -486,7 +486,7 @@ void xfer_complete_isr(uint8_t port, uint32_t reg_complete)
|
||||
{ // 23.10.12.3 Failed QTD also get ENDPTCOMPLETE set
|
||||
dcd_qhd_t * p_qhd = &dcd_data_ptr[port]->qhd[ep_idx];
|
||||
|
||||
endpoint_handle_t edpt_hdl =
|
||||
edpt_hdl_t edpt_hdl =
|
||||
{
|
||||
.port = port,
|
||||
.index = ep_idx,
|
||||
@ -576,7 +576,7 @@ void hal_dcd_isr(uint8_t port)
|
||||
|
||||
if ( p_qtd->int_on_complete )
|
||||
{
|
||||
endpoint_handle_t edpt_hdl =
|
||||
edpt_hdl_t edpt_hdl =
|
||||
{
|
||||
.port = port,
|
||||
.index = 0,
|
||||
|
@ -58,7 +58,7 @@ typedef struct {
|
||||
|
||||
bool connected;
|
||||
|
||||
endpoint_handle_t edpt_hdl[3]; // notification, data in, data out
|
||||
edpt_hdl_t edpt_hdl[3]; // notification, data in, data out
|
||||
}cdcd_data_t;
|
||||
|
||||
// TODO multiple port
|
||||
@ -177,7 +177,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
ASSERT_(TUSB_DESC_TYPE_ENDPOINT == p_endpoint->bDescriptorType, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
|
||||
ASSERT_(TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
|
||||
|
||||
endpoint_handle_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
|
||||
edpt_hdl_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
|
||||
&p_cdc->edpt_hdl[CDC_PIPE_DATA_IN] : &p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT] ;
|
||||
|
||||
ASSERT_( hal_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
|
||||
@ -255,7 +255,7 @@ tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t c
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t cdcd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
tusb_error_t cdcd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
cdcd_data_t const * p_cdc = &cdcd_data[edpt_hdl.port];
|
||||
|
||||
@ -277,7 +277,7 @@ void cdcd_sof(uint8_t port)
|
||||
{
|
||||
if ( !tud_cdc_connected(port) ) return;
|
||||
|
||||
endpoint_handle_t ep = cdcd_data[port].edpt_hdl[CDC_PIPE_DATA_IN];
|
||||
edpt_hdl_t ep = cdcd_data[port].edpt_hdl[CDC_PIPE_DATA_IN];
|
||||
|
||||
if ( !dcd_pipe_is_busy( ep ) )
|
||||
{
|
||||
|
@ -79,7 +79,7 @@ void tud_cdc_rx_cb(uint8_t port);
|
||||
void cdcd_init(void);
|
||||
tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
|
||||
tusb_error_t cdcd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
tusb_error_t cdcd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void cdcd_close(uint8_t port);
|
||||
|
||||
void cdcd_sof(uint8_t port);
|
||||
|
@ -59,7 +59,7 @@ typedef struct {
|
||||
uint8_t const * p_report_desc;
|
||||
uint16_t report_length;
|
||||
|
||||
endpoint_handle_t ept_handle;
|
||||
edpt_hdl_t ept_handle;
|
||||
uint8_t interface_number;
|
||||
}hidd_interface_t;
|
||||
|
||||
@ -303,7 +303,7 @@ tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t hidd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
tusb_error_t hidd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
for(uint8_t i=0; i<HIDD_NUMBER_OF_SUBCLASS; i++)
|
||||
{
|
||||
|
@ -203,7 +203,7 @@ void tud_hid_mouse_set_report_cb(uint8_t port, hid_request_report_type_t report_
|
||||
void hidd_init(void);
|
||||
tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t hidd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
|
||||
tusb_error_t hidd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
tusb_error_t hidd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void hidd_close(uint8_t port);
|
||||
|
||||
#endif
|
||||
|
@ -62,7 +62,7 @@ typedef struct {
|
||||
|
||||
uint8_t max_lun;
|
||||
uint8_t interface_number;
|
||||
endpoint_handle_t edpt_in, edpt_out;
|
||||
edpt_hdl_t edpt_in, edpt_out;
|
||||
}mscd_interface_t;
|
||||
|
||||
TUSB_CFG_ATTR_USBRAM STATIC_VAR mscd_interface_t mscd_data;
|
||||
@ -98,7 +98,7 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
|
||||
ASSERT(TUSB_DESC_TYPE_ENDPOINT == p_endpoint->bDescriptorType &&
|
||||
TUSB_XFER_BULK == p_endpoint->bmAttributes.xfer, TUSB_ERROR_DESCRIPTOR_CORRUPTED);
|
||||
|
||||
endpoint_handle_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
|
||||
edpt_hdl_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
|
||||
&p_msc->edpt_in : &p_msc->edpt_out;
|
||||
|
||||
VERIFY( hal_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
|
||||
@ -142,7 +142,7 @@ tusb_error_t mscd_control_request_subtask(uint8_t port, tusb_control_request_t c
|
||||
//--------------------------------------------------------------------+
|
||||
// MSCD APPLICATION CALLBACK
|
||||
//--------------------------------------------------------------------+
|
||||
tusb_error_t mscd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
tusb_error_t mscd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
static bool is_waiting_read10_write10 = false; // indicate we are transferring data in READ10, WRITE10 command
|
||||
|
||||
@ -182,7 +182,7 @@ tusb_error_t mscd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32
|
||||
ASSERT( p_cbw->xfer_bytes >= actual_length, TUSB_ERROR_INVALID_PARA );
|
||||
ASSERT( sizeof(p_msc->scsi_data) >= actual_length, TUSB_ERROR_NOT_ENOUGH_MEMORY); // needs to increase size for scsi_data
|
||||
|
||||
endpoint_handle_t const edpt_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->edpt_in : p_msc->edpt_out;
|
||||
edpt_hdl_t const edpt_data = BIT_TEST_(p_cbw->dir, 7) ? p_msc->edpt_in : p_msc->edpt_out;
|
||||
|
||||
if ( p_buffer == NULL || actual_length == 0 )
|
||||
{ // application does not provide data to response --> possibly unsupported SCSI command
|
||||
@ -224,7 +224,7 @@ static bool read10_write10_data_xfer(mscd_interface_t* p_msc)
|
||||
|
||||
scsi_read10_t* p_readwrite = (scsi_read10_t*) &p_cbw->command; // read10 & write10 has the same format
|
||||
|
||||
endpoint_handle_t const edpt_hdl = BIT_TEST_(p_cbw->dir, 7) ? p_msc->edpt_in : p_msc->edpt_out;
|
||||
edpt_hdl_t const edpt_hdl = BIT_TEST_(p_cbw->dir, 7) ? p_msc->edpt_in : p_msc->edpt_out;
|
||||
|
||||
uint32_t const lba = __be2n(p_readwrite->lba);
|
||||
uint16_t const block_count = __be2n_16(p_readwrite->block_count);
|
||||
|
@ -124,7 +124,7 @@ msc_csw_status_t tud_msc_scsi_cb (uint8_t port, uint8_t lun, uint8_t scsi_cmd[16
|
||||
void mscd_init(void);
|
||||
tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_interface_desc, uint16_t *p_length);
|
||||
tusb_error_t mscd_control_request_subtask(uint8_t port, tusb_control_request_t const * p_request);
|
||||
tusb_error_t mscd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
tusb_error_t mscd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void mscd_close(uint8_t port);
|
||||
|
||||
#endif
|
||||
|
@ -62,9 +62,9 @@ typedef enum
|
||||
typedef struct {
|
||||
uint8_t port;
|
||||
uint8_t index; // must be zero to indicate control
|
||||
} endpoint_handle_t;
|
||||
} edpt_hdl_t;
|
||||
|
||||
static inline bool edpt_equal(endpoint_handle_t x, endpoint_handle_t y)
|
||||
static inline bool edpt_equal(edpt_hdl_t x, edpt_hdl_t y)
|
||||
{
|
||||
return (x.port == y.port) && (x.index == y.index);
|
||||
}
|
||||
@ -79,22 +79,22 @@ void hal_dcd_set_config (uint8_t port, uint8_t config_num);
|
||||
/*------------- Event function -------------*/
|
||||
void hal_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event);
|
||||
void hal_dcd_setup_received(uint8_t port, uint8_t const* p_request);
|
||||
void usbd_xfer_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
void usbd_xfer_isr(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
|
||||
|
||||
//------------- PIPE API -------------//
|
||||
bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
|
||||
void hal_dcd_control_stall(uint8_t port);
|
||||
|
||||
bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, endpoint_handle_t* eh);
|
||||
bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh);
|
||||
|
||||
|
||||
tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
|
||||
tusb_error_t hal_dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
|
||||
tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
|
||||
tusb_error_t hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
|
||||
|
||||
bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl);
|
||||
bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl);
|
||||
|
||||
// TODO port + endpoint address are part of endpoint handle, not endpoint handle, data toggle also need to be reset
|
||||
void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl);
|
||||
void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl);
|
||||
void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
@ -159,7 +159,7 @@ static void endpoint_non_control_isr(uint32_t eot_int)
|
||||
|
||||
if ( p_last_dd->int_on_complete )
|
||||
{
|
||||
endpoint_handle_t edpt_hdl =
|
||||
edpt_hdl_t edpt_hdl =
|
||||
{
|
||||
.port = 0,
|
||||
.index = ep_id,
|
||||
@ -204,7 +204,7 @@ static void endpoint_control_isr(void)
|
||||
|
||||
if ( BIT_TEST_(dcd_data.control_dma.int_on_complete, ep_id) )
|
||||
{
|
||||
endpoint_handle_t edpt_hdl = { .port = 0, .class_code = 0 };
|
||||
edpt_hdl_t edpt_hdl = { .port = 0, .class_code = 0 };
|
||||
dcd_data.control_dma.int_on_complete = 0;
|
||||
|
||||
// FIXME xferred_byte for control xfer is not needed now !!!
|
||||
@ -412,11 +412,11 @@ bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer
|
||||
//--------------------------------------------------------------------+
|
||||
// BULK/INTERRUPT/ISO PIPE API
|
||||
//--------------------------------------------------------------------+
|
||||
endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
edpt_hdl_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
{
|
||||
(void) port;
|
||||
|
||||
endpoint_handle_t const null_handle = { 0 };
|
||||
edpt_hdl_t const null_handle = { 0 };
|
||||
|
||||
// TODO refractor to universal pipe open validation function
|
||||
if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; // TODO not support ISO yet
|
||||
@ -440,7 +440,7 @@ endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t con
|
||||
|
||||
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+ep_id, 1, 0); // clear all endpoint status
|
||||
|
||||
return (endpoint_handle_t)
|
||||
return (edpt_hdl_t)
|
||||
{
|
||||
.port = 0,
|
||||
.index = ep_id,
|
||||
@ -448,12 +448,12 @@ endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t con
|
||||
};
|
||||
}
|
||||
|
||||
bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
|
||||
bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
return (dcd_data.udca[edpt_hdl.index] != NULL && !dcd_data.udca[edpt_hdl.index]->is_retired);
|
||||
}
|
||||
|
||||
void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl)
|
||||
void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+edpt_hdl.index, 1, SIE_SET_ENDPOINT_STALLED_MASK);
|
||||
}
|
||||
@ -476,7 +476,7 @@ void dd_xfer_init(dcd_dma_descriptor_t* p_dd, void* buffer, uint16_t total_bytes
|
||||
p_dd->present_count = 0;
|
||||
}
|
||||
|
||||
tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
{ // NOTE for sure the qhd has no dds
|
||||
dcd_dma_descriptor_t* const p_fixed_dd = &dcd_data.dd[edpt_hdl.index][0]; // always queue with the fixed DD
|
||||
|
||||
@ -487,7 +487,7 @@ tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, u
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t hal_dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
tusb_error_t hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
dcd_dma_descriptor_t* const p_first_dd = &dcd_data.dd[edpt_hdl.index][0];
|
||||
|
||||
|
@ -246,7 +246,7 @@ static void endpoint_non_control_isr(uint32_t int_status)
|
||||
|
||||
if ( BIT_TEST_(dcd_data.current_ioc, ep_id) )
|
||||
{
|
||||
endpoint_handle_t edpt_hdl =
|
||||
edpt_hdl_t edpt_hdl =
|
||||
{
|
||||
.port = 0,
|
||||
.index = ep_id,
|
||||
@ -286,7 +286,7 @@ static void endpoint_control_isr(uint32_t int_status)
|
||||
|
||||
if ( BIT_TEST_(dcd_data.current_ioc, ep_id) )
|
||||
{
|
||||
endpoint_handle_t edpt_hdl = { .port = 0 };
|
||||
edpt_hdl_t edpt_hdl = { .port = 0 };
|
||||
|
||||
dcd_data.current_ioc = BIT_CLR_(dcd_data.current_ioc, ep_id);
|
||||
|
||||
@ -428,12 +428,12 @@ static inline uint8_t edpt_phy2log(uint8_t physical_endpoint)
|
||||
//--------------------------------------------------------------------+
|
||||
// BULK/INTERRUPT/ISOCHRONOUS PIPE API
|
||||
//--------------------------------------------------------------------+
|
||||
void hal_dcd_pipe_stall(endpoint_handle_t edpt_hdl)
|
||||
void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
dcd_data.qhd[edpt_hdl.index][0].stall = dcd_data.qhd[edpt_hdl.index][1].stall = 1;
|
||||
}
|
||||
|
||||
bool dcd_pipe_is_stalled(endpoint_handle_t edpt_hdl)
|
||||
bool dcd_pipe_is_stalled(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
return dcd_data.qhd[edpt_hdl.index][0].stall || dcd_data.qhd[edpt_hdl.index][1].stall;
|
||||
}
|
||||
@ -456,10 +456,10 @@ void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
|
||||
}
|
||||
}
|
||||
|
||||
endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
edpt_hdl_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
{
|
||||
(void) port;
|
||||
endpoint_handle_t const null_handle = { 0 };
|
||||
edpt_hdl_t const null_handle = { 0 };
|
||||
|
||||
if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle; // TODO not support ISO yet
|
||||
|
||||
@ -481,7 +481,7 @@ endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t con
|
||||
LPC_USB->EPBUFCFG |= BIT_(ep_id);
|
||||
LPC_USB->INTEN |= BIT_(ep_id);
|
||||
|
||||
return (endpoint_handle_t)
|
||||
return (edpt_hdl_t)
|
||||
{
|
||||
.port = 0,
|
||||
.index = ep_id,
|
||||
@ -489,7 +489,7 @@ endpoint_handle_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t con
|
||||
};
|
||||
}
|
||||
|
||||
bool dcd_pipe_is_busy(endpoint_handle_t edpt_hdl)
|
||||
bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
return dcd_data.qhd[edpt_hdl.index][0].active || dcd_data.qhd[edpt_hdl.index][1].active;
|
||||
}
|
||||
@ -535,7 +535,7 @@ static void queue_xfer_in_next_td(uint8_t ep_id)
|
||||
dcd_data.next_td[ep_id].total_bytes = 0; // clear this field as it is used to indicate whehther next TD available
|
||||
}
|
||||
|
||||
tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
ASSERT( !dcd_pipe_is_busy(edpt_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); // endpoint must not in transferring
|
||||
|
||||
@ -546,7 +546,7 @@ tusb_error_t dcd_pipe_queue_xfer(endpoint_handle_t edpt_hdl, uint8_t * buffer, u
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t hal_dcd_pipe_xfer(endpoint_handle_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
tusb_error_t hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
if( dcd_pipe_is_busy(edpt_hdl) || dcd_pipe_is_stalled(edpt_hdl) )
|
||||
{ // save this transfer data to next td if pipe is busy or already been stalled
|
||||
|
@ -138,7 +138,7 @@ typedef struct ATTR_ALIGNED(4)
|
||||
tusb_control_request_t setup_received;
|
||||
|
||||
struct { // USBD_EVENTID_XFER_DONE
|
||||
endpoint_handle_t edpt_hdl;
|
||||
edpt_hdl_t edpt_hdl;
|
||||
uint32_t xferred_byte;
|
||||
}xfer_done;
|
||||
};
|
||||
@ -498,7 +498,7 @@ void hal_dcd_setup_received(uint8_t port, uint8_t const* p_request)
|
||||
osal_queue_send(usbd_queue_hdl, &task_event);
|
||||
}
|
||||
|
||||
void usbd_xfer_isr(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
void usbd_xfer_isr(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes)
|
||||
{
|
||||
if (edpt_hdl.index == 0 )
|
||||
{
|
||||
|
@ -80,7 +80,7 @@ typedef struct {
|
||||
void (* init) (void);
|
||||
tusb_error_t (* open)(uint8_t, tusb_descriptor_interface_t const *, uint16_t*);
|
||||
tusb_error_t (* control_request_subtask) (uint8_t port, tusb_control_request_t const *);
|
||||
tusb_error_t (* xfer_cb) (endpoint_handle_t, tusb_event_t, uint32_t);
|
||||
tusb_error_t (* xfer_cb) (edpt_hdl_t, tusb_event_t, uint32_t);
|
||||
// void (* routine)(void);
|
||||
void (* sof)(uint8_t port);
|
||||
void (* close) (uint8_t);
|
||||
|
Loading…
x
Reference in New Issue
Block a user