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add handling for software configurable interrupts.

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This commit is contained in:
kkitayam 2021-06-26 22:42:27 +09:00
parent 60fedaa050
commit 511b2d47d1
2 changed files with 10 additions and 6 deletions
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5
hw/bsp/rx63n/boards/rx65n_cloud_kit/board.mk
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@ -1,7 +1,10 @@
CFLAGS += \ CFLAGS += \
-mcpu=rx64m \ -mcpu=rx64m \
-misa=v2 \ -misa=v2 \
-DCFG_TUSB_MCU=OPT_MCU_RX65X -DCFG_TUSB_MCU=OPT_MCU_RX65X \
-DIR_USB0_USBI0=IR_PERIB_INTB185 \
-DIER_USB0_USBI0=IER_PERIB_INTB185 \
-DIEN_USB0_USBI0=IEN_PERIB_INTB185
RX_NEWLIB ?= 1 RX_NEWLIB ?= 1

11
hw/bsp/rx63n/boards/rx65n_cloud_kit/rx65n_cloud_kit.c
View File

@ -52,10 +52,7 @@
#define INT_Excep_SCI5_TEI5 INT_Excep_ICU_GROUPBL0 #define INT_Excep_SCI5_TEI5 INT_Excep_ICU_GROUPBL0
#define IRQ_USB0_USBI0 62 #define IRQ_USB0_USBI0 62
#define IEN_USB0_USBI0 IEN_PERIB_INTB185 #define SLIBR_USBI0 SLIBR185
#define VECT_USB0_USBI0 VECT_PERIB_INTB185
#define IR_USB0_USBI0 IR_PERIB_INTB185
#define IER_USB0_USBI0 IER_PERIB_INTB185
#define IPR_USB0_USBI0 IPR_PERIB_INTB185 #define IPR_USB0_USBI0 IPR_PERIB_INTB185
#define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185 #define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185
@ -158,6 +155,10 @@ void INT_Excep_USB0_USBI0(void)
void board_init(void) void board_init(void)
{ {
/* setup software configurable interrupts */
ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0;
ICU.SLIPRCR.BYTE = 1;
#if CFG_TUSB_OS == OPT_OS_NONE #if CFG_TUSB_OS == OPT_OS_NONE
/* Enable CMT0 */ /* Enable CMT0 */
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
@ -216,7 +217,7 @@ void board_init(void)
IEN(ICU,GROUPBL0) = 1; IEN(ICU,GROUPBL0) = 1;
EN(SCI5, TEI5) = 1; EN(SCI5, TEI5) = 1;
/* setup USBI0 interrupt. Group B edge */ /* setup USBI0 interrupt. */
IR(USB0, USBI0) = 0; IR(USB0, USBI0) = 0;
IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
} }