Merge pull request #120 from hathach/develop

Ported STM32F412 Discovery board, close #102
2025-04-10 12:44:55 +00:00 · 2019-09-09 00:53:05 +07:00 · 2019-09-09 00:53:05 +07:00 · 4fe34c8f9b
commit 4fe34c8f9b
parent 6b7fe012f6 f808153631
31 changed files with 1695 additions and 424 deletions
--- a/README.md
+++ b/README.md
@ -61,7 +61,7 @@ The stack supports the following MCUs

 ## Compiler & IDE

-The stack is developed with GCC compiler, and should be compilable with others. Folder `examples` provide Makefile and Segger Embedded Studio build support.
+The stack is developed with GCC compiler, and should be compilable with others. Folder `examples` provide Makefile and Segger Embedded Studio build support. [Here is instruction to build example](examples/readme.md).

 ## Getting Started

--- a/docs/boards.md
+++ b/docs/boards.md
@ -14,11 +14,14 @@ This code base already had supported for a handful of following boards
 - [Adafruit Feather nRF52840 Express](https://www.adafruit.com/product/4062)
 - [Adafruit Circuit Playground Bluefruit](https://www.adafruit.com/product/4333)
 - [Nordic nRF52840 Development Kit (aka pca10056)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK)
+- [Nordic nRF52840 Dongle (aka pca10059)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle)

 ### NXP LPC

- [LPCXpresso 11U68](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc11u68:OM13058)
+- [LPCXpresso 11u37](https://www.nxp.com/design/microcontrollers-developer-resources/lpcxpresso-boards/lpcxpresso-board-for-lpc11u37h:OM13074)
+- [LPCXpresso 11u68](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc11u68:OM13058)
 - [LPCXpresso 1347](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc1347:OM13045)
+- [ARM mbed LPC1768](https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1700-cortex-m3/arm-mbed-lpc1768-board:OM11043)
 - [LPCXpresso 1769](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc1769:OM13000)
 - [Keil MCB1800 Evaluation Board](http://www.keil.com/mcb1800)
 - [Embedded Artists LPC4088 Quick Start board](https://www.embeddedartists.com/products/lpc4088-quickstart-board)
@ -39,6 +42,7 @@ This code base already had supported for a handful of following boards

 - [STM32F407g Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html)
 - [STM32F411e Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html)
+- [STM32F412g Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html)
 - [Nucleo H743zi](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html)

 ## Add your own board
--- a/examples/device/cdc_msc_hid/src/msc_disk.c
+++ b/examples/device/cdc_msc_hid/src/msc_disk.c
@ -30,7 +30,8 @@

 // Some MCU doesn't have enough 8KB SRAM to store the whole disk
 // We will use Flash as read-only disk
-#if CFG_TUSB_MCU == OPT_MCU_LPC13XX
+// - LPC1347, LPC11uxx
+#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX)
 #define DISK_READONLY
 #endif

--- a/examples/device/cdc_msc_hid/src/tusb_config.h
+++ b/examples/device/cdc_msc_hid/src/tusb_config.h
@ -75,12 +75,13 @@
 #define CFG_TUD_CDC              1
 #define CFG_TUD_MSC              1

-#if CFG_TUSB_MCU == OPT_MCU_STM32F4
-// STM32F4 does not have enough endpoints (4, including hardcoded control
+// Some STM32 MCUs does not have enough endpoints (4, including control
 // endpoint) to enable CDC, MSC, and HID simultaneously, so disable HID as a compromise.
-#define CFG_TUD_HID              0
+#if CFG_TUSB_MCU == OPT_MCU_STM32F4
+  #include "stm32f4xx.h"
+  #define CFG_TUD_HID            ((USB_OTG_FS_MAX_IN_ENDPOINTS > 4) ? 1 : 0)
 #else
-#define CFG_TUD_HID              1
+  #define CFG_TUD_HID            1
 #endif

 #define CFG_TUD_MIDI             0
--- a/examples/device/cdc_msc_hid_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_hid_freertos/src/msc_disk.c
@ -30,7 +30,8 @@

 // Some MCU doesn't have enough 8KB SRAM to store the whole disk
 // We will use Flash as read-only disk
-#if CFG_TUSB_MCU == OPT_MCU_LPC13XX
+// - LPC1347, LPC11uxx
+#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX)
 #define DISK_READONLY
 #endif

--- a/examples/device/msc_dual_lun/src/msc_disk_dual.c
+++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c
@ -30,7 +30,8 @@

 // Some MCU doesn't have enough 8KB SRAM to store the whole disk
 // We will use Flash as read-only disk
-#if CFG_TUSB_MCU == OPT_MCU_LPC13XX
+// - LPC1347, LPC11uxx
+#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX)
 #define DISK_READONLY
 #endif

--- a/examples/readme.md
+++ b/examples/readme.md
@ -1,3 +1,38 @@
 # Examples

-Build and Run example instructions
+## Clone this repo
+
+```
+$ git clone https://github.com/hathach/tinyusb tinyusb
+$ cd tinyusb
+```
+
+## Fetch submodule MCUs drivers
+
+TinyUSB examples includes external repos aka submodules to provide low-level MCU peripheral's driver to compile with. Therefore we will firstly fetch those mcu driver repo by running this command in the top folder repo
+
+```
+$ git submodule update --init --rescursive
+```
+
+It will takes a bit of time due to the number of supported MCUs, luckily we only need to do this once.
+
+## Build
+
+[Here is the list of supported Boards](docs/boards.md) that should work out of the box with provided examples. 
+ 
+To build example, go to its folder project then type `make BOARD=[our_board] all` e.g
+
+```
+$ cd examples/device/cdc_msc_hid
+$ make BOARD=feather_nrf52840_express all
+```
+
+## Flash
+
+TODO: write more on flashing
+
+```
+$ make BOARD=feather_nrf52840_express flash
+```
+
--- a/examples/rules.mk
+++ b/examples/rules.mk
@ -43,7 +43,7 @@ endif

 # Set all as default goal
 .DEFAULT_GOAL := all
-all: $(BUILD)/$(BOARD)-firmware.bin size
+all: $(BUILD)/$(BOARD)-firmware.bin $(BUILD)/$(BOARD)-firmware.hex size

 uf2: $(BUILD)/$(BOARD)-firmware.uf2

--- a/hw/bsp/ea4088qs/board.mk
+++ b/hw/bsp/ea4088qs/board.mk
@ -8,6 +8,9 @@ CFLAGS += \
  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
  -D__USE_LPCOPEN

+# lpc_types.h cause following errors
+CFLAGS += -Wno-error=strict-prototypes
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/ea4088qs/lpc4088.ld

--- a/hw/bsp/lpcxpresso11u37/board.mk
+++ b/hw/bsp/lpcxpresso11u37/board.mk
@ -0,0 +1,45 @@
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m0 \
+  -nostdlib \
+  -DCORE_M0 \
+  -D__USE_LPCOPEN \
+  -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
+  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
+  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 
+
+# startup.c and lpc_types.h cause following errors
+CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes
+
+MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11uxx
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/lpcxpresso11u37/lpc11u37.ld
+
+SRC_C += \
+	$(MCU_DIR)/cr_startup_lpc11xx.c \
+	$(MCU_DIR)/lpc_chip_11uxx/src/chip_11xx.c \
+	$(MCU_DIR)/lpc_chip_11uxx/src/clock_11xx.c \
+	$(MCU_DIR)/lpc_chip_11uxx/src/gpio_11xx_1.c \
+	$(MCU_DIR)/lpc_chip_11uxx/src/iocon_11xx.c \
+	$(MCU_DIR)/lpc_chip_11uxx/src/sysctl_11xx.c \
+	$(MCU_DIR)/lpc_chip_11uxx/src/sysinit_11xx.c
+
+INC += \
+	$(TOP)/$(MCU_DIR)/lpc_chip_11uxx/inc
+
+# For TinyUSB port source
+VENDOR = nxp
+CHIP_FAMILY = lpc_ip3511
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM0
+
+# For flash-jlink target
+JLINK_DEVICE = LPC11U37/401
+JLINK_IF = swd
+
+# flash using pyocd 
+flash: $(BUILD)/$(BOARD)-firmware.hex
+	pyocd flash -t lpc11u37 $<
--- a/hw/bsp/lpcxpresso11u37/lpc11u37.ld
+++ b/hw/bsp/lpcxpresso11u37/lpc11u37.ld
@ -0,0 +1,195 @@
+/*
+ * GENERATED FILE - DO NOT EDIT
+ * Copyright (c) 2008-2013 Code Red Technologies Ltd,
+ * Copyright 2015, 2018-2019 NXP
+ * (c) NXP Semiconductors 2013-2019
+ * Generated linker script file for LPC11U37/401
+ * Created from linkscript.ldt by FMCreateLinkLibraries
+ * Using Freemarker v2.3.23
+ * MCUXpresso IDE v11.0.0 [Build 2516] [2019-06-05] on Sep 6, 2019 12:16:06 PM
+ */
+
+MEMORY
+{
+  /* Define each memory region */
+  MFlash128 (rx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias Flash) */  
+  RamLoc8 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x2000 /* 8K bytes (alias RAM) */  
+  RamUsb2 (rwx) : ORIGIN = 0x20004000, LENGTH = 0x800 /* 2K bytes (alias RAM2) */  
+}
+
+  /* Define a symbol for the top of each memory region */
+  __base_MFlash128 = 0x0  ; /* MFlash128 */  
+  __base_Flash = 0x0 ; /* Flash */  
+  __top_MFlash128 = 0x0 + 0x20000 ; /* 128K bytes */  
+  __top_Flash = 0x0 + 0x20000 ; /* 128K bytes */  
+  __base_RamLoc8 = 0x10000000  ; /* RamLoc8 */  
+  __base_RAM = 0x10000000 ; /* RAM */  
+  __top_RamLoc8 = 0x10000000 + 0x2000 ; /* 8K bytes */  
+  __top_RAM = 0x10000000 + 0x2000 ; /* 8K bytes */  
+  __base_RamUsb2 = 0x20004000  ; /* RamUsb2 */  
+  __base_RAM2 = 0x20004000 ; /* RAM2 */  
+  __top_RamUsb2 = 0x20004000 + 0x800 ; /* 2K bytes */  
+  __top_RAM2 = 0x20004000 + 0x800 ; /* 2K bytes */  
+
+
+ENTRY(ResetISR)
+
+SECTIONS
+{
+     /* MAIN TEXT SECTION */
+    .text : ALIGN(4)
+    {
+        FILL(0xff)
+        __vectors_start__ = ABSOLUTE(.) ;
+        KEEP(*(.isr_vector))
+        /* Global Section Table */
+        . = ALIGN(4) ;
+        __section_table_start = .;
+        __data_section_table = .;
+        LONG(LOADADDR(.data));
+        LONG(    ADDR(.data));
+        LONG(  SIZEOF(.data));
+        LONG(LOADADDR(.data_RAM2));
+        LONG(    ADDR(.data_RAM2));
+        LONG(  SIZEOF(.data_RAM2));
+        __data_section_table_end = .;
+        __bss_section_table = .;
+        LONG(    ADDR(.bss));
+        LONG(  SIZEOF(.bss));
+        LONG(    ADDR(.bss_RAM2));
+        LONG(  SIZEOF(.bss_RAM2));
+        __bss_section_table_end = .;
+        __section_table_end = . ;
+        /* End of Global Section Table */
+
+        *(.after_vectors*)
+
+    } > MFlash128
+
+    .text : ALIGN(4)
+    {
+       *(.text*)
+       *(.rodata .rodata.* .constdata .constdata.*)
+       . = ALIGN(4);
+    } > MFlash128
+    /*
+     * for exception handling/unwind - some Newlib functions (in common
+     * with C++ and STDC++) use this. 
+     */
+    .ARM.extab : ALIGN(4) 
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > MFlash128
+
+    __exidx_start = .;
+
+    .ARM.exidx : ALIGN(4)
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > MFlash128
+    __exidx_end = .;
+ 
+    _etext = .;
+        
+    /* DATA section for RamUsb2 */
+
+    .data_RAM2 : ALIGN(4)
+    {
+        FILL(0xff)
+        PROVIDE(__start_data_RAM2 = .) ;
+        *(.ramfunc.$RAM2)
+        *(.ramfunc.$RamUsb2)
+        *(.data.$RAM2)
+        *(.data.$RamUsb2)
+        *(.data.$RAM2.*)
+        *(.data.$RamUsb2.*)
+        . = ALIGN(4) ;
+        PROVIDE(__end_data_RAM2 = .) ;
+     } > RamUsb2 AT>MFlash128
+    /* MAIN DATA SECTION */
+    .uninit_RESERVED (NOLOAD) :
+    {
+        . = ALIGN(4) ;
+        KEEP(*(.bss.$RESERVED*))
+       . = ALIGN(4) ;
+        _end_uninit_RESERVED = .;
+    } > RamLoc8
+
+    /* Main DATA section (RamLoc8) */
+    .data : ALIGN(4)
+    {
+       FILL(0xff)
+       _data = . ;
+       *(vtable)
+       *(.ramfunc*)
+       *(.data*)
+       . = ALIGN(4) ;
+       _edata = . ;
+    } > RamLoc8 AT>MFlash128
+
+    /* BSS section for RamUsb2 */
+    .bss_RAM2 :
+    {
+       . = ALIGN(4) ;
+       PROVIDE(__start_bss_RAM2 = .) ;
+       *(.bss.$RAM2)
+       *(.bss.$RamUsb2)
+       *(.bss.$RAM2.*)
+       *(.bss.$RamUsb2.*)
+       . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
+       PROVIDE(__end_bss_RAM2 = .) ;
+    } > RamUsb2
+
+    /* MAIN BSS SECTION */
+    .bss :
+    {
+        . = ALIGN(4) ;
+        _bss = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4) ;
+        _ebss = .;
+        PROVIDE(end = .);
+    } > RamLoc8
+
+    /* NOINIT section for RamUsb2 */
+    .noinit_RAM2 (NOLOAD) :
+    {
+       . = ALIGN(4) ;
+       *(.noinit.$RAM2)
+       *(.noinit.$RamUsb2)
+       *(.noinit.$RAM2.*)
+       *(.noinit.$RamUsb2.*)
+       . = ALIGN(4) ;
+    } > RamUsb2
+
+    /* DEFAULT NOINIT SECTION */
+    .noinit (NOLOAD):
+    {
+         . = ALIGN(4) ;
+        _noinit = .;
+        *(.noinit*)
+         . = ALIGN(4) ;
+        _end_noinit = .;
+    } > RamLoc8
+    PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
+    PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0);
+
+    /* ## Create checksum value (used in startup) ## */
+    PROVIDE(__valid_user_code_checksum = 0 - 
+                                         (_vStackTop 
+                                         + (ResetISR + 1) 
+                                         + (( DEFINED(NMI_Handler) ? NMI_Handler : M0_NMI_Handler ) + 1) 
+                                         + (( DEFINED(HardFault_Handler) ? HardFault_Handler : M0_HardFault_Handler ) + 1) 
+                                         )
+           );
+
+    /* Provide basic symbols giving location and size of main text
+     * block, including initial values of RW data sections. Note that
+     * these will need extending to give a complete picture with
+     * complex images (e.g multiple Flash banks).
+     */
+    _image_start = LOADADDR(.text);
+    _image_end = LOADADDR(.data) + SIZEOF(.data);
+    _image_size = _image_end - _image_start;
+}
--- a/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
+++ b/hw/bsp/lpcxpresso11u37/lpcxpresso11u37.c
@ -0,0 +1,203 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "chip.h"
+#include "../board.h"
+
+#define LED_PORT              1
+#define LED_PIN               24
+#define LED_STATE_ON          0
+
+// Wake up Switch
+#define BUTTON_PORT           0
+#define BUTTON_PIN            16
+#define BUTTON_STATE_ACTIVE   0
+
+/* System oscillator rate and RTC oscillator rate */
+const uint32_t OscRateIn = 12000000;
+const uint32_t ExtRateIn = 0;
+
+/* Pin muxing table, only items that need changing from their default pin
+   state are in this table. Not every pin is mapped. */
+/* IOCON pin definitions for pin muxing */
+typedef struct {
+	uint32_t port : 8;			/* Pin port */
+	uint32_t pin : 8;			/* Pin number */
+	uint32_t modefunc : 16;		/* Function and mode */
+} PINMUX_GRP_T;
+
+static const PINMUX_GRP_T pinmuxing[] =
+{
+  {0,  3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS
+  {0,  6, (IOCON_FUNC1 | IOCON_MODE_INACT)},		/* PIO0_6 used for USB_CONNECT */
+
+  {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX
+  {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX
+};
+
+
+#if 1
+/* Setup system clocking */
+static void SystemSetupClocking(void)
+{
+	volatile int i;
+
+	/* Powerup main oscillator */
+	Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD);
+
+	/* Wait 200us for OSC to be stablized, no status
+	   indication, dummy wait. */
+	for (i = 0; i < 0x100; i++) {}
+
+	/* Set system PLL input to main oscillator */
+	Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
+
+	/* Power down PLL to change the PLL divider ratio */
+	Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD);
+
+	/* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz
+	   MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
+	   FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
+	   FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
+	Chip_Clock_SetupSystemPLL(3, 1);
+
+	/* Powerup system PLL */
+	Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD);
+
+	/* Wait for PLL to lock */
+	while (!Chip_Clock_IsSystemPLLLocked()) {}
+
+	/* Set system clock divider to 1 */
+	Chip_Clock_SetSysClockDiv(1);
+
+	/* Setup FLASH access to 3 clocks */
+	Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU);
+
+	/* Set main clock source to the system PLL. This will drive 48MHz
+	   for the main clock and 48MHz for the system clock */
+	Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT);
+
+	/* Set USB PLL input to main oscillator */
+	Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
+	/* Setup USB PLL  (FCLKIN = 12MHz) * 4 = 48MHz
+	   MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
+	   FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
+	   FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
+	Chip_Clock_SetupUSBPLL(3, 1);
+
+	/* Powerup USB PLL */
+	Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
+
+	/* Wait for PLL to lock */
+	while (!Chip_Clock_IsUSBPLLLocked()) {}
+}
+#endif
+
+// Invoked by startup code
+void SystemInit(void)
+{
+  SystemSetupClocking();
+//  Chip_SystemInit();
+  Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_RAM1);
+
+  /* Enable IOCON clock */
+  Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
+  for (uint32_t i = 0; i < (sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); i++)
+  {
+		Chip_IOCON_PinMuxSet(LPC_IOCON, pinmuxing[i].port, pinmuxing[i].pin, pinmuxing[i].modefunc);
+	}
+}
+
+void board_init(void)
+{
+  SystemCoreClockUpdate();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+  Chip_GPIO_Init(LPC_GPIO);
+
+  // LED
+  Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
+
+  // Button
+  Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
+
+  // USB: Setup PLL clock, and power
+	/* enable USB main clock */
+	Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1);
+	/* Enable AHB clock to the USB block and USB RAM. */
+	Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB);
+	Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM);
+	/* power UP USB Phy */
+	Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
--- a/hw/bsp/lpcxpresso11u68/board.mk
+++ b/hw/bsp/lpcxpresso11u68/board.mk
@ -10,19 +10,22 @@ CFLAGS += \
  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 

+MCU_DIR = hw/mcu/nxp/lpc_driver/lpc11u6x
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/lpcxpresso11u68/lpc11u68.ld

 SRC_C += \
-	hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/chip_11u6x.c \
-	hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/clock_11u6x.c \
-	hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/gpio_11u6x.c \
-	hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/iocon_11u6x.c \
-	hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/syscon_11u6x.c \
-	hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/src/sysinit_11u6x.c
+	$(MCU_DIR)/cr_startup_lpc11u6x.c \
+	$(MCU_DIR)/lpc_chip_11u6x/src/chip_11u6x.c \
+	$(MCU_DIR)/lpc_chip_11u6x/src/clock_11u6x.c \
+	$(MCU_DIR)/lpc_chip_11u6x/src/gpio_11u6x.c \
+	$(MCU_DIR)/lpc_chip_11u6x/src/iocon_11u6x.c \
+	$(MCU_DIR)/lpc_chip_11u6x/src/syscon_11u6x.c \
+	$(MCU_DIR)/lpc_chip_11u6x/src/sysinit_11u6x.c

 INC += \
-	$(TOP)/hw/mcu/nxp/lpc_driver/lpc_chip_11u6x/inc
+	$(TOP)/$(MCU_DIR)/lpc_chip_11u6x/inc

 # For TinyUSB port source
 VENDOR = nxp
--- a/hw/bsp/lpcxpresso11u68/cr_startup_lpc11u6x.c
+++ b/hw/bsp/lpcxpresso11u68/cr_startup_lpc11u6x.c
@ -1,352 +0,0 @@
-//*****************************************************************************
-// LPC11U6x Microcontroller Startup code for use with LPCXpresso IDE
-//
-// Version : 140113
-//*****************************************************************************
-//
-// Copyright(C) NXP Semiconductors, 2014
-// All rights reserved.
-//
-// Software that is described herein is for illustrative purposes only
-// which provides customers with programming information regarding the
-// LPC products.  This software is supplied "AS IS" without any warranties of
-// any kind, and NXP Semiconductors and its licensor disclaim any and
-// all warranties, express or implied, including all implied warranties of
-// merchantability, fitness for a particular purpose and non-infringement of
-// intellectual property rights.  NXP Semiconductors assumes no responsibility
-// or liability for the use of the software, conveys no license or rights under any
-// patent, copyright, mask work right, or any other intellectual property rights in
-// or to any products. NXP Semiconductors reserves the right to make changes
-// in the software without notification. NXP Semiconductors also makes no
-// representation or warranty that such application will be suitable for the
-// specified use without further testing or modification.
-//
-// Permission to use, copy, modify, and distribute this software and its
-// documentation is hereby granted, under NXP Semiconductors' and its
-// licensor's relevant copyrights in the software, without fee, provided that it
-// is used in conjunction with NXP Semiconductors microcontrollers.  This
-// copyright, permission, and disclaimer notice must appear in all copies of
-// this code.
-//*****************************************************************************
-
-#if defined (__cplusplus)
-#ifdef __REDLIB__
-#error Redlib does not support C++
-#else
-//*****************************************************************************
-//
-// The entry point for the C++ library startup
-//
-//*****************************************************************************
-extern "C" {
-    extern void __libc_init_array(void);
-}
-#endif
-#endif
-
-#define WEAK __attribute__ ((weak))
-#define ALIAS(f) __attribute__ ((weak, alias (#f)))
-
-//*****************************************************************************
-#if defined (__cplusplus)
-extern "C" {
-#endif
-
-//*****************************************************************************
-#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
-// Declaration of external SystemInit function
-extern void SystemInit(void);
-#endif
-
-// Patch the AEABI integer divide functions to use MCU's romdivide library
-#ifdef __USE_ROMDIVIDE
-// Location in memory that holds the address of the ROM Driver table
-#define PTR_ROM_DRIVER_TABLE ((unsigned int *)(0x1FFF1FF8))
-// Variables to store addresses of idiv and udiv functions within MCU ROM
-unsigned int *pDivRom_idiv;
-unsigned int *pDivRom_uidiv;
-#endif
-
-//*****************************************************************************
-//
-// Forward declaration of the default handlers. These are aliased.
-// When the application defines a handler (with the same name), this will 
-// automatically take precedence over these weak definitions
-//
-//*****************************************************************************
-     void ResetISR(void);
-WEAK void NMI_Handler(void);
-WEAK void HardFault_Handler(void);
-WEAK void SVC_Handler(void);
-WEAK void PendSV_Handler(void);
-WEAK void SysTick_Handler(void);
-WEAK void IntDefaultHandler(void);
-//*****************************************************************************
-//
-// Forward declaration of the specific IRQ handlers. These are aliased
-// to the IntDefaultHandler, which is a 'forever' loop. When the application
-// defines a handler (with the same name), this will automatically take
-// precedence over these weak definitions
-//
-//*****************************************************************************
-void PIN_INT0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT2_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT3_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT4_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT5_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT6_IRQHandler (void) ALIAS(IntDefaultHandler);
-void PIN_INT7_IRQHandler (void) ALIAS(IntDefaultHandler);
-void GINT0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void GINT1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void I2C1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void USART1_4_IRQHandler (void) ALIAS(IntDefaultHandler);
-void USART2_3_IRQHandler (void) ALIAS(IntDefaultHandler);
-void SCT0_1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void SSP1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void I2C0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void TIMER16_0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void TIMER16_1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void TIMER32_0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void TIMER32_1_IRQHandler (void) ALIAS(IntDefaultHandler);
-void SSP0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void USART0_IRQHandler (void) ALIAS(IntDefaultHandler);
-void USB_IRQHandler (void) ALIAS(IntDefaultHandler);
-void USB_FIQHandler (void) ALIAS(IntDefaultHandler);
-void ADCA_IRQHandler (void) ALIAS(IntDefaultHandler);
-void RTC_IRQHandler (void) ALIAS(IntDefaultHandler);
-void BOD_WDT_IRQHandler (void) ALIAS(IntDefaultHandler);
-void FMC_IRQHandler (void) ALIAS(IntDefaultHandler);
-void DMA_IRQHandler (void) ALIAS(IntDefaultHandler);
-void ADCB_IRQHandler (void) ALIAS(IntDefaultHandler);
-void USBWakeup_IRQHandler (void) ALIAS(IntDefaultHandler);
-
-//*****************************************************************************
-// The entry point for the application.
-// __main() is the entry point for redlib based applications
-// main() is the entry point for newlib based applications
-//*****************************************************************************
-#if defined (__REDLIB__)
-extern void __main(void);
-#endif
-extern int main(void);
-//*****************************************************************************
-//
-// External declaration for the pointer to the stack top from the Linker Script
-//
-//*****************************************************************************
-extern void _vStackTop(void);
-
-//*****************************************************************************
-#if defined (__cplusplus)
-} // extern "C"
-#endif
-//*****************************************************************************
-//
-// The vector table.  Note that the proper constructs must be placed on this to
-// ensure that it ends up at physical address 0x0000.0000.
-//
-//*****************************************************************************
-extern void (* const g_pfnVectors[])(void);
-__attribute__ ((section(".isr_vector"))) __attribute__ ((used))
-void (* const g_pfnVectors[])(void) = {
-    &_vStackTop,                     // The initial stack pointer
-    ResetISR,                        // The reset handler
-    NMI_Handler,                     // The NMI handler
-    HardFault_Handler,               // The hard fault handler
-    0,                               // Reserved
-    0,                               // Reserved
-    0,                               // Reserved
-    0,                               // Reserved
-    0,                               // Reserved
-    0,                               // Reserved
-    0,                               // Reserved
-    SVC_Handler,                     // SVCall handler
-    0,                               // Reserved
-    0,                               // Reserved
-    PendSV_Handler,                  // The PendSV handler
-    SysTick_Handler,                 // The SysTick handler
-
-    // LPC11U6x specific handlers
-    PIN_INT0_IRQHandler,             //  0 - GPIO pin interrupt 0
-    PIN_INT1_IRQHandler,             //  1 - GPIO pin interrupt 1
-    PIN_INT2_IRQHandler,             //  2 - GPIO pin interrupt 2
-    PIN_INT3_IRQHandler,             //  3 - GPIO pin interrupt 3
-    PIN_INT4_IRQHandler,             //  4 - GPIO pin interrupt 4
-    PIN_INT5_IRQHandler,             //  5 - GPIO pin interrupt 5
-    PIN_INT6_IRQHandler,             //  6 - GPIO pin interrupt 6
-    PIN_INT7_IRQHandler,             //  7 - GPIO pin interrupt 7
-    GINT0_IRQHandler,                //  8 - GPIO GROUP0 interrupt
-    GINT1_IRQHandler,                //  9 - GPIO GROUP1 interrupt
-    I2C1_IRQHandler,                 // 10 - I2C1
-    USART1_4_IRQHandler,             // 11 - combined USART1 & 4 interrupt
-    USART2_3_IRQHandler,             // 12 - combined USART2 & 3 interrupt
-    SCT0_1_IRQHandler,               // 13 - combined SCT0 and 1 interrupt
-    SSP1_IRQHandler,                 // 14 - SPI/SSP1 Interrupt
-    I2C0_IRQHandler,                 // 15 - I2C0
-    TIMER16_0_IRQHandler,            // 16 - CT16B0 (16-bit Timer 0)
-    TIMER16_1_IRQHandler,            // 17 - CT16B1 (16-bit Timer 1)
-    TIMER32_0_IRQHandler,            // 18 - CT32B0 (32-bit Timer 0)
-    TIMER32_1_IRQHandler,            // 19 - CT32B1 (32-bit Timer 1)
-    SSP0_IRQHandler,                 // 20 - SPI/SSP0 Interrupt
-    USART0_IRQHandler,               // 21 - USART0
-    USB_IRQHandler,                  // 22 - USB IRQ
-    USB_FIQHandler,                  // 23 - USB FIQ
-    ADCA_IRQHandler,                 // 24 - ADC A(A/D Converter)
-    RTC_IRQHandler,                  // 25 - Real Time CLock interrpt
-    BOD_WDT_IRQHandler,              // 25 - Combined Brownout/Watchdog interrupt
-    FMC_IRQHandler,                  // 27 - IP2111 Flash Memory Controller
-    DMA_IRQHandler,                  // 28 - DMA interrupt
-    ADCB_IRQHandler,                 // 24 - ADC B (A/D Converter)
-    USBWakeup_IRQHandler,            // 30 - USB wake-up interrupt
-    0,                               // 31 - Reserved
-};
-
-//*****************************************************************************
-// Functions to carry out the initialization of RW and BSS data sections. These
-// are written as separate functions rather than being inlined within the
-// ResetISR() function in order to cope with MCUs with multiple banks of
-// memory.
-//*****************************************************************************
-__attribute__ ((section(".after_vectors")))
-void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
-    unsigned int *pulDest = (unsigned int*) start;
-    unsigned int *pulSrc = (unsigned int*) romstart;
-    unsigned int loop;
-    for (loop = 0; loop < len; loop = loop + 4)
-        *pulDest++ = *pulSrc++;
-}
-
-__attribute__ ((section(".after_vectors")))
-void bss_init(unsigned int start, unsigned int len) {
-    unsigned int *pulDest = (unsigned int*) start;
-    unsigned int loop;
-    for (loop = 0; loop < len; loop = loop + 4)
-        *pulDest++ = 0;
-}
-
-//*****************************************************************************
-// The following symbols are constructs generated by the linker, indicating
-// the location of various points in the "Global Section Table". This table is
-// created by the linker via the Code Red managed linker script mechanism. It
-// contains the load address, execution address and length of each RW data
-// section and the execution and length of each BSS (zero initialized) section.
-//*****************************************************************************
-extern unsigned int __data_section_table;
-extern unsigned int __data_section_table_end;
-extern unsigned int __bss_section_table;
-extern unsigned int __bss_section_table_end;
-
-//*****************************************************************************
-// Reset entry point for your code.
-// Sets up a simple runtime environment and initializes the C/C++
-// library.
-//*****************************************************************************
-__attribute__ ((section(".after_vectors")))
-void
-ResetISR(void) {
-
-    // Optionally enable RAM banks that may be off by default at reset
-#if !defined (DONT_ENABLE_DISABLED_RAMBANKS)
-    volatile unsigned int *SYSCON_SYSAHBCLKCTRL = (unsigned int *) 0x40048080;
-    // Ensure that RAM1(26) and USBSRAM(27) bits in SYSAHBCLKCTRL are set
-    *SYSCON_SYSAHBCLKCTRL |= (1 << 26) | (1 <<27);
-#endif
-
-    //
-    // Copy the data sections from flash to SRAM.
-    //
-    unsigned int LoadAddr, ExeAddr, SectionLen;
-    unsigned int *SectionTableAddr;
-
-    // Load base address of Global Section Table
-    SectionTableAddr = &__data_section_table;
-
-    // Copy the data sections from flash to SRAM.
-    while (SectionTableAddr < &__data_section_table_end) {
-        LoadAddr = *SectionTableAddr++;
-        ExeAddr = *SectionTableAddr++;
-        SectionLen = *SectionTableAddr++;
-        data_init(LoadAddr, ExeAddr, SectionLen);
-    }
-    // At this point, SectionTableAddr = &__bss_section_table;
-    // Zero fill the bss segment
-    while (SectionTableAddr < &__bss_section_table_end) {
-        ExeAddr = *SectionTableAddr++;
-        SectionLen = *SectionTableAddr++;
-        bss_init(ExeAddr, SectionLen);
-    }
-
-    // Patch the AEABI integer divide functions to use MCU's romdivide library
-#ifdef __USE_ROMDIVIDE
-    // Get address of Integer division routines function table in ROM
-    unsigned int *div_ptr = (unsigned int *)((unsigned int *)*(PTR_ROM_DRIVER_TABLE))[4];
-    // Get addresses of integer divide routines in ROM
-    // These address are then used by the code in aeabi_romdiv_patch.s
-    pDivRom_idiv = (unsigned int *)div_ptr[0];
-    pDivRom_uidiv = (unsigned int *)div_ptr[1];
-#endif
-
-#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
-    SystemInit();
-#endif
-
-#if defined (__cplusplus)
-    //
-    // Call C++ library initialisation
-    //
-    __libc_init_array();
-#endif
-
-#if defined (__REDLIB__)
-    // Call the Redlib library, which in turn calls main()
-    __main() ;
-#else
-    main();
-#endif
-    //
-    // main() shouldn't return, but if it does, we'll just enter an infinite loop
-    //
-    while (1) {
-        ;
-    }
-}
-
-//*****************************************************************************
-// Default exception handlers. Override the ones here by defining your own
-// handler routines in your application code.
-//*****************************************************************************
-__attribute__ ((section(".after_vectors")))
-void NMI_Handler(void)
-{   while(1) { }
-}
-__attribute__ ((section(".after_vectors")))
-void HardFault_Handler(void)
-{   while(1) { }
-}
-
-__attribute__ ((section(".after_vectors")))
-void SVC_Handler(void)
-{   while(1) { }
-}
-
-__attribute__ ((section(".after_vectors")))
-void PendSV_Handler(void)
-{   while(1) { }
-}
-
-__attribute__ ((section(".after_vectors")))
-void SysTick_Handler(void)
-{   while(1) { }
-}
-
-//*****************************************************************************
-//
-// Processor ends up here if an unexpected interrupt occurs or a specific
-// handler is not present in the application code.
-//
-//*****************************************************************************
-__attribute__ ((section(".after_vectors")))
-void IntDefaultHandler(void)
-{   while(1) { }
-}
--- a/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
+++ b/hw/bsp/lpcxpresso11u68/lpcxpresso11u68.c
@ -27,12 +27,14 @@
 #include "chip.h"
 #include "../board.h"

-#define LED_PORT      2
-#define LED_PIN       17
-#define LED_STATE_ON  0
+#define LED_PORT              2
+#define LED_PIN               17
+#define LED_STATE_ON          0

-#define BUTTON_PORT   0
-#define BUTTON_PIN    1
+// Wake up Switch
+#define BUTTON_PORT           0
+#define BUTTON_PIN            16
+#define BUTTON_STATE_ACTIVE   0

 /* System oscillator rate and RTC oscillator rate */
 const uint32_t OscRateIn = 12000000;
@ -93,8 +95,7 @@ void board_led_write(bool state)

 uint32_t board_button_read(void)
 {
-  // active low
-  return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
+  return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
 }

 int board_uart_read(uint8_t* buf, int len)
--- a/hw/bsp/lpcxpresso1347/board.mk
+++ b/hw/bsp/lpcxpresso1347/board.mk
@ -9,6 +9,9 @@ CFLAGS += \
  -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
  -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' 

+# startup.c and lpc_types.h cause following errors
+CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/lpcxpresso1347/lpc1347.ld

--- a/hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c
+++ b/hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c
@ -393,7 +393,7 @@ ResetISR(void) {
 	bss_init ((unsigned int)ExeAddr, SectionLen);
 #endif

-//	extern void SystemInit(void);
+	extern void SystemInit(void);
 	SystemInit();

 #if defined (__cplusplus)
--- a/hw/bsp/lpcxpresso1769/board.mk
+++ b/hw/bsp/lpcxpresso1769/board.mk
@ -8,6 +8,9 @@ CFLAGS += \
  -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
  -DRTC_EV_SUPPORT=0

+# lpc_types.h cause following errors
+CFLAGS += -Wno-error=strict-prototypes
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/lpcxpresso1769/lpc1769.ld

--- a/hw/bsp/mbed1768/board.mk
+++ b/hw/bsp/mbed1768/board.mk
@ -8,6 +8,9 @@ CFLAGS += \
  -DCFG_TUSB_MCU=OPT_MCU_LPC175X_6X \
  -DRTC_EV_SUPPORT=0

+# startup.c and lpc_types.h cause following errors
+CFLAGS += -Wno-error=nested-externs -Wno-error=strict-prototypes
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/mbed1768/lpc1768.ld

--- a/hw/bsp/mcb1800/board.mk
+++ b/hw/bsp/mcb1800/board.mk
@ -7,6 +7,9 @@ CFLAGS += \
  -DCFG_TUSB_MCU=OPT_MCU_LPC18XX \
  -D__USE_LPCOPEN

+# lpc_types.h cause following errors
+CFLAGS += -Wno-error=strict-prototypes
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/mcb1800/lpc1857.ld

--- a/hw/bsp/pca10056/pca10056.c
+++ b/hw/bsp/pca10056/pca10056.c
@ -38,10 +38,11 @@
 /*------------------------------------------------------------------*/
 /* MACRO TYPEDEF CONSTANT ENUM
 *------------------------------------------------------------------*/
-#define LED_PIN         13
-#define LED_STATE_ON    0
+#define LED_PIN               13
+#define LED_STATE_ON          0

-#define BUTTON_PIN      11
+#define BUTTON_PIN            11
+#define BUTTON_STATE_ACTIVE   0

 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
@ -49,8 +50,11 @@ extern void tusb_hal_nrf_power_event(uint32_t event);

 void board_init(void)
 {
-  // Config clock source: XTAL or RC in sdk_config.h
-  NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
+  // stop LF clock just in case we jump from application without reset
+  NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
+
+  // Use Internal OSC to compatible with all boards
+  NRF_CLOCK->LFCLKSRC = CLOCK_LFCLKSRC_SRC_RC;
  NRF_CLOCK->TASKS_LFCLKSTART = 1UL;

  // LED
@ -116,8 +120,7 @@ void board_led_write(bool state)

 uint32_t board_button_read(void)
 {
-  // button is active LOW
-  return (nrf_gpio_pin_read(BUTTON_PIN) ? 0 : 1);
+  return BUTTON_STATE_ACTIVE == nrf_gpio_pin_read(BUTTON_PIN);
 }

 int board_uart_read(uint8_t* buf, int len)
--- a/hw/bsp/pca10059/board.mk
+++ b/hw/bsp/pca10059/board.mk
@ -0,0 +1,56 @@
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m4 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -DNRF52840_XXAA \
+  -DCONFIG_GPIO_AS_PINRESET \
+  -DCFG_TUSB_MCU=OPT_MCU_NRF5X
+
+# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
+CFLAGS += -Wno-error=undef 
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/$(BOARD)/$(BOARD).ld
+
+LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk
+
+SRC_C += \
+	hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \
+	hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \
+
+INC += \
+	$(TOP)/hw/mcu/nordic/cmsis/Include \
+	$(TOP)/hw/mcu/nordic \
+	$(TOP)/hw/mcu/nordic/nrfx \
+	$(TOP)/hw/mcu/nordic/nrfx/mdk \
+	$(TOP)/hw/mcu/nordic/nrfx/hal \
+	$(TOP)/hw/mcu/nordic/nrfx/drivers/include \
+	$(TOP)/hw/mcu/nordic/nrfx/drivers/src \
+
+SRC_S += hw/mcu/nordic/nrfx/mdk/gcc_startup_nrf52840.S
+
+ASFLAGS += -D__HEAP_SIZE=0
+
+# For TinyUSB port source
+VENDOR = nordic
+CHIP_FAMILY = nrf5x
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM4F
+
+# For flash-jlink target
+JLINK_DEVICE = nRF52840_xxAA
+JLINK_IF = swd
+
+# flash using Nordic nrfutil (pip2 install nrfutil)
+# 	make BOARD=pca10059 SERIAL=/dev/ttyACM0 all flash
+NRFUTIL = nrfutil
+
+$(BUILD)/$(BOARD)-firmware.zip: $(BUILD)/$(BOARD)-firmware.hex
+	$(NRFUTIL) pkg generate --hw-version 52 --sd-req 0x0000 --debug-mode --application $^ $@
+
+flash: $(BUILD)/$(BOARD)-firmware.zip
+	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
+	$(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200
--- a/hw/bsp/pca10059/pca10059.c
+++ b/hw/bsp/pca10059/pca10059.c
@ -0,0 +1,192 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board.h"
+
+#include "nrfx.h"
+#include "nrfx/hal/nrf_gpio.h"
+#include "nrfx/drivers/include/nrfx_power.h"
+
+#ifdef SOFTDEVICE_PRESENT
+#include "nrf_sdm.h"
+#include "nrf_soc.h"
+#endif
+
+/*------------------------------------------------------------------*/
+/* MACRO TYPEDEF CONSTANT ENUM
+ *------------------------------------------------------------------*/
+#define LED_PIN               8
+#define LED_STATE_ON          0
+
+// Button 1
+#define BUTTON_PIN            (32+6) // P1.06
+#define BUTTON_STATE_ACTIVE   0
+
+// tinyusb function that handles power event (detected, ready, removed)
+// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
+extern void tusb_hal_nrf_power_event(uint32_t event);
+
+void board_init(void)
+{
+  // Config clock source: XTAL or RC in sdk_config.h
+  NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
+  NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
+
+  // LED
+  nrf_gpio_cfg_output(LED_PIN);
+  board_led_write(false);
+
+  // Button
+  nrf_gpio_cfg_input(BUTTON_PIN, NRF_GPIO_PIN_PULLUP);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock/1000);
+#endif
+
+#if TUSB_OPT_DEVICE_ENABLED
+  // Priorities 0, 1, 4 (nRF52) are reserved for SoftDevice
+  // 2 is highest for application
+  NVIC_SetPriority(USBD_IRQn, 2);
+
+  // USB power may already be ready at this time -> no event generated
+  // We need to invoke the handler based on the status initially
+  uint32_t usb_reg;
+
+#ifdef SOFTDEVICE_PRESENT
+  uint8_t sd_en = false;
+  sd_softdevice_is_enabled(&sd_en);
+
+  if ( sd_en ) {
+    sd_power_usbdetected_enable(true);
+    sd_power_usbpwrrdy_enable(true);
+    sd_power_usbremoved_enable(true);
+
+    sd_power_usbregstatus_get(&usb_reg);
+  }else
+#endif
+  {
+    // Power module init
+    const nrfx_power_config_t pwr_cfg = { 0 };
+    nrfx_power_init(&pwr_cfg);
+
+    // Register tusb function as USB power handler
+    const nrfx_power_usbevt_config_t config = { .handler = (nrfx_power_usb_event_handler_t) tusb_hal_nrf_power_event };
+    nrfx_power_usbevt_init(&config);
+
+    nrfx_power_usbevt_enable();
+
+    usb_reg = NRF_POWER->USBREGSTATUS;
+  }
+
+  if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED);
+  if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk  ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  nrf_gpio_pin_write(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  return BUTTON_STATE_ACTIVE == nrf_gpio_pin_read(BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+#ifdef SOFTDEVICE_PRESENT
+// process SOC event from SD
+uint32_t proc_soc(void)
+{
+  uint32_t soc_evt;
+  uint32_t err = sd_evt_get(&soc_evt);
+
+  if (NRF_SUCCESS == err)
+  {
+    /*------------- usb power event handler -------------*/
+    int32_t usbevt = (soc_evt == NRF_EVT_POWER_USB_DETECTED   ) ? NRFX_POWER_USB_EVT_DETECTED:
+                     (soc_evt == NRF_EVT_POWER_USB_POWER_READY) ? NRFX_POWER_USB_EVT_READY   :
+                     (soc_evt == NRF_EVT_POWER_USB_REMOVED    ) ? NRFX_POWER_USB_EVT_REMOVED : -1;
+
+    if ( usbevt >= 0) tusb_hal_nrf_power_event(usbevt);
+  }
+
+  return err;
+}
+
+uint32_t proc_ble(void)
+{
+  // do nothing with ble
+  return NRF_ERROR_NOT_FOUND;
+}
+
+void SD_EVT_IRQHandler(void)
+{
+  // process BLE and SOC until there is no more events
+  while( (NRF_ERROR_NOT_FOUND != proc_ble()) || (NRF_ERROR_NOT_FOUND != proc_soc()) )
+  {
+
+  }
+}
+
+void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info)
+{
+  (void) id;
+  (void) pc;
+  (void) info;
+}
+#endif
--- a/hw/bsp/pca10059/pca10059.ld
+++ b/hw/bsp/pca10059/pca10059.ld
@ -0,0 +1,13 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x1000, LENGTH = 0xff000
+  RAM (rwx) :  ORIGIN = 0x20000008, LENGTH = 0x3fff8
+}
+
+
+INCLUDE "nrf_common.ld"
--- a/hw/bsp/stm32f412disco/STM32F412ZGTx_FLASH.ld
+++ b/hw/bsp/stm32f412disco/STM32F412ZGTx_FLASH.ld
@ -0,0 +1,169 @@
+/*
+*****************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Abstract    : Linker script for STM32F412ZGTx Device with
+**                1024KByte FLASH, 256KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+**  (c)Copyright Ac6.
+**  You may use this file as-is or modify it according to the needs of your
+**  project. Distribution of this file (unmodified or modified) is not
+**  permitted. Ac6 permit registered System Workbench for MCU users the
+**  rights to distribute the assembled, compiled & linked contents of this
+**  file as part of an application binary file, provided that it is built
+**  using the System Workbench for MCU toolchain.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20040000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 256K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+
--- a/hw/bsp/stm32f412disco/board.mk
+++ b/hw/bsp/stm32f412disco/board.mk
@ -0,0 +1,51 @@
+CFLAGS += \
+  -DHSE_VALUE=8000000 \
+  -DSTM32F412Zx \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m4 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -nostdlib -nostartfiles \
+  -DCFG_TUSB_MCU=OPT_MCU_STM32F4
+
+ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
+ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/stm32f412disco/STM32F412ZGTx_FLASH.ld
+
+SRC_C += \
+	$(ST_CMSIS)/Source/Templates/system_stm32f4xx.c \
+	$(ST_HAL_DRIVER)/Src/stm32f4xx_hal.c \
+	$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_rcc_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32f4xx_hal_gpio.c	
+
+SRC_S += \
+	$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
+
+INC += \
+	$(TOP)/hw/mcu/st/st_driver/CMSIS/Include \
+	$(TOP)/$(ST_CMSIS)/Include \
+	$(TOP)/$(ST_HAL_DRIVER)/Inc \
+	$(TOP)/hw/bsp/$(BOARD)
+
+# For TinyUSB port source
+VENDOR = st
+CHIP_FAMILY = stm32f4
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM4F
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f41zx
+JLINK_IF = swd
+
+# Path to STM32 Cube Programmer CLI, should be added into system path 
+STM32Prog = STM32_Programmer_CLI
+
+# flash target using on-board stlink
+flash: $(BUILD)/$(BOARD)-firmware.elf
+	$(STM32Prog) --connect port=swd --write $< --go
--- a/hw/bsp/stm32f412disco/stm32f412disco.c
+++ b/hw/bsp/stm32f412disco/stm32f412disco.c
@ -0,0 +1,221 @@
+/* 
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "../board.h"
+
+#include "stm32f4xx.h"
+#include "stm32f4xx_hal_conf.h"
+
+#define LED_PORT              GPIOE
+#define LED_PIN               GPIO_PIN_2
+#define LED_STATE_ON          0
+
+// Joystick selection
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PIN_0
+#define BUTTON_STATE_ACTIVE   1
+
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follow :
+  *            System Clock source            = PLL (HSE)
+  *            SYSCLK(Hz)                     = 100000000
+  *            HCLK(Hz)                       = 100000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 2
+  *            APB2 Prescaler                 = 1
+  *            HSE Frequency(Hz)              = 8000000
+  *            PLL_M                          = 8
+  *            PLL_N                          = 200
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 7
+  *            PLL_R                          = 2
+  *            VDD(V)                         = 3.3
+  *            Main regulator output voltage  = Scale1 mode
+  *            Flash Latency(WS)              = 3
+  *         The USB clock configuration from PLLI2S:
+  *            PLLI2SM                        = 8
+  *            PLLI2SN                        = 192
+  *            PLLI2SQ                        = 4
+  * @param  None
+  * @retval None
+  */
+static void SystemClock_Config(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+
+  /* Enable Power Control clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* The voltage scaling allows optimizing the power consumption when the
+   * device is clocked below the maximum system frequency, to update the
+   * voltage scaling value regarding system frequency refer to product
+   * datasheet.  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /* Enable HSE Oscillator and activate PLL with HSE as source */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 200;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /* Select PLLSAI output as USB clock source */
+  PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
+  PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
+  PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CK48;
+  PeriphClkInitStruct.Clk48ClockSelection = RCC_CK48CLKSOURCE_PLLI2SQ;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+   * clocks dividers */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
+                                RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
+}
+
+
+void board_init(void)
+{
+  SystemClock_Config();
+
+  // Notify runtime of frequency change.
+  SystemCoreClockUpdate();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  //NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+  __HAL_RCC_GPIOA_CLK_ENABLE(); // button, USB D+/D-
+  __HAL_RCC_GPIOE_CLK_ENABLE(); // LED
+  __HAL_RCC_GPIOG_CLK_ENABLE(); // USB power switch IO pin
+
+  GPIO_InitTypeDef  GPIO_InitStruct;
+
+  // LED
+  GPIO_InitStruct.Pin = LED_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
+  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
+
+  board_led_write(false);
+
+  // Button
+  GPIO_InitStruct.Pin = BUTTON_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
+  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
+
+  /* Configure USB FS GPIOs */
+  /* Configure USB D+ D- Pins */
+  GPIO_InitStruct.Pin = GPIO_PIN_11 | GPIO_PIN_12;
+  GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* Configure VBUS Pin */
+  GPIO_InitStruct.Pin = GPIO_PIN_9;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* ID Pin */
+  GPIO_InitStruct.Pin = GPIO_PIN_10;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* Configure POWER_SWITCH IO pin */
+  GPIO_InitStruct.Pin = GPIO_PIN_8;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  // Enable USB OTG clock
+  __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler (void)
+{
+  asm("bkpt");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}
--- a/hw/bsp/stm32f412disco/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f412disco/stm32f4xx_hal_conf.h
@ -0,0 +1,394 @@
+/**
+  ******************************************************************************
+  * @file    GPIO/GPIO_EXTI/Inc/stm32f4xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F4xx_HAL_CONF_H
+#define __STM32F4xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+#define HAL_MODULE_ENABLED         
+/* #define HAL_ADC_MODULE_ENABLED      */
+/* #define HAL_CAN_MODULE_ENABLED      */
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
+/* #define HAL_CRC_MODULE_ENABLED      */ 
+/* #define HAL_CRYP_MODULE_ENABLED     */ 
+/* #define HAL_DAC_MODULE_ENABLED      */ 
+/* #define HAL_DCMI_MODULE_ENABLED     */ 
+#define HAL_DMA_MODULE_ENABLED 
+/* #define HAL_DMA2D_MODULE_ENABLED    */ 
+/* #define HAL_ETH_MODULE_ENABLED      */
+#define HAL_FLASH_MODULE_ENABLED 
+/* #define HAL_NAND_MODULE_ENABLED     */
+/* #define HAL_NOR_MODULE_ENABLED      */
+/* #define HAL_PCCARD_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED     */
+/* #define HAL_SDRAM_MODULE_ENABLED    */
+/* #define HAL_HASH_MODULE_ENABLED     */  
+#define HAL_GPIO_MODULE_ENABLED
+// #define HAL_I2C_MODULE_ENABLED
+/* #define HAL_I2S_MODULE_ENABLED      */
+/* #define HAL_IWDG_MODULE_ENABLED     */ 
+/* #define HAL_LTDC_MODULE_ENABLED     */
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED      
+/* #define HAL_RNG_MODULE_ENABLED       */   
+/* #define HAL_RTC_MODULE_ENABLED       */
+/* #define HAL_SAI_MODULE_ENABLED        */   
+/* #define HAL_SD_MODULE_ENABLED         */
+// #define HAL_SPI_MODULE_ENABLED
+/* #define HAL_TIM_MODULE_ENABLED       */
+/* #define HAL_UART_MODULE_ENABLED      */
+/* #define HAL_USART_MODULE_ENABLED     */ 
+/* #define HAL_IRDA_MODULE_ENABLED      */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED      */
+#define HAL_CORTEX_MODULE_ENABLED   
+/* #define HAL_PCD_MODULE_ENABLED      */
+/* #define HAL_HCD_MODULE_ENABLED      */
+
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE  (32000U)    
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */     
+#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */           
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  INSTRUCTION_CACHE_ENABLE     1U
+#define  DATA_CACHE_ENABLE            1U
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f4xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f4xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+   
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f4xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f4xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f4xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f4xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f4xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f4xx_hal_cryp.h" 
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f4xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f4xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f4xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f4xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f4xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+ 
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f4xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f4xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCCARD_MODULE_ENABLED
+  #include "stm32f4xx_hal_pccard.h"
+#endif /* HAL_PCCARD_MODULE_ENABLED */ 
+  
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f4xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */      
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f4xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f4xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f4xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f4xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f4xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f4xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f4xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f4xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f4xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f4xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f4xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f4xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f4xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f4xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f4xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f4xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+   
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F4xx_HAL_CONF_H */
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/hw/mcu/nxp/lpc_driver
+++ b/hw/mcu/nxp/lpc_driver
@ -1 +1 @@
-Subproject commit 4f2ec98c1ad087556c0101a4f6ef330437aa4aa1
+Subproject commit 83dc833bfb0972b1df1bbf271f3a9e574d5f2876
--- a/hw/mcu/st/st_driver
+++ b/hw/mcu/st/st_driver
@ -1 +1 @@
-Subproject commit 0d76c2b01b0703c0b87d9b8a1c8df86ed1d4fddb
+Subproject commit 4279a02b87d3b327f058b5d6b53132e5dcc0cf17
--- a/src/portable/st/stm32f4/dcd_stm32f4.c
+++ b/src/portable/st/stm32f4/dcd_stm32f4.c
@ -2,6 +2,7 @@
 * The MIT License (MIT)
 *
 * Copyright (c) 2018 Scott Shawcroft, 2019 William D. Jones for Adafruit Industries
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
@ -39,6 +40,11 @@
 #define IN_EP_BASE (USB_OTG_INEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_IN_ENDPOINT_BASE)
 #define FIFO_BASE(_x) (volatile uint32_t *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_FIFO_BASE + (_x) * USB_OTG_FIFO_SIZE)

+// TODO Merge with OTG_HS
+// Max endpoints for each direction
+#define EP_MAX        USB_OTG_FS_MAX_IN_ENDPOINTS
+#define EP_FIFO_SIZE  USB_OTG_FS_TOTAL_FIFO_SIZE
+
 static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
 static uint8_t _setup_offs; // We store up to 3 setup packets.

@ -52,7 +58,7 @@ typedef struct {

 typedef volatile uint32_t * usb_fifo_t;

-xfer_ctl_t xfer_status[4][2];
+xfer_ctl_t xfer_status[EP_MAX][2];
 #define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir]


@ -61,7 +67,7 @@ static void bus_reset(void) {
  USB_OTG_DeviceTypeDef * dev = DEVICE_BASE;
  USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE;

-  for(int n = 0; n < 4; n++) {
+  for(uint8_t n = 0; n < EP_MAX; n++) {
    out_ep[n].DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
  }

@ -69,32 +75,35 @@ static void bus_reset(void) {
  dev->DOEPMSK |= USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM;
  dev->DIEPMSK |= USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM;

-  // Peripheral FIFO architecture (Rev18 RM 29.11)
+  // "USB Data FIFOs" section in reference manual
+  // Peripheral FIFO architecture
  //
-  // --------------- 320 ( 1280 bytes )
-  // | IN FIFO 3  |
+  // --------------- 320 or 1024 ( 1280 or 4096 bytes )
+  // | IN FIFO MAX |
+  // ---------------
+  // |    ...      |
  // --------------- y + x + 16 + GRXFSIZ
-  // | IN FIFO 2  |
+  // | IN FIFO 2   |
  // --------------- x + 16 + GRXFSIZ
-  // | IN FIFO 1  |
+  // | IN FIFO 1   |
  // --------------- 16 + GRXFSIZ
-  // | IN FIFO 0  |
+  // | IN FIFO 0   |
  // --------------- GRXFSIZ
-  // | OUT FIFO   |
-  // | ( Shared ) |
+  // | OUT FIFO    |
+  // | ( Shared )  |
  // --------------- 0
  //
-  // FIFO sizes are set up by the following rules (each word 32-bits):
-  // All EP OUT shared a unique OUT FIFO which uses (based on page 1354 of Rev 17 of reference manual):
-  // * 10 locations in hardware for setup packets + setup control words
-  // (up to 3 setup packets).
-  // * 2 locations for OUT endpoint control words.
-  // * 16 for largest packet size of 64 bytes. ( TODO Highspeed is 512 bytes)
-  // * 1 location for global NAK (not required/used here).
+  // According to "FIFO RAM allocation" section in RM, FIFO RAM are allocated as follows (each word 32-bits):
+  // - Each EP IN needs at least max packet size, 16 words is sufficient for EP0 IN
  //
-  // It is recommended to allocate 2 times the largest packet size, therefore
-  // Recommended value = 10 + 1 + 2 x (16+2) = 47 --> Let's make it 50
-  USB_OTG_FS->GRXFSIZ = 50;
+  // - All EP OUT shared a unique OUT FIFO which uses
+  //   * 10 locations in hardware for setup packets + setup control words (up to 3 setup packets).
+  //   * 2 locations for OUT endpoint control words.
+  //   * 16 for largest packet size of 64 bytes. ( TODO Highspeed is 512 bytes)
+  //   * 1 location for global NAK (not required/used here).
+  //   * It is recommended to allocate 2 times the largest packet size, therefore
+  //   Recommended value = 10 + 1 + 2 x (16+2) = 47 --> Let's make it 52
+  USB_OTG_FS->GRXFSIZ = 52;

  // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word )
  USB_OTG_FS->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | (USB_OTG_FS->GRXFSIZ & 0x0000ffffUL);
@ -151,7 +160,7 @@ void dcd_init (uint8_t rhport)
  // the core to stop working/require reset.
  USB_OTG_FS->GINTMSK |= /* USB_OTG_GINTMSK_OTGINT | */ USB_OTG_GINTMSK_MMISM;

-  USB_OTG_DeviceTypeDef * dev = ((USB_OTG_DeviceTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_DEVICE_BASE));
+  USB_OTG_DeviceTypeDef * dev = DEVICE_BASE;

  // If USB host misbehaves during status portion of control xfer
  // (non zero-length packet), send STALL back and discard. Full speed.
@ -161,12 +170,15 @@ void dcd_init (uint8_t rhport)
    USB_OTG_GINTMSK_SOFM | USB_OTG_GINTMSK_RXFLVLM /* SB_OTG_GINTMSK_ESUSPM | \
    USB_OTG_GINTMSK_USBSUSPM */;

-  // Enable pullup, enable peripheral.
+  // Enable VBus hardware sensing,
 #ifdef USB_OTG_GCCFG_VBDEN
  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN | USB_OTG_GCCFG_PWRDWN;
 #else
  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN | USB_OTG_GCCFG_PWRDWN;
 #endif
+
+  // Soft Connect -> Enable pullup on D+/D-
+  dev->DCTL &= ~USB_OTG_DCTL_SDIS;
 }

 void dcd_int_enable (uint8_t rhport)
@ -220,7 +232,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
  uint8_t const dir   = tu_edpt_dir(desc_edpt->bEndpointAddress);

  // Unsupported endpoint numbers/size.
-  if((desc_edpt->wMaxPacketSize.size > 64) || (epnum > 3)) {
+  if((desc_edpt->wMaxPacketSize.size > 64) || (epnum > EP_MAX)) {
    return false;
  }

@ -233,22 +245,27 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
      desc_edpt->wMaxPacketSize.size << USB_OTG_DOEPCTL_MPSIZ_Pos;
    dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_OEPM_Pos + epnum));
  } else {
-    // Peripheral FIFO architecture (Rev18 RM 29.11)
+    // "USB Data FIFOs" section in reference manual
+    // Peripheral FIFO architecture
    //
-    // --------------- 320 ( 1280 bytes )
-    // | IN FIFO 3  |
+    // --------------- 320 or 1024 ( 1280 or 4096 bytes )
+    // | IN FIFO MAX |
+    // ---------------
+    // |    ...      |
    // --------------- y + x + 16 + GRXFSIZ
-    // | IN FIFO 2  |
+    // | IN FIFO 2   |
    // --------------- x + 16 + GRXFSIZ
-    // | IN FIFO 1  |
+    // | IN FIFO 1   |
    // --------------- 16 + GRXFSIZ
-    // | IN FIFO 0  |
+    // | IN FIFO 0   |
    // --------------- GRXFSIZ
-    // | OUT FIFO   |
-    // | ( Shared ) |
+    // | OUT FIFO    |
+    // | ( Shared )  |
    // --------------- 0
    //
-    // Since OUT FIFO = 50, FIFO 0 = 16, average of FIFOx = (312-50-16) / 3 = 82 ~ 80
+    // Since OUT FIFO = GRXFSIZ, FIFO 0 = 16, for simplicity, we equally allocated for the rest of endpoints
+    // - Size  : (FIFO_SIZE/4 - GRXFSIZ - 16) / (EP_MAX-1)
+    // - Offset: GRXFSIZ + 16 + Size*(epnum-1)

    in_ep[epnum].DIEPCTL |= (1 << USB_OTG_DIEPCTL_USBAEP_Pos) | \
      (epnum - 1) << USB_OTG_DIEPCTL_TXFNUM_Pos | \
@ -258,9 +275,10 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
    dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_IEPM_Pos + epnum));

    // Both TXFD and TXSA are in unit of 32-bit words
-    uint16_t const fifo_size = 80;
-    uint32_t const fifo_offset = (USB_OTG_FS->GRXFSIZ & 0x0000ffff) + 16 + fifo_size*(epnum-1);
-    USB_OTG_FS->DIEPTXF[epnum - 1] = (80 << USB_OTG_DIEPTXF_INEPTXFD_Pos) | fifo_offset;
+    uint16_t const allocated_size = (USB_OTG_FS->GRXFSIZ & 0x0000ffff) + 16;
+    uint16_t const fifo_size = (EP_FIFO_SIZE/4 - allocated_size) / (EP_MAX-1);
+    uint32_t const fifo_offset = allocated_size + fifo_size*(epnum-1);
+    USB_OTG_FS->DIEPTXF[epnum - 1] = (fifo_size << USB_OTG_DIEPTXF_INEPTXFD_Pos) | fifo_offset;
  }

  return true;
@ -551,8 +569,9 @@ static void read_rx_fifo(USB_OTG_OUTEndpointTypeDef * out_ep) {
 static void handle_epout_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_OUTEndpointTypeDef * out_ep) {
  // DAINT for a given EP clears when DOEPINTx is cleared.
  // OEPINT will be cleared when DAINT's out bits are cleared.
-  for(int n = 0; n < 4; n++) {
+  for(uint8_t n = 0; n < EP_MAX; n++) {
    xfer_ctl_t * xfer = XFER_CTL_BASE(n, TUSB_DIR_OUT);
+
    if(dev->DAINT & (1 << (USB_OTG_DAINT_OEPINT_Pos + n))) {
      // SETUP packet Setup Phase done.
      if(out_ep[n].DOEPINT & USB_OTG_DOEPINT_STUP) {
@ -588,7 +607,7 @@ static void handle_epout_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_OUTEndpointTy
 static void handle_epin_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_INEndpointTypeDef * in_ep) {
  // DAINT for a given EP clears when DIEPINTx is cleared.
  // IEPINT will be cleared when DAINT's out bits are cleared.
-  for(uint8_t n = 0; n < 4; n++) {
+  for(uint8_t n = 0; n < EP_MAX; n++) {
    xfer_ctl_t * xfer = XFER_CTL_BASE(n, TUSB_DIR_IN);

    if(dev->DAINT & (1 << (USB_OTG_DAINT_IEPINT_Pos + n))) {