mirror of
https://github.com/hathach/tinyusb.git
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Merge pull request #112 from hathach/develop
Adding support for LPC54114
This commit is contained in:
hathach
GitHub
commit
47cf7f2245
@ -26,7 +26,7 @@ INC += \
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# For TinyUSB port source
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# For TinyUSB port source
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VENDOR = nxp
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VENDOR = nxp
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CHIP_FAMILY = lpc_usbd
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CHIP_FAMILY = lpc_ip3511
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# For freeRTOS port source
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM0
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FREERTOS_PORT = ARM_CM0
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@ -35,5 +35,6 @@ FREERTOS_PORT = ARM_CM0
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JLINK_DEVICE = LPC11U68
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JLINK_DEVICE = LPC11U68
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JLINK_IF = swd
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JLINK_IF = swd
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# flash using jlink
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# flash using pyocd
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flash: flash-jlink
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flash: $(BUILD)/$(BOARD)-firmware.hex
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pyocd flash -t lpc11u68 $<
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@ -25,7 +25,7 @@ INC += \
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# For TinyUSB port source
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# For TinyUSB port source
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VENDOR = nxp
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VENDOR = nxp
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CHIP_FAMILY = lpc_usbd
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CHIP_FAMILY = lpc_ip3511
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# For freeRTOS port source
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM3
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FREERTOS_PORT = ARM_CM3
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@ -1,200 +0,0 @@
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/*
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** ###################################################################
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** Processors: LPC51U68JBD48
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** LPC51U68JBD64
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**
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** Compiler: GNU C Compiler
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** Reference manual: LPC51U68 User manual User manual Rev. 1.0 13 Dec 2017
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** Version: rev. 1.0, 2017-12-15
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** Build: b180801
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**
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** Abstract:
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** Linker file for the GNU C Compiler
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2018 NXP
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**
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** ###################################################################
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
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STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0800;
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/* Specify the memory areas */
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MEMORY
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{
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m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x000000E0
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m_text (RX) : ORIGIN = 0x000000E0, LENGTH = 0x0003FF20
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m_data_sramx (RW) : ORIGIN = 0x04000000, LENGTH = 0x00008000
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m_data (RW) : ORIGIN = 0x20000000, LENGTH = 0x00010000
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into internal flash */
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.interrupts :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} > m_interrupts
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/* The program code and other data goes into internal flash */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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} > m_text
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > m_text
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.ARM :
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{
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} > m_text
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.ctors :
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{
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__CTOR_LIST__ = .;
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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/* We don't want to include the .ctor section from
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from the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__CTOR_END__ = .;
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} > m_text
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.dtors :
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{
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__DTOR_LIST__ = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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__DTOR_END__ = .;
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} > m_text
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} > m_text
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} > m_text
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} > m_text
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__etext = .; /* define a global symbol at end of code */
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__DATA_ROM = .; /* Symbol is used by startup for data initialization */
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.data : AT(__DATA_ROM)
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{
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. = ALIGN(4);
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__DATA_RAM = .;
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__data_start__ = .; /* create a global symbol at data start */
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*(.ramfunc*) /* for functions in ram */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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KEEP(*(.jcr*))
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. = ALIGN(4);
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__data_end__ = .; /* define a global symbol at data end */
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} > m_data
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__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
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/* Uninitialized data section */
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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. = ALIGN(4);
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__START_BSS = .;
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__bss_start__ = .;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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__END_BSS = .;
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} > m_data
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.heap :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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__HeapBase = .;
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. += HEAP_SIZE;
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__HeapLimit = .;
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__heap_limit = .; /* Add for _sbrk */
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} > m_data_sramx
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.stack :
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{
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. = ALIGN(8);
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. += STACK_SIZE;
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} > m_data_sramx
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/* Initializes stack on the end of block */
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__StackTop = ORIGIN(m_data_sramx) + LENGTH(m_data_sramx);
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__StackLimit = __StackTop - STACK_SIZE;
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PROVIDE(__stack = __StackTop);
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.ARM.attributes 0 : { *(.ARM.attributes) }
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ASSERT(__StackLimit >= __HeapLimit, "region m_data_sramx overflowed with stack and heap")
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}
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@ -5,32 +5,33 @@ CFLAGS += \
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-DCORE_M0PLUS \
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-DCORE_M0PLUS \
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-DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
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-DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
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-DCPU_LPC51U68JBD64 \
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-DCPU_LPC51U68JBD64 \
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-Wfatal-errors \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
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-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
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MCU_DIR = hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68
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# All source paths should be relative to the top level.
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/lpcxpresso51u68/LPC51U68_flash.ld
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LD_FILE = $(MCU_DIR)/gcc/LPC51U68_flash.ld
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SRC_C += \
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SRC_C += \
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hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/system_LPC51U68.c \
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$(MCU_DIR)/system_LPC51U68.c \
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hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_clock.c \
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$(MCU_DIR)/drivers/fsl_clock.c \
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hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_gpio.c \
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$(MCU_DIR)/drivers/fsl_gpio.c \
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hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_power.c \
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$(MCU_DIR)/drivers/fsl_power.c \
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hw/mcu/nxp/lpc_driver/lpc51u6x/drivers/fsl_reset.c
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$(MCU_DIR)/drivers/fsl_reset.c
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INC += \
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INC += \
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$(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/CMSIS/Include \
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$(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/CMSIS/Include \
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$(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68 \
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$(TOP)/$(MCU_DIR) \
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$(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/drivers
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$(TOP)/$(MCU_DIR)/drivers
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SRC_S += hw/bsp/lpcxpresso51u68/startup_LPC51U68.S
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SRC_S += $(MCU_DIR)/gcc/startup_LPC51U68.S
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LIBS += $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/libpower.a
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LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
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# For TinyUSB port source
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# For TinyUSB port source
|
||||||
VENDOR = nxp
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VENDOR = nxp
|
||||||
CHIP_FAMILY = lpc_usbd
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CHIP_FAMILY = lpc_ip3511
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||||||
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||||||
# For freeRTOS port source
|
# For freeRTOS port source
|
||||||
FREERTOS_PORT = ARM_CM0
|
FREERTOS_PORT = ARM_CM0
|
||||||
@ -39,5 +40,6 @@ FREERTOS_PORT = ARM_CM0
|
|||||||
JLINK_DEVICE = LPC51U68
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JLINK_DEVICE = LPC51U68
|
||||||
JLINK_IF = swd
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JLINK_IF = swd
|
||||||
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# flash using jlink
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# flash using pyocd (51u68 is not supported yet)
|
||||||
#flash: flash-jlink
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flash: $(BUILD)/$(BOARD)-firmware.hex
|
||||||
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pyocd flash -t LPC51U68 $<
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||||||
|
|||||||
@ -25,7 +25,7 @@
|
|||||||
*/
|
*/
|
||||||
|
|
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#include "../board.h"
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#include "../board.h"
|
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#include "LPC51U68.h"
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#include "fsl_device_registers.h"
|
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#include "fsl_gpio.h"
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#include "fsl_gpio.h"
|
||||||
#include "fsl_power.h"
|
#include "fsl_power.h"
|
||||||
#include "fsl_iocon.h"
|
#include "fsl_iocon.h"
|
||||||
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|||||||
@ -1,536 +0,0 @@
|
|||||||
/* --------------------------------------------------------------------------*/
|
|
||||||
/* @file: startup_LPC51U68.S */
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|
||||||
/* @purpose: CMSIS Cortex-M0+ Core Device Startup File */
|
|
||||||
/* LPC51U68 */
|
|
||||||
/* @version: 1.0 */
|
|
||||||
/* @date: 2017-12-15 */
|
|
||||||
/* --------------------------------------------------------------------------*/
|
|
||||||
/* */
|
|
||||||
/* Copyright 1997-2016 Freescale Semiconductor, Inc. */
|
|
||||||
/* Copyright 2016-2018 NXP */
|
|
||||||
/* */
|
|
||||||
/* SPDX-License-Identifier: BSD-3-Clause */
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* Version: GCC for ARM Embedded Processors */
|
|
||||||
/*****************************************************************************/
|
|
||||||
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|
||||||
|
|
||||||
.syntax unified
|
|
||||||
.arch armv6-m
|
|
||||||
|
|
||||||
.section .isr_vector, "a"
|
|
||||||
.align 2
|
|
||||||
.globl __Vectors
|
|
||||||
__Vectors:
|
|
||||||
.long __StackTop /* Top of Stack */
|
|
||||||
.long Reset_Handler /* Reset Handler */
|
|
||||||
.long NMI_Handler /* NMI Handler */
|
|
||||||
.long HardFault_Handler /* Hard Fault Handler */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long SVC_Handler /* SVCall Handler */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long PendSV_Handler /* PendSV Handler */
|
|
||||||
.long SysTick_Handler /* SysTick Handler */
|
|
||||||
|
|
||||||
/* External Interrupts */
|
|
||||||
.long WDT_BOD_IRQHandler /* Windowed watchdog timer, Brownout detect */
|
|
||||||
.long DMA0_IRQHandler /* DMA controller */
|
|
||||||
.long GINT0_IRQHandler /* GPIO group 0 */
|
|
||||||
.long GINT1_IRQHandler /* GPIO group 1 */
|
|
||||||
.long PIN_INT0_IRQHandler /* Pin interrupt 0 or pattern match engine slice 0 */
|
|
||||||
.long PIN_INT1_IRQHandler /* Pin interrupt 1or pattern match engine slice 1 */
|
|
||||||
.long PIN_INT2_IRQHandler /* Pin interrupt 2 or pattern match engine slice 2 */
|
|
||||||
.long PIN_INT3_IRQHandler /* Pin interrupt 3 or pattern match engine slice 3 */
|
|
||||||
.long UTICK0_IRQHandler /* Micro-tick Timer */
|
|
||||||
.long MRT0_IRQHandler /* Multi-rate timer */
|
|
||||||
.long CTIMER0_IRQHandler /* Standard counter/timer CTIMER0 */
|
|
||||||
.long CTIMER1_IRQHandler /* Standard counter/timer CTIMER1 */
|
|
||||||
.long SCT0_IRQHandler /* SCTimer/PWM */
|
|
||||||
.long CTIMER3_IRQHandler /* Standard counter/timer CTIMER3 */
|
|
||||||
.long FLEXCOMM0_IRQHandler /* Flexcomm Interface 0 (USART, SPI, I2C) */
|
|
||||||
.long FLEXCOMM1_IRQHandler /* Flexcomm Interface 1 (USART, SPI, I2C) */
|
|
||||||
.long FLEXCOMM2_IRQHandler /* Flexcomm Interface 2 (USART, SPI, I2C) */
|
|
||||||
.long FLEXCOMM3_IRQHandler /* Flexcomm Interface 3 (USART, SPI, I2C) */
|
|
||||||
.long FLEXCOMM4_IRQHandler /* Flexcomm Interface 4 (USART, SPI, I2C) */
|
|
||||||
.long FLEXCOMM5_IRQHandler /* Flexcomm Interface 5 (USART, SPI, I2C) */
|
|
||||||
.long FLEXCOMM6_IRQHandler /* Flexcomm Interface 6 (USART, SPI, I2C, I2S) */
|
|
||||||
.long FLEXCOMM7_IRQHandler /* Flexcomm Interface 7 (USART, SPI, I2C, I2S) */
|
|
||||||
.long ADC0_SEQA_IRQHandler /* ADC0 sequence A completion. */
|
|
||||||
.long ADC0_SEQB_IRQHandler /* ADC0 sequence B completion. */
|
|
||||||
.long ADC0_THCMP_IRQHandler /* ADC0 threshold compare and error. */
|
|
||||||
.long Reserved41_IRQHandler /* Reserved interrupt */
|
|
||||||
.long Reserved42_IRQHandler /* Reserved interrupt */
|
|
||||||
.long USB0_NEEDCLK_IRQHandler /* USB Activity Wake-up Interrupt */
|
|
||||||
.long USB0_IRQHandler /* USB device */
|
|
||||||
.long RTC_IRQHandler /* RTC alarm and wake-up interrupts */
|
|
||||||
.long Reserved46_IRQHandler /* Reserved interrupt */
|
|
||||||
.long Reserved47_IRQHandler /* Reserved interrupt */
|
|
||||||
|
|
||||||
.size __Vectors, . - __Vectors
|
|
||||||
|
|
||||||
.text
|
|
||||||
.thumb
|
|
||||||
|
|
||||||
/* Reset Handler */
|
|
||||||
.thumb_func
|
|
||||||
.align 2
|
|
||||||
.globl Reset_Handler
|
|
||||||
.weak Reset_Handler
|
|
||||||
.type Reset_Handler, %function
|
|
||||||
Reset_Handler:
|
|
||||||
cpsid i /* Mask interrupts */
|
|
||||||
|
|
||||||
#ifndef __NO_SYSTEM_INIT
|
|
||||||
ldr r0,=SystemInit
|
|
||||||
blx r0
|
|
||||||
#endif
|
|
||||||
/* Loop to copy data from read only memory to RAM. The ranges
|
|
||||||
* of copy from/to are specified by following symbols evaluated in
|
|
||||||
* linker script.
|
|
||||||
* __etext: End of code section, i.e., begin of data sections to copy from.
|
|
||||||
* __data_start__/__data_end__: RAM address range that data should be
|
|
||||||
* copied to. Both must be aligned to 4 bytes boundary. */
|
|
||||||
|
|
||||||
ldr r1, =__etext
|
|
||||||
ldr r2, =__data_start__
|
|
||||||
ldr r3, =__data_end__
|
|
||||||
|
|
||||||
subs r3, r2
|
|
||||||
ble .LC0
|
|
||||||
|
|
||||||
.LC1:
|
|
||||||
subs r3, 4
|
|
||||||
ldr r0, [r1,r3]
|
|
||||||
str r0, [r2,r3]
|
|
||||||
bgt .LC1
|
|
||||||
.LC0:
|
|
||||||
|
|
||||||
#ifdef __STARTUP_CLEAR_BSS
|
|
||||||
/* This part of work usually is done in C library startup code. Otherwise,
|
|
||||||
* define this macro to enable it in this startup.
|
|
||||||
*
|
|
||||||
* Loop to zero out BSS section, which uses following symbols
|
|
||||||
* in linker script:
|
|
||||||
* __bss_start__: start of BSS section. Must align to 4
|
|
||||||
* __bss_end__: end of BSS section. Must align to 4
|
|
||||||
*/
|
|
||||||
ldr r1, =__bss_start__
|
|
||||||
ldr r2, =__bss_end__
|
|
||||||
|
|
||||||
subs r2, r1
|
|
||||||
ble .LC3
|
|
||||||
|
|
||||||
movs r0, 0
|
|
||||||
.LC2:
|
|
||||||
str r0, [r1, r2]
|
|
||||||
subs r2, 4
|
|
||||||
bge .LC2
|
|
||||||
.LC3:
|
|
||||||
#endif
|
|
||||||
cpsie i /* Unmask interrupts */
|
|
||||||
|
|
||||||
#ifndef __START
|
|
||||||
#define __START _start
|
|
||||||
#endif
|
|
||||||
#ifndef __ATOLLIC__
|
|
||||||
ldr r0,=__START
|
|
||||||
blx r0
|
|
||||||
#else
|
|
||||||
ldr r0,=__libc_init_array
|
|
||||||
blx r0
|
|
||||||
ldr r0,=main
|
|
||||||
bx r0
|
|
||||||
#endif
|
|
||||||
.pool
|
|
||||||
.size Reset_Handler, . - Reset_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak DefaultISR
|
|
||||||
.type DefaultISR, %function
|
|
||||||
DefaultISR:
|
|
||||||
ldr r0, =DefaultISR
|
|
||||||
bx r0
|
|
||||||
.size DefaultISR, . - DefaultISR
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak NMI_Handler
|
|
||||||
.type NMI_Handler, %function
|
|
||||||
NMI_Handler:
|
|
||||||
ldr r0,=NMI_Handler
|
|
||||||
bx r0
|
|
||||||
.size NMI_Handler, . - NMI_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak HardFault_Handler
|
|
||||||
.type HardFault_Handler, %function
|
|
||||||
HardFault_Handler:
|
|
||||||
ldr r0,=HardFault_Handler
|
|
||||||
bx r0
|
|
||||||
.size HardFault_Handler, . - HardFault_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak SVC_Handler
|
|
||||||
.type SVC_Handler, %function
|
|
||||||
SVC_Handler:
|
|
||||||
ldr r0,=SVC_Handler
|
|
||||||
bx r0
|
|
||||||
.size SVC_Handler, . - SVC_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak PendSV_Handler
|
|
||||||
.type PendSV_Handler, %function
|
|
||||||
PendSV_Handler:
|
|
||||||
ldr r0,=PendSV_Handler
|
|
||||||
bx r0
|
|
||||||
.size PendSV_Handler, . - PendSV_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak SysTick_Handler
|
|
||||||
.type SysTick_Handler, %function
|
|
||||||
SysTick_Handler:
|
|
||||||
ldr r0,=SysTick_Handler
|
|
||||||
bx r0
|
|
||||||
.size SysTick_Handler, . - SysTick_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak WDT_BOD_IRQHandler
|
|
||||||
.type WDT_BOD_IRQHandler, %function
|
|
||||||
WDT_BOD_IRQHandler:
|
|
||||||
ldr r0,=WDT_BOD_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size WDT_BOD_IRQHandler, . - WDT_BOD_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak DMA0_IRQHandler
|
|
||||||
.type DMA0_IRQHandler, %function
|
|
||||||
DMA0_IRQHandler:
|
|
||||||
ldr r0,=DMA0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size DMA0_IRQHandler, . - DMA0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak GINT0_IRQHandler
|
|
||||||
.type GINT0_IRQHandler, %function
|
|
||||||
GINT0_IRQHandler:
|
|
||||||
ldr r0,=GINT0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size GINT0_IRQHandler, . - GINT0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak GINT1_IRQHandler
|
|
||||||
.type GINT1_IRQHandler, %function
|
|
||||||
GINT1_IRQHandler:
|
|
||||||
ldr r0,=GINT1_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size GINT1_IRQHandler, . - GINT1_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak PIN_INT0_IRQHandler
|
|
||||||
.type PIN_INT0_IRQHandler, %function
|
|
||||||
PIN_INT0_IRQHandler:
|
|
||||||
ldr r0,=PIN_INT0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size PIN_INT0_IRQHandler, . - PIN_INT0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak PIN_INT1_IRQHandler
|
|
||||||
.type PIN_INT1_IRQHandler, %function
|
|
||||||
PIN_INT1_IRQHandler:
|
|
||||||
ldr r0,=PIN_INT1_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size PIN_INT1_IRQHandler, . - PIN_INT1_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak PIN_INT2_IRQHandler
|
|
||||||
.type PIN_INT2_IRQHandler, %function
|
|
||||||
PIN_INT2_IRQHandler:
|
|
||||||
ldr r0,=PIN_INT2_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size PIN_INT2_IRQHandler, . - PIN_INT2_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak PIN_INT3_IRQHandler
|
|
||||||
.type PIN_INT3_IRQHandler, %function
|
|
||||||
PIN_INT3_IRQHandler:
|
|
||||||
ldr r0,=PIN_INT3_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size PIN_INT3_IRQHandler, . - PIN_INT3_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak UTICK0_IRQHandler
|
|
||||||
.type UTICK0_IRQHandler, %function
|
|
||||||
UTICK0_IRQHandler:
|
|
||||||
ldr r0,=UTICK0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size UTICK0_IRQHandler, . - UTICK0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak MRT0_IRQHandler
|
|
||||||
.type MRT0_IRQHandler, %function
|
|
||||||
MRT0_IRQHandler:
|
|
||||||
ldr r0,=MRT0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size MRT0_IRQHandler, . - MRT0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak CTIMER0_IRQHandler
|
|
||||||
.type CTIMER0_IRQHandler, %function
|
|
||||||
CTIMER0_IRQHandler:
|
|
||||||
ldr r0,=CTIMER0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size CTIMER0_IRQHandler, . - CTIMER0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak CTIMER1_IRQHandler
|
|
||||||
.type CTIMER1_IRQHandler, %function
|
|
||||||
CTIMER1_IRQHandler:
|
|
||||||
ldr r0,=CTIMER1_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size CTIMER1_IRQHandler, . - CTIMER1_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak SCT0_IRQHandler
|
|
||||||
.type SCT0_IRQHandler, %function
|
|
||||||
SCT0_IRQHandler:
|
|
||||||
ldr r0,=SCT0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size SCT0_IRQHandler, . - SCT0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak CTIMER3_IRQHandler
|
|
||||||
.type CTIMER3_IRQHandler, %function
|
|
||||||
CTIMER3_IRQHandler:
|
|
||||||
ldr r0,=CTIMER3_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size CTIMER3_IRQHandler, . - CTIMER3_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM0_IRQHandler
|
|
||||||
.type FLEXCOMM0_IRQHandler, %function
|
|
||||||
FLEXCOMM0_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM0_IRQHandler, . - FLEXCOMM0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM1_IRQHandler
|
|
||||||
.type FLEXCOMM1_IRQHandler, %function
|
|
||||||
FLEXCOMM1_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM1_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM1_IRQHandler, . - FLEXCOMM1_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM2_IRQHandler
|
|
||||||
.type FLEXCOMM2_IRQHandler, %function
|
|
||||||
FLEXCOMM2_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM2_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM2_IRQHandler, . - FLEXCOMM2_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM3_IRQHandler
|
|
||||||
.type FLEXCOMM3_IRQHandler, %function
|
|
||||||
FLEXCOMM3_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM3_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM3_IRQHandler, . - FLEXCOMM3_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM4_IRQHandler
|
|
||||||
.type FLEXCOMM4_IRQHandler, %function
|
|
||||||
FLEXCOMM4_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM4_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM4_IRQHandler, . - FLEXCOMM4_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM5_IRQHandler
|
|
||||||
.type FLEXCOMM5_IRQHandler, %function
|
|
||||||
FLEXCOMM5_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM5_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM5_IRQHandler, . - FLEXCOMM5_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM6_IRQHandler
|
|
||||||
.type FLEXCOMM6_IRQHandler, %function
|
|
||||||
FLEXCOMM6_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM6_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM6_IRQHandler, . - FLEXCOMM6_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak FLEXCOMM7_IRQHandler
|
|
||||||
.type FLEXCOMM7_IRQHandler, %function
|
|
||||||
FLEXCOMM7_IRQHandler:
|
|
||||||
ldr r0,=FLEXCOMM7_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size FLEXCOMM7_IRQHandler, . - FLEXCOMM7_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak ADC0_SEQA_IRQHandler
|
|
||||||
.type ADC0_SEQA_IRQHandler, %function
|
|
||||||
ADC0_SEQA_IRQHandler:
|
|
||||||
ldr r0,=ADC0_SEQA_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size ADC0_SEQA_IRQHandler, . - ADC0_SEQA_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak ADC0_SEQB_IRQHandler
|
|
||||||
.type ADC0_SEQB_IRQHandler, %function
|
|
||||||
ADC0_SEQB_IRQHandler:
|
|
||||||
ldr r0,=ADC0_SEQB_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size ADC0_SEQB_IRQHandler, . - ADC0_SEQB_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak ADC0_THCMP_IRQHandler
|
|
||||||
.type ADC0_THCMP_IRQHandler, %function
|
|
||||||
ADC0_THCMP_IRQHandler:
|
|
||||||
ldr r0,=ADC0_THCMP_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size ADC0_THCMP_IRQHandler, . - ADC0_THCMP_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak Reserved41_IRQHandler
|
|
||||||
.type Reserved41_IRQHandler, %function
|
|
||||||
Reserved41_IRQHandler:
|
|
||||||
ldr r0,=Reserved41_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size Reserved41_IRQHandler, . - Reserved41_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak Reserved42_IRQHandler
|
|
||||||
.type Reserved42_IRQHandler, %function
|
|
||||||
Reserved42_IRQHandler:
|
|
||||||
ldr r0,=Reserved42_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size Reserved42_IRQHandler, . - Reserved42_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak USB0_NEEDCLK_IRQHandler
|
|
||||||
.type USB0_NEEDCLK_IRQHandler, %function
|
|
||||||
USB0_NEEDCLK_IRQHandler:
|
|
||||||
ldr r0,=USB0_NEEDCLK_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size USB0_NEEDCLK_IRQHandler, . - USB0_NEEDCLK_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak USB0_IRQHandler
|
|
||||||
.type USB0_IRQHandler, %function
|
|
||||||
USB0_IRQHandler:
|
|
||||||
ldr r0,=USB0_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size USB0_IRQHandler, . - USB0_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak RTC_IRQHandler
|
|
||||||
.type RTC_IRQHandler, %function
|
|
||||||
RTC_IRQHandler:
|
|
||||||
ldr r0,=RTC_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size RTC_IRQHandler, . - RTC_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak Reserved46_IRQHandler
|
|
||||||
.type Reserved46_IRQHandler, %function
|
|
||||||
Reserved46_IRQHandler:
|
|
||||||
ldr r0,=Reserved46_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size Reserved46_IRQHandler, . - Reserved46_IRQHandler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak Reserved47_IRQHandler
|
|
||||||
.type Reserved47_IRQHandler, %function
|
|
||||||
Reserved47_IRQHandler:
|
|
||||||
ldr r0,=Reserved47_DriverIRQHandler
|
|
||||||
bx r0
|
|
||||||
.size Reserved47_IRQHandler, . - Reserved47_IRQHandler
|
|
||||||
|
|
||||||
/* Macro to define default handlers. Default handler
|
|
||||||
* will be weak symbol and just dead loops. They can be
|
|
||||||
* overwritten by other handlers */
|
|
||||||
.macro def_irq_handler handler_name
|
|
||||||
.weak \handler_name
|
|
||||||
.set \handler_name, DefaultISR
|
|
||||||
.endm
|
|
||||||
def_irq_handler WDT_BOD_DriverIRQHandler
|
|
||||||
def_irq_handler DMA0_DriverIRQHandler
|
|
||||||
def_irq_handler GINT0_DriverIRQHandler
|
|
||||||
def_irq_handler GINT1_DriverIRQHandler
|
|
||||||
def_irq_handler PIN_INT0_DriverIRQHandler
|
|
||||||
def_irq_handler PIN_INT1_DriverIRQHandler
|
|
||||||
def_irq_handler PIN_INT2_DriverIRQHandler
|
|
||||||
def_irq_handler PIN_INT3_DriverIRQHandler
|
|
||||||
def_irq_handler UTICK0_DriverIRQHandler
|
|
||||||
def_irq_handler MRT0_DriverIRQHandler
|
|
||||||
def_irq_handler CTIMER0_DriverIRQHandler
|
|
||||||
def_irq_handler CTIMER1_DriverIRQHandler
|
|
||||||
def_irq_handler SCT0_DriverIRQHandler
|
|
||||||
def_irq_handler CTIMER3_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM0_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM1_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM2_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM3_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM4_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM5_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM6_DriverIRQHandler
|
|
||||||
def_irq_handler FLEXCOMM7_DriverIRQHandler
|
|
||||||
def_irq_handler ADC0_SEQA_DriverIRQHandler
|
|
||||||
def_irq_handler ADC0_SEQB_DriverIRQHandler
|
|
||||||
def_irq_handler ADC0_THCMP_DriverIRQHandler
|
|
||||||
def_irq_handler Reserved41_DriverIRQHandler
|
|
||||||
def_irq_handler Reserved42_DriverIRQHandler
|
|
||||||
def_irq_handler USB0_NEEDCLK_DriverIRQHandler
|
|
||||||
def_irq_handler USB0_DriverIRQHandler
|
|
||||||
def_irq_handler RTC_DriverIRQHandler
|
|
||||||
def_irq_handler Reserved46_DriverIRQHandler
|
|
||||||
def_irq_handler Reserved47_DriverIRQHandler
|
|
||||||
|
|
||||||
.end
|
|
||||||
47
hw/bsp/lpcxpresso54114/board.mk
Normal file
47
hw/bsp/lpcxpresso54114/board.mk
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
CFLAGS += \
|
||||||
|
-mthumb \
|
||||||
|
-mabi=aapcs \
|
||||||
|
-mcpu=cortex-m4 \
|
||||||
|
-mfloat-abi=hard \
|
||||||
|
-mfpu=fpv4-sp-d16 \
|
||||||
|
-DCORE_M4 \
|
||||||
|
-DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
|
||||||
|
-DCPU_LPC54114J256BD64_cm4 \
|
||||||
|
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data")))' \
|
||||||
|
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
|
||||||
|
|
||||||
|
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc54xxx/devices/LPC54114
|
||||||
|
|
||||||
|
# All source paths should be relative to the top level.
|
||||||
|
LD_FILE = $(MCU_DIR)/gcc/LPC54114J256_cm4_flash.ld
|
||||||
|
|
||||||
|
SRC_C += \
|
||||||
|
$(MCU_DIR)/system_LPC54114_cm4.c \
|
||||||
|
$(MCU_DIR)/drivers/fsl_clock.c \
|
||||||
|
$(MCU_DIR)/drivers/fsl_gpio.c \
|
||||||
|
$(MCU_DIR)/drivers/fsl_power.c \
|
||||||
|
$(MCU_DIR)/drivers/fsl_reset.c
|
||||||
|
|
||||||
|
INC += \
|
||||||
|
$(TOP)/hw/mcu/nxp/lpc_driver/lpc54xxx/CMSIS/Include \
|
||||||
|
$(TOP)/$(MCU_DIR) \
|
||||||
|
$(TOP)/$(MCU_DIR)/drivers
|
||||||
|
|
||||||
|
SRC_S += $(MCU_DIR)/gcc/startup_LPC54114_cm4.S
|
||||||
|
|
||||||
|
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_cm4_hardabi.a
|
||||||
|
|
||||||
|
# For TinyUSB port source
|
||||||
|
VENDOR = nxp
|
||||||
|
CHIP_FAMILY = lpc_ip3511
|
||||||
|
|
||||||
|
# For freeRTOS port source
|
||||||
|
FREERTOS_PORT = ARM_CM4
|
||||||
|
|
||||||
|
# For flash-jlink target
|
||||||
|
JLINK_DEVICE = LPC54114J256_M4
|
||||||
|
JLINK_IF = swd
|
||||||
|
|
||||||
|
# flash using pyocd
|
||||||
|
flash: $(BUILD)/$(BOARD)-firmware.hex
|
||||||
|
pyocd flash -t LPC54114 $<
|
||||||
171
hw/bsp/lpcxpresso54114/lpcxpresso54114.c
Normal file
171
hw/bsp/lpcxpresso54114/lpcxpresso54114.c
Normal file
@ -0,0 +1,171 @@
|
|||||||
|
/*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2018, hathach (tinyusb.org)
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*
|
||||||
|
* This file is part of the TinyUSB stack.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../board.h"
|
||||||
|
#include "fsl_device_registers.h"
|
||||||
|
#include "fsl_gpio.h"
|
||||||
|
#include "fsl_power.h"
|
||||||
|
#include "fsl_iocon.h"
|
||||||
|
|
||||||
|
#define LED_PORT 0
|
||||||
|
#define LED_PIN 29
|
||||||
|
#define LED_STATE_ON 0
|
||||||
|
|
||||||
|
// WAKE button
|
||||||
|
#define BUTTON_PORT 0
|
||||||
|
#define BUTTON_PIN 24
|
||||||
|
|
||||||
|
// IOCON pin mux
|
||||||
|
#define IOCON_PIO_DIGITAL_EN 0x80u /*!<@brief Enables digital function */
|
||||||
|
#define IOCON_PIO_FUNC0 0x00u
|
||||||
|
#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
|
||||||
|
#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
|
||||||
|
#define IOCON_PIO_INPFILT_OFF 0x0100u /*!<@brief Input filter disabled */
|
||||||
|
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
|
||||||
|
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
|
||||||
|
#define IOCON_PIO_MODE_PULLUP 0x10u
|
||||||
|
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
|
||||||
|
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
|
||||||
|
|
||||||
|
/****************************************************************
|
||||||
|
name: BOARD_BootClockFROHF96M
|
||||||
|
outputs:
|
||||||
|
- {id: SYSTICK_clock.outFreq, value: 96 MHz}
|
||||||
|
- {id: System_clock.outFreq, value: 96 MHz}
|
||||||
|
settings:
|
||||||
|
- {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf}
|
||||||
|
sources:
|
||||||
|
- {id: SYSCON.fro_hf.outFreq, value: 96 MHz}
|
||||||
|
******************************************************************/
|
||||||
|
void BootClockFROHF96M(void)
|
||||||
|
{
|
||||||
|
/*!< Set up the clock sources */
|
||||||
|
/*!< Set up FRO */
|
||||||
|
POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); /*!< Ensure FRO is on */
|
||||||
|
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without
|
||||||
|
accidentally being below the voltage for current speed */
|
||||||
|
POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
|
||||||
|
CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */
|
||||||
|
|
||||||
|
CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */
|
||||||
|
|
||||||
|
/*!< Set up dividers */
|
||||||
|
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
|
||||||
|
|
||||||
|
/*!< Set up clock selectors - Attach clocks to the peripheries */
|
||||||
|
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
|
||||||
|
|
||||||
|
/*!< Set SystemCoreClock variable. */
|
||||||
|
SystemCoreClock = 96000000U;
|
||||||
|
}
|
||||||
|
|
||||||
|
void board_init(void)
|
||||||
|
{
|
||||||
|
// Enable IOCON clock
|
||||||
|
CLOCK_EnableClock(kCLOCK_Iocon);
|
||||||
|
|
||||||
|
// Enable GPIO0 clock
|
||||||
|
CLOCK_EnableClock(kCLOCK_Gpio0);
|
||||||
|
|
||||||
|
// Init 96 MHz clock
|
||||||
|
BootClockFROHF96M();
|
||||||
|
|
||||||
|
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||||
|
// 1ms tick timer
|
||||||
|
SysTick_Config(SystemCoreClock / 1000);
|
||||||
|
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||||
|
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||||
|
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
|
||||||
|
#endif
|
||||||
|
|
||||||
|
GPIO_PortInit(GPIO, LED_PORT);
|
||||||
|
GPIO_PortInit(GPIO, BUTTON_PORT);
|
||||||
|
|
||||||
|
// LED
|
||||||
|
gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 0};
|
||||||
|
GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
|
||||||
|
board_led_write(true);
|
||||||
|
|
||||||
|
// Button
|
||||||
|
gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0};
|
||||||
|
GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
|
||||||
|
|
||||||
|
// USB
|
||||||
|
const uint32_t port1_pin6_config = (
|
||||||
|
IOCON_PIO_FUNC7 | /* Pin is configured as USB0_VBUS */
|
||||||
|
IOCON_PIO_MODE_INACT | /* No addition pin function */
|
||||||
|
IOCON_PIO_INV_DI | /* Input function is not inverted */
|
||||||
|
IOCON_PIO_DIGITAL_EN | /* Enables digital function */
|
||||||
|
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
|
||||||
|
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */
|
||||||
|
);
|
||||||
|
IOCON_PinMuxSet(IOCON, 1, 6, port1_pin6_config); /* PORT1 PIN6 (coords: 26) is configured as USB0_VBUS */
|
||||||
|
|
||||||
|
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*Turn on USB Phy */
|
||||||
|
CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */
|
||||||
|
}
|
||||||
|
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
// Board porting API
|
||||||
|
//--------------------------------------------------------------------+
|
||||||
|
|
||||||
|
void board_led_write(bool state)
|
||||||
|
{
|
||||||
|
GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t board_button_read(void)
|
||||||
|
{
|
||||||
|
// active low
|
||||||
|
return 1-GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN);
|
||||||
|
}
|
||||||
|
|
||||||
|
int board_uart_read(uint8_t* buf, int len)
|
||||||
|
{
|
||||||
|
(void) buf;
|
||||||
|
(void) len;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int board_uart_write(void const * buf, int len)
|
||||||
|
{
|
||||||
|
(void) buf;
|
||||||
|
(void) len;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||||
|
volatile uint32_t system_ticks = 0;
|
||||||
|
void SysTick_Handler(void)
|
||||||
|
{
|
||||||
|
system_ticks++;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t board_millis(void)
|
||||||
|
{
|
||||||
|
return system_ticks;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
@ -1 +1 @@
|
|||||||
Subproject commit dee2dad8e9246afdad7c6ed0e331b2f79f21fb8a
|
Subproject commit d57fc04da5d0cdac43e408cfce61ce347220f477
|
||||||
@ -178,7 +178,7 @@ bool hidd_open(uint8_t rhport, tusb_desc_interface_t const * desc_itf, uint16_t
|
|||||||
|
|
||||||
p_hid->boot_mode = false; // default mode is REPORT
|
p_hid->boot_mode = false; // default mode is REPORT
|
||||||
p_hid->itf_num = desc_itf->bInterfaceNumber;
|
p_hid->itf_num = desc_itf->bInterfaceNumber;
|
||||||
p_hid->reprot_desc_len = desc_hid->wReportLength;
|
memcpy(&p_hid->reprot_desc_len, &desc_hid->wReportLength, 2);
|
||||||
|
|
||||||
*p_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t);
|
*p_len = sizeof(tusb_desc_interface_t) + sizeof(tusb_hid_descriptor_hid_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t);
|
||||||
|
|
||||||
|
|||||||
@ -44,6 +44,7 @@ enum
|
|||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
|
// TODO optimize alignment
|
||||||
CFG_TUSB_MEM_ALIGN msc_cbw_t cbw;
|
CFG_TUSB_MEM_ALIGN msc_cbw_t cbw;
|
||||||
CFG_TUSB_MEM_ALIGN msc_csw_t csw;
|
CFG_TUSB_MEM_ALIGN msc_csw_t csw;
|
||||||
|
|
||||||
|
|||||||
@ -26,7 +26,7 @@
|
|||||||
|
|
||||||
#include "tusb_option.h"
|
#include "tusb_option.h"
|
||||||
|
|
||||||
/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller
|
/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller with code name LPC IP3511
|
||||||
* for almost their new MCUs. Currently supported and tested families are
|
* for almost their new MCUs. Currently supported and tested families are
|
||||||
* - LPC11Uxx
|
* - LPC11Uxx
|
||||||
* - LPC13xx
|
* - LPC13xx
|
||||||
@ -38,14 +38,15 @@
|
|||||||
|
|
||||||
#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
|
#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
|
||||||
CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
|
CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
|
||||||
CFG_TUSB_MCU == OPT_MCU_LPC51UXX )
|
CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \
|
||||||
|
CFG_TUSB_MCU == OPT_MCU_LPC54XXX )
|
||||||
|
|
||||||
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX
|
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX
|
||||||
// LPC11Uxx and LPC13xx use lpcopen
|
// LPC11Uxx and LPC13xx use lpcopen
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
#define DCD_REGS LPC_USB
|
#define DCD_REGS LPC_USB
|
||||||
#define DCD_IRQHandler USB_IRQHandler
|
#define DCD_IRQHandler USB_IRQHandler
|
||||||
#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX
|
#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX
|
||||||
#include "fsl_device_registers.h"
|
#include "fsl_device_registers.h"
|
||||||
#define DCD_REGS USB0
|
#define DCD_REGS USB0
|
||||||
#define DCD_IRQHandler USB0_IRQHandler
|
#define DCD_IRQHandler USB0_IRQHandler
|
||||||
@ -60,19 +61,20 @@
|
|||||||
// Number of endpoints
|
// Number of endpoints
|
||||||
#define EP_COUNT 10
|
#define EP_COUNT 10
|
||||||
|
|
||||||
// only SRAM1 & USB RAM can be used for transfer
|
// only SRAM1 & USB RAM can be used for transfer.
|
||||||
|
// Used to set DATABUFSTART which is 22-bit aligned
|
||||||
// 2000 0000 to 203F FFFF
|
// 2000 0000 to 203F FFFF
|
||||||
#define SRAM_REGION 0x20000000
|
#define SRAM_REGION 0x20000000
|
||||||
|
|
||||||
/* Although device controller are the same. DMA of
|
/* Although device controller are the same. Somehow only LPC134x can execute
|
||||||
* - M0/M+ can only transfer up to nbytes = 64
|
* DMA with 1023 bytes for Bulk/Control. Others (11u, 51u, 54xxx) can only work
|
||||||
* - M3/M4 can transfer nbytes = 1023 (maximum)
|
* with max 64 bytes
|
||||||
*/
|
*/
|
||||||
enum {
|
enum {
|
||||||
#ifdef __ARM_ARCH_6M__ // Cortex M0/M0+
|
#if CFG_TUSB_MCU == OPT_MCU_LPC13XX
|
||||||
DMA_NBYTES_MAX = 64
|
|
||||||
#else
|
|
||||||
DMA_NBYTES_MAX = 1023
|
DMA_NBYTES_MAX = 1023
|
||||||
|
#else
|
||||||
|
DMA_NBYTES_MAX = 64
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -43,6 +43,7 @@
|
|||||||
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
|
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
|
||||||
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
|
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
|
||||||
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
|
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
|
||||||
|
#define OPT_MCU_LPC54XXX 10 ///< NXP LPC54xxx
|
||||||
|
|
||||||
#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series
|
#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series
|
||||||
|
|
||||||
|
|||||||
Loading…
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Reference in New Issue
Block a user