mirror of
https://github.com/hathach/tinyusb.git
synced 2025-04-18 11:42:25 +00:00
add note for openocd with wch, also add wch-riscv.cfg
This commit is contained in:
parent
a7e1de1e83
commit
3cc6cece07
@ -30,7 +30,7 @@ CFLAGS += \
|
|||||||
-nostdlib -nostartfiles \
|
-nostdlib -nostartfiles \
|
||||||
-DCFG_TUSB_MCU=OPT_MCU_CH32V307 \
|
-DCFG_TUSB_MCU=OPT_MCU_CH32V307 \
|
||||||
-Xlinker --gc-sections \
|
-Xlinker --gc-sections \
|
||||||
-DBOARD_DEVICE_RHPORT_SPEED=OPT_MODE_HIGH_SPEED
|
-DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
|
||||||
|
|
||||||
# caused by extra void USART_Printf_Init() in debug_uart.h and EVT/EXAME/SRC/DEBUG/debug.h
|
# caused by extra void USART_Printf_Init() in debug_uart.h and EVT/EXAME/SRC/DEBUG/debug.h
|
||||||
CFLAGS += -Wno-error=redundant-decls
|
CFLAGS += -Wno-error=redundant-decls
|
||||||
@ -51,7 +51,6 @@ SRC_S += \
|
|||||||
|
|
||||||
INC += \
|
INC += \
|
||||||
src/portable/wch/ch32v307 \
|
src/portable/wch/ch32v307 \
|
||||||
$(TOP)/$(BOARD_PATH)/.. \
|
|
||||||
$(TOP)/$(BOARD_PATH) \
|
$(TOP)/$(BOARD_PATH) \
|
||||||
$(CH32V307_SDK_SRC_TOP)/Peripheral/inc \
|
$(CH32V307_SDK_SRC_TOP)/Peripheral/inc \
|
||||||
$(CH32V307_SDK_SRC_TOP)/Debug \
|
$(CH32V307_SDK_SRC_TOP)/Debug \
|
||||||
@ -60,6 +59,19 @@ INC += \
|
|||||||
# For freeRTOS port source
|
# For freeRTOS port source
|
||||||
FREERTOS_PORT = RISC-V
|
FREERTOS_PORT = RISC-V
|
||||||
|
|
||||||
|
# wch-link is not supported yet in official openOCD yet. We need to either use
|
||||||
|
# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
|
||||||
|
# 2. compiled from modified source https://github.com/kprasadvnsi/riscv-openocd-wch
|
||||||
|
#
|
||||||
|
# Note: For Linux, somehow openocd in mounriver studio does not seem to have wch-link enable,
|
||||||
|
# therefore we need to compile it from source as follows:
|
||||||
|
# git clone https://github.com/kprasadvnsi/riscv-openocd-wch
|
||||||
|
# cd riscv-openocd-wch
|
||||||
|
# ./bootstrap
|
||||||
|
# ./configure CFLAGS="-Wno-error" --enable-wlink
|
||||||
|
# make
|
||||||
|
# openocd binaries will be generated in riscv-openocd-wch/src
|
||||||
|
|
||||||
# flash target ROM bootloader
|
# flash target ROM bootloader
|
||||||
flash: $(BUILD)/$(PROJECT).elf
|
flash: $(BUILD)/$(PROJECT).elf
|
||||||
openocd -f wch-riscv.cfg -c init -c halt -c "program $< 0x08000000" -c reset -c exit
|
openocd -f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg -c init -c halt -c "program $<" -c reset -c exit
|
||||||
|
15
hw/bsp/ch32v307/wch-riscv.cfg
Normal file
15
hw/bsp/ch32v307/wch-riscv.cfg
Normal file
@ -0,0 +1,15 @@
|
|||||||
|
#interface wlink
|
||||||
|
adapter driver wlink
|
||||||
|
wlink_set
|
||||||
|
set _CHIPNAME riscv
|
||||||
|
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
|
||||||
|
|
||||||
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
|
|
||||||
|
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
|
||||||
|
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
|
||||||
|
set _FLASHNAME $_CHIPNAME.flash
|
||||||
|
|
||||||
|
flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
|
||||||
|
|
||||||
|
echo "Ready for Remote Connections"
|
@ -70,7 +70,7 @@ void dcd_init(uint8_t rhport) {
|
|||||||
|
|
||||||
USBHSD->CONTROL = 0;
|
USBHSD->CONTROL = 0;
|
||||||
|
|
||||||
#if (BOARD_DEVICE_RHPORT_SPEED == OPT_MODE_HIGH_SPEED)
|
#if TUD_OPT_HIGH_SPEED
|
||||||
USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED;
|
USBHSD->CONTROL = USBHS_DMA_EN | USBHS_INT_BUSY_EN | USBHS_HIGH_SPEED;
|
||||||
#else
|
#else
|
||||||
#error OPT_MODE_FULL_SPEED not currently supported on CH32V307
|
#error OPT_MODE_FULL_SPEED not currently supported on CH32V307
|
||||||
@ -383,4 +383,4 @@ void dcd_int_handler(uint8_t rhport) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
x
Reference in New Issue
Block a user