From 3b6013e78f66551e4516db348f3d0f547731c782 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 12 Jul 2019 14:21:34 +0700 Subject: [PATCH] clean up --- src/common/tusb_common.h | 5 +++-- src/common/tusb_verify.h | 42 ++++++++++++++++++++-------------------- 2 files changed, 24 insertions(+), 23 deletions(-) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index c77be2a9f..ee77b62f1 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -146,9 +146,10 @@ static inline bool tu_bit_test (uint32_t value, uint8_t n) { return (value & * Nth position is the same as the number of arguments * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma) *------------------------------------------------------------------*/ -#ifndef VA_ARGS_NUM_ +#ifndef TU_ARGS_NUM + +#define TU_ARGS_NUM(...) NARG_(_0, ##__VA_ARGS__,_RSEQ_N()) -#define VA_ARGS_NUM_(...) NARG_(_0, ##__VA_ARGS__,_RSEQ_N()) #define NARG_(...) _GET_NTH_ARG(__VA_ARGS__) #define _GET_NTH_ARG( \ _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \ diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h index eecc95ccb..08ddf78ad 100644 --- a/src/common/tusb_verify.h +++ b/src/common/tusb_verify.h @@ -51,8 +51,8 @@ //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG #include - #define _MESS_ERR(_err) printf("%s: %d: failed, error = %s\n", __func__, __LINE__, tusb_strerr[_err]) - #define _MESS_FAILED() printf("%s: %d: failed\n", __func__, __LINE__) + #define _MESS_ERR(_err) printf("%s: %d: failed, error = %s\n", __func__, __LINE__, tusb_strerr[_err]) + #define _MESS_FAILED() printf("%s: %d: failed\n", __func__, __LINE__) #else #define _MESS_ERR(_err) #define _MESS_FAILED() @@ -61,11 +61,11 @@ // Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 #if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) -#define TU_BREAKPOINT() \ - do {\ - volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ - if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */\ - } while(0) +#define TU_BREAKPOINT() do \ +{ \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */ \ +} while(0) #else #define TU_BREAKPOINT() @@ -80,22 +80,23 @@ #define GET_4TH_ARG(arg1, arg2, arg3, arg4, ...) arg4 /*------------- Generator for TU_VERIFY and TU_VERIFY_HDLR -------------*/ -#define TU_VERIFY_DEFINE(_cond, _handler, _ret) do { if ( !(_cond) ) { _handler; return _ret; } } while(0) +#define TU_VERIFY_DEFINE(_cond, _handler, _ret) do \ +{ \ + if ( !(_cond) ) { _handler; return _ret; } \ +} while(0) /*------------- Generator for TU_VERIFY_ERR and TU_VERIFY_ERR_HDLR -------------*/ -#define TU_VERIFY_ERR_DEF2(_error, _handler) \ - do { \ - uint32_t _err = (uint32_t)(_error); \ - if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _err; }\ - } while(0) - -#define TU_VERIFY_ERR_DEF3(_error, _handler, _ret) \ - do { \ - uint32_t _err = (uint32_t)(_error); \ - if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _ret; }\ - } while(0) - +#define TU_VERIFY_ERR_DEF2(_error, _handler) do \ +{ \ + uint32_t _err = (uint32_t)(_error); \ + if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _err; } \ +} while(0) +#define TU_VERIFY_ERR_DEF3(_error, _handler, _ret) do \ +{ \ + uint32_t _err = (uint32_t)(_error); \ + if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _ret; } \ +} while(0) /*------------------------------------------------------------------*/ @@ -141,7 +142,6 @@ #define TU_VERIFY_ERR_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_ERR_HDLR_3ARGS, TU_VERIFY_ERR_HDLR_2ARGS)(__VA_ARGS__) - /*------------------------------------------------------------------*/ /* ASSERT * basically TU_VERIFY with TU_BREAKPOINT() as handler