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https://github.com/hathach/tinyusb.git
synced 2025-03-25 23:38:06 +00:00
fix bug: adjust all bulk queue head from ehci_data.device
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f6acca6664
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397d62db10
@ -127,7 +127,7 @@ void test_isr_disconnect_then_async_advance_control_pipe(void)
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.wValue = 3 },
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NULL);
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ehci_qhd_t *p_qhd = &ehci_data.device[dev_addr].control.qhd;
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ehci_qhd_t *p_qhd = get_control_qhd(dev_addr);
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ehci_qtd_t *p_qtd_head = p_qhd->p_qtd_list_head;
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ehci_qtd_t *p_qtd_tail = p_qhd->p_qtd_list_tail;
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@ -162,7 +162,7 @@ void test_bulk_pipe_close(void)
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hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), 100);
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hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), 50);
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ehci_qhd_t *p_qhd = &ehci_data.device[dev_addr].qhd[pipe_hdl.index];
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ehci_qhd_t *p_qhd = &ehci_data.device[dev_addr-1].qhd[pipe_hdl.index];
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ehci_qtd_t *p_qtd_head = p_qhd->p_qtd_list_head;
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ehci_qtd_t *p_qtd_tail = p_qhd->p_qtd_list_tail;
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@ -153,7 +153,7 @@ void test_open_bulk_qhd_data(void)
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl.xfer_type);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1 ].qhd[ pipe_hdl.index ];
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verify_bulk_open_qhd(p_qhd, desc_endpoint, TUSB_CLASS_MSC);
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//------------- async list check -------------//
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@ -169,7 +169,7 @@ void test_bulk_close(void)
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{
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tusb_descriptor_endpoint_t const * desc_endpoint = &desc_ept_bulk_in;
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pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
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ehci_qhd_t *p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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ehci_qhd_t *p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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//------------- Code Under TEST -------------//
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hcd_pipe_close(pipe_hdl);
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@ -101,7 +101,7 @@ void setUp(void)
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl_bulk.xfer_type);
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p_qhd_bulk = &ehci_data.device[ dev_addr ].qhd[ pipe_hdl_bulk.index ];
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p_qhd_bulk = &ehci_data.device[ dev_addr -1].qhd[ pipe_hdl_bulk.index ];
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}
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void tearDown(void)
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@ -98,9 +98,9 @@ void setUp(void)
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async_head = get_async_head( hostid );
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p_setup = &ehci_data.device[dev_addr].control.qtd[0];
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p_data = &ehci_data.device[dev_addr].control.qtd[1];
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p_status = &ehci_data.device[dev_addr].control.qtd[2];
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p_setup = &ehci_data.device[dev_addr-1].control.qtd[0];
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p_data = &ehci_data.device[dev_addr-1].control.qtd[1];
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p_status = &ehci_data.device[dev_addr-1].control.qtd[2];
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}
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void tearDown(void)
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@ -148,7 +148,7 @@ void test_open_interrupt_qhd_hs(void)
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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verify_int_qhd(p_qhd, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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@ -169,7 +169,7 @@ void test_open_interrupt_qhd_non_hs(void)
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TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
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TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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p_qhd = &ehci_data.device[ pipe_hdl.dev_addr-1].qhd[ pipe_hdl.index ];
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verify_int_qhd(p_qhd, &desc_ept_interrupt_out, TUSB_CLASS_HID);
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@ -61,10 +61,12 @@ void ehci_controller_run(uint8_t hostid);
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void ehci_controller_device_plug(uint8_t hostid, tusb_speed_t speed);
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void ehci_controller_device_unplug(uint8_t hostid);
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ehci_registers_t* const get_operational_register(uint8_t hostid);
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ehci_link_t* const get_period_frame_list(uint8_t list_idx);
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ehci_qhd_t* const get_async_head(uint8_t hostid);
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ehci_qhd_t* const get_period_head(uint8_t hostid);
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ehci_registers_t* get_operational_register(uint8_t hostid);
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ehci_link_t* get_period_frame_list(uint8_t list_idx);
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ehci_qhd_t* get_async_head(uint8_t hostid);
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ehci_qhd_t* get_period_head(uint8_t hostid);
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ehci_qhd_t* get_control_qhd(uint8_t dev_addr);
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ehci_qtd_t* get_control_qtds(uint8_t dev_addr);
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#ifdef __cplusplus
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}
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@ -111,6 +111,13 @@ STATIC_ INLINE_ ehci_qhd_t* get_period_head(uint8_t hostid)
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return &ehci_data.period_head[ hostid_to_data_idx(hostid) ];
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}
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static inline uint8_t get_qhd_index(ehci_qhd_t * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
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static inline uint8_t get_qhd_index(ehci_qhd_t * p_qhd)
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{
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return p_qhd - ehci_data.device[p_qhd->device_address-1].qhd;
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}
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tusb_error_t hcd_controller_init(uint8_t hostid) ATTR_WARN_UNUSED_RESULT;
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//--------------------------------------------------------------------+
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@ -159,12 +166,6 @@ bool hcd_port_connect_status(uint8_t hostid)
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//--------------------------------------------------------------------+
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// EHCI Interrupt Handler
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//--------------------------------------------------------------------+
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static inline uint8_t get_qhd_index(ehci_qhd_t * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
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static inline uint8_t get_qhd_index(ehci_qhd_t * p_qhd)
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{
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return p_qhd - ehci_data.device[p_qhd->device_address].qhd;
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}
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void async_advance_isr(ehci_qhd_t * const async_head)
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{
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if(async_head->is_removing) // closing control pipe of addr0
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@ -419,8 +420,8 @@ tusb_error_t hcd_controller_reset(uint8_t hostid)
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//--------------------------------------------------------------------+
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static void init_qhd(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type);
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static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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STATIC_ INLINE_ ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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STATIC_ INLINE_ ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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//--------------------------------------------------------------------+
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// CONTROL PIPE API
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@ -569,22 +570,30 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
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//--------------------------------------------------------------------+
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// BULK/INT/ISO PIPE API
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//--------------------------------------------------------------------+
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static inline ehci_qhd_t* find_free_qhd (uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE;
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static inline ehci_qhd_t* find_free_qhd (uint8_t dev_addr)
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{
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uint8_t relative_address = dev_addr-1;
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uint8_t index=0;
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while( index<EHCI_MAX_QHD && ehci_data.device[relative_address].qhd[index].used )
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{
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index++;
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}
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return (index < EHCI_MAX_QHD) ? &ehci_data.device[relative_address].qhd[index] : NULL;
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}
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pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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{
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pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 };
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ASSERT(dev_addr > 0, null_handle);
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if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
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return null_handle; // TODO not support ISO yet
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//------------- find a free queue head -------------//
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uint8_t index=0;
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while( index<EHCI_MAX_QHD && ehci_data.device[dev_addr].qhd[index].used )
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{
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index++;
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}
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ASSERT( index < EHCI_MAX_QHD, null_handle);
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ehci_qhd_t * const p_qhd = find_free_qhd(dev_addr);
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ASSERT_PTR(p_qhd, null_handle);
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].qhd[index];
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init_qhd(p_qhd, dev_addr, p_endpoint_desc->wMaxPacketSize, p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
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p_qhd->class_code = class_code;
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@ -604,24 +613,36 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const *
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list_insert( (ehci_link_t*) list_head,
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(ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD);
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return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = index};
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return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = get_qhd_index(p_qhd) };
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}
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static inline ehci_qhd_t* get_qhd_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE;
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static inline ehci_qhd_t* get_qhd_from_pipe_handle(pipe_handle_t pipe_hdl)
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{
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return &ehci_data.device[ pipe_hdl.dev_addr-1 ].qhd[ pipe_hdl.index ];
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}
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STATIC_ INLINE_ ehci_qtd_t* find_free_qtd(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE;
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STATIC_ INLINE_ ehci_qtd_t* find_free_qtd(uint8_t dev_addr)
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{
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uint8_t index=0;
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while( index<EHCI_MAX_QTD && ehci_data.device[dev_addr-1].qtd[index].used )
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{
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index++;
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}
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return (index < EHCI_MAX_QTD) ? &ehci_data.device[dev_addr-1].qtd[index] : NULL;
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}
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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{
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//------------- TODO pipe handle validate -------------//
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//------------- find a free qtd -------------//
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uint8_t index=0;
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while( index<EHCI_MAX_QTD && ehci_data.device[pipe_hdl.dev_addr].qtd[index].used )
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{
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index++;
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}
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ASSERT( index < EHCI_MAX_QTD, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD);
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//------------- set up QTD -------------//
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ehci_qhd_t *p_qhd = &ehci_data.device[pipe_hdl.dev_addr].qhd[pipe_hdl.index];
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ehci_qtd_t *p_qtd = &ehci_data.device[pipe_hdl.dev_addr].qtd[index];
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ehci_qhd_t *p_qhd = get_qhd_from_pipe_handle(pipe_hdl);
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ehci_qtd_t *p_qtd = find_free_qtd(pipe_hdl.dev_addr);
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ASSERT_PTR(p_qtd, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD);
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init_qtd(p_qtd, (uint32_t) buffer, total_bytes);
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p_qtd->pid = p_qhd->pid_non_control;
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@ -633,17 +654,14 @@ tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t t
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return TUSB_ERROR_NONE;
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}
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static inline ehci_qhd_t* get_qhd_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE;
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static inline ehci_qhd_t* get_qhd_from_pipe_handle(pipe_handle_t pipe_hdl)
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{
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return &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
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}
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tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl)
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{
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ASSERT(pipe_hdl.dev_addr > 0, TUSB_ERROR_INVALID_PARA);
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ASSERT(pipe_hdl.xfer_type != TUSB_XFER_ISOCHRONOUS, TUSB_ERROR_INVALID_PARA);
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ehci_qhd_t *p_qhd = get_qhd_from_pipe_handle( pipe_hdl );
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p_qhd->is_removing = 1;
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if ( pipe_hdl.xfer_type == TUSB_XFER_BULK )
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@ -662,17 +680,17 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl)
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//--------------------------------------------------------------------+
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// HELPER
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//--------------------------------------------------------------------+
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static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr)
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STATIC_ INLINE_ ehci_qhd_t* get_control_qhd(uint8_t dev_addr)
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{
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return (dev_addr == 0) ?
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get_async_head( usbh_device_info_pool[dev_addr].core_id ) :
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&ehci_data.device[dev_addr-1].control.qhd;
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}
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static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
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STATIC_ INLINE_ ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
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{
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return (dev_addr == 0) ?
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ehci_data.addr0_qtd :
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ehci_data.device[ dev_addr ].control.qtd;
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ehci_data.device[ dev_addr-1 ].control.qtd;
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}
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@ -724,5 +742,4 @@ static void init_qhd(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si
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}
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#endif
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