add cmake for samg55

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hathach 2024-05-04 17:23:16 +07:00
parent c020a0190d
commit 3791514908
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GPG Key ID: 26FAB84F615C3C52
13 changed files with 404 additions and 120 deletions

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@ -48,7 +48,7 @@ jobs:
- 'nrf'
- 'ra'
- 'rp2040'
- 'samd11 samd21 saml2x samd5x_e5x'
- 'samd11 samd21 saml2x samd5x_e5x samg'
- 'stm32f0'
- 'stm32f1'
- 'stm32f2'

10
.idea/cmake.xml generated
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@ -66,7 +66,7 @@
<configuration PROFILE_NAME="metro_m0_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m0_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
<configuration PROFILE_NAME="feather_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
<configuration PROFILE_NAME="metro_m4_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m4_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
<configuration PROFILE_NAME="same54_xplained" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=2 -DLOGGER=RTT" />
<configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=2 -DLOGGER=RTT" />
<configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=3 -DLOGGER=RTT -DMAX3421_HOST=1" />
<configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
<configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=3 -DLOGGER=RTT -DTRACE_ETM=1" />
@ -119,11 +119,13 @@
<configuration PROFILE_NAME="lpcxpresso1549" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso1549 -DLOG=2 -DLOGGER=RTT" />
<configuration PROFILE_NAME="lpcxpresso51u68" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=lpcxpresso51u68 -DLOG=2 -DLOGGER=RTT" />
<configuration PROFILE_NAME="msp_exp432e401y" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=msp_exp432e401y -DLOG=2" />
<configuration PROFILE_NAME="atsaml21_xpro" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=atsaml21_xpro" />
<configuration PROFILE_NAME="stm32wb55nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32wb55nucleo" />
<configuration PROFILE_NAME="atsaml21_xpro" ENABLED="false" GENERATION_OPTIONS="-DBOARD=atsaml21_xpro" />
<configuration PROFILE_NAME="stm32wb55nucleo" ENABLED="false" GENERATION_OPTIONS="-DBOARD=stm32wb55nucleo" />
<configuration PROFILE_NAME="samd11_xplained" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=samd11_xplained" />
<configuration PROFILE_NAME="ek_tm4c123gxl" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=ek_tm4c123gxl" />
<configuration PROFILE_NAME="xmc4500_relax" ENABLED="true" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=xmc4500_relax -DLOG=2 -DLOGGER=RTT" />
<configuration PROFILE_NAME="xmc4500_relax" ENABLED="false" GENERATION_OPTIONS="-DBOARD=xmc4500_relax -DLOG=2 -DLOGGER=RTT" />
<configuration PROFILE_NAME="f1c100s" ENABLED="false" GENERATION_OPTIONS="-DBOARD=f1c100s" />
<configuration PROFILE_NAME="samg55_xplained" ENABLED="true" GENERATION_OPTIONS="-DBOARD=samg55_xplained" />
</configurations>
</component>
</project>

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@ -0,0 +1,149 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// skip if included from IAR assembler
#ifndef __IASMARM__
extern uint32_t SystemCoreClock;
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE (1024)
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*6*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configCHECK_HANDLER_INSTALLATION 0
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configRECORD_STACK_HIGH_ADDRESS 1
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
#define configPRIO_BITS 4
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif

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@ -0,0 +1,8 @@
set(JLINK_DEVICE ATSAMG55J19)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samg55j19_flash.ld)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
__SAMG55J19__
)
endfunction()

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@ -0,0 +1,12 @@
#ifndef BOARD_H
#define BOARD_H
#define LED_PIN GPIO(GPIO_PORTA, 6)
#define BUTTON_PIN GPIO(GPIO_PORTA, 2)
#define BUTTON_STATE_ACTIVE 0
#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
#endif

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@ -0,0 +1,6 @@
CFLAGS += -D__SAMG55J19__
JLINK_DEVICE = ATSAMG55J19
# All source paths should be relative to the top level.
LD_FILE = $(BOARD_PATH)/samg55j19_flash.ld

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@ -32,6 +32,8 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
/* Memory Spaces Definitions */
MEMORY
{
@ -43,7 +45,7 @@ MEMORY
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* The heapsize used by the application. NOTE: you need to adjust according to your application. */
HEAP_SIZE = DEFINED(HEAP_SIZE) ? HEAP_SIZE : DEFINED(__heap_size__) ? __heap_size__ : 0x0200;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0200;
/* Section Definitions */
SECTIONS

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@ -24,7 +24,13 @@
*/
#include "sam.h"
#include "bsp/board_api.h"
// Suppress warning caused by mcu driver
#ifdef __GNUC__
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wcast-qual"
#pragma GCC diagnostic ignored "-Wredundant-decls"
#endif
#include "peripheral_clk_config.h"
#include "hal/include/hal_init.h"
@ -32,54 +38,53 @@
#include "hpl/pmc/hpl_pmc.h"
#include "hal/include/hal_gpio.h"
#ifdef __GNUC__
#pragma GCC diagnostic pop
#endif
#include "bsp/board_api.h"
#include "board.h"
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
#define LED_PIN GPIO(GPIO_PORTA, 6)
#define BUTTON_PIN GPIO(GPIO_PORTA, 2)
#define BUTTON_STATE_ACTIVE 0
#define UART_TX_PIN GPIO(GPIO_PORTA, 28)
#define UART_RX_PIN GPIO(GPIO_PORTA, 27)
struct _usart_sync_device edbg_com;
//------------- IMPLEMENTATION -------------//
void board_init(void)
{
init_mcu();
void board_init(void) {
init_mcu();
_pmc_enable_periph_clock(ID_PIOA);
_pmc_enable_periph_clock(ID_PIOA);
/* Disable Watchdog */
hri_wdt_set_MR_WDDIS_bit(WDT);
/* Disable Watchdog */
hri_wdt_set_MR_WDDIS_bit(WDT);
// LED
gpio_set_pin_level(LED_PIN, false);
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
// LED
gpio_set_pin_level(LED_PIN, false);
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
// Button
gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
// Button
gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
// Uart via EDBG Com
_pmc_enable_periph_clock(ID_FLEXCOM7);
gpio_set_pin_function(UART_RX_PIN, MUX_PA27B_FLEXCOM7_RXD);
gpio_set_pin_function(UART_TX_PIN, MUX_PA28B_FLEXCOM7_TXD);
// Uart via EDBG Com
_pmc_enable_periph_clock(ID_FLEXCOM7);
gpio_set_pin_function(UART_RX_PIN, MUX_PA27B_FLEXCOM7_RXD);
gpio_set_pin_function(UART_TX_PIN, MUX_PA28B_FLEXCOM7_TXD);
_usart_sync_init(&edbg_com, FLEXCOM7);
_usart_sync_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
_usart_sync_set_mode(&edbg_com, USART_MODE_ASYNCHRONOUS);
_usart_sync_enable(&edbg_com);
_usart_sync_init(&edbg_com, FLEXCOM7);
_usart_sync_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
_usart_sync_set_mode(&edbg_com, USART_MODE_ASYNCHRONOUS);
_usart_sync_enable(&edbg_com);
#if CFG_TUSB_OS == OPT_OS_NONE
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer (samd SystemCoreClock may not correct)
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
NVIC_SetPriority(UDP_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
// USB Pin, Clock init
@ -90,17 +95,16 @@ void board_init(void)
// Enable clock
_pmc_enable_periph_clock(ID_UDP);
/* USB Device mode & Transceiver active */
hri_matrix_write_CCFG_USBMR_reg(MATRIX, CCFG_USBMR_USBMODE);
/* USB Device mode & Transceiver active */
hri_matrix_write_CCFG_USBMR_reg(MATRIX, CCFG_USBMR_USBMODE);
}
//--------------------------------------------------------------------+
// USB Interrupt Handler
//--------------------------------------------------------------------+
void UDP_Handler(void)
{
void UDP_Handler(void) {
#if CFG_TUD_ENABLED
tud_int_handler(0);
tud_int_handler(0);
#endif
}
@ -108,50 +112,44 @@ void UDP_Handler(void)
// Board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
{
void board_led_write(bool state) {
gpio_set_pin_level(LED_PIN, state);
}
uint32_t board_button_read(void)
{
uint32_t board_button_read(void) {
return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
int board_uart_read(uint8_t* buf, int len) {
(void) buf;
(void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
uint8_t const * buf8 = (uint8_t const *) buf;
for(int i=0; i<len; i++)
{
while ( !_usart_sync_is_ready_to_send(&edbg_com) ) {}
int board_uart_write(void const* buf, int len) {
uint8_t const* buf8 = (uint8_t const*) buf;
for (int i = 0; i < len; i++) {
while (!_usart_sync_is_ready_to_send(&edbg_com)) {}
_usart_sync_write_byte(&edbg_com, buf8[i]);
}
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void)
{
uint32_t board_millis(void) {
return system_ticks;
}
#endif
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void)
{
void _init(void) {
}

114
hw/bsp/samg/family.cmake Normal file
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@ -0,0 +1,114 @@
include_guard()
set(SAM_FAMILY samg55)
set(SDK_DIR ${TOP}/hw/mcu/microchip/samg55)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS SAMG CACHE INTERNAL "")
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
#------------------------------------
# BOARD_TARGET
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
if (TARGET ${BOARD_TARGET})
return()
endif ()
set(LD_FILE_Clang ${LD_FILE_GNU})
if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
endif ()
set(STARTUP_FILE_GNU ${SDK_DIR}/${SAM_FAMILY}/gcc/gcc/startup_${SAM_FAMILY}.c)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
add_library(${BOARD_TARGET} STATIC
${SDK_DIR}/${SAM_FAMILY}/gcc/system_${SAM_FAMILY}.c
${SDK_DIR}/hal/src/hal_atomic.c
${SDK_DIR}/hpl/core/hpl_init.c
${SDK_DIR}/hpl/usart/hpl_usart.c
${SDK_DIR}/hpl/pmc/hpl_pmc.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${SDK_DIR}
${SDK_DIR}/config
${SDK_DIR}/samg55/include
${SDK_DIR}/hal/include
${SDK_DIR}/hal/utils/include
${SDK_DIR}/hpl/core
${SDK_DIR}/hpl/pio
${SDK_DIR}/hpl/pmc
${SDK_DIR}/hri
${SDK_DIR}/CMSIS/Core/Include
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
)
update_board(${BOARD_TARGET})
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${BOARD_TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
# Board target
add_board_target(board_${BOARD})
#---------- Port Specific ----------
# These files are built for each example since it depends on example's tusb_config.h
target_sources(${TARGET} PUBLIC
# BSP
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
)
target_include_directories(${TARGET} PUBLIC
# family, hw, board
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
# Add TinyUSB target and port source
family_add_tinyusb(${TARGET} OPT_MCU_SAMG ${RTOS})
target_sources(${TARGET}-tinyusb PUBLIC
${TOP}/src/portable/microchip/samg/dcd_samg.c
)
target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
# Link dependencies
target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
#family_flash_openocd(${TARGET} ${OPENOCD_OPTION})
endfunction()

45
hw/bsp/samg/family.mk Normal file
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@ -0,0 +1,45 @@
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
SDK_DIR = hw/mcu/microchip/samg55
CFLAGS += \
-flto \
-DCFG_TUSB_MCU=OPT_MCU_SAMG
# suppress following warnings from mcu driver
CFLAGS += -Wno-error=undef -Wno-error=null-dereference -Wno-error=redundant-decls
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs \
SRC_C += \
src/portable/microchip/samg/dcd_samg.c \
${SDK_DIR}/samg55/gcc/gcc/startup_samg55.c \
${SDK_DIR}/samg55/gcc/system_samg55.c \
${SDK_DIR}/hal/src/hal_atomic.c \
${SDK_DIR}/hpl/core/hpl_init.c \
${SDK_DIR}/hpl/usart/hpl_usart.c \
${SDK_DIR}/hpl/pmc/hpl_pmc.c \
INC += \
$(TOP)/$(FAMILY_PATH) \
$(TOP)/$(BOARD_PATH) \
$(TOP)/${SDK_DIR} \
$(TOP)/${SDK_DIR}/config \
$(TOP)/${SDK_DIR}/samg55/include \
$(TOP)/${SDK_DIR}/hal/include \
$(TOP)/${SDK_DIR}/hal/utils/include \
$(TOP)/${SDK_DIR}/hpl/core \
$(TOP)/${SDK_DIR}/hpl/pio \
$(TOP)/${SDK_DIR}/hpl/pmc \
$(TOP)/${SDK_DIR}/hri \
$(TOP)/${SDK_DIR}/CMSIS/Core/Include
# flash using edbg from https://github.com/ataradov/edbg
flash: $(BUILD)/$(PROJECT).bin
edbg --verbose -t samg55 -pv -f $<

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@ -32,13 +32,17 @@
* \def CONF_SLCK_FREQUENCY
* \brief Slow Clock frequency
*/
#ifndef CONF_SLCK_FREQUENCY
#define CONF_SLCK_FREQUENCY 32768
#endif
/**
* \def CONF_MCK_FREQUENCY
* \brief Master Clock frequency
*/
#ifndef CONF_MCK_FREQUENCY
#define CONF_MCK_FREQUENCY 8000000
#endif
// <o> USB Clock Source
// <0=> USB Clock Controller (USB_48M)

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@ -1,56 +0,0 @@
DEPS_SUBMODULES += hw/mcu/microchip
ASF_DIR = hw/mcu/microchip/samg55
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-D__SAMG55J19__ \
-DCFG_TUSB_MCU=OPT_MCU_SAMG
# suppress following warnings from mcu driver
CFLAGS += -Wno-error=undef -Wno-error=null-dereference -Wno-error=redundant-decls
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/samg55j19_flash.ld
SRC_C += \
src/portable/microchip/samg/dcd_samg.c \
$(ASF_DIR)/samg55/gcc/gcc/startup_samg55.c \
$(ASF_DIR)/samg55/gcc/system_samg55.c \
$(ASF_DIR)/hpl/core/hpl_init.c \
$(ASF_DIR)/hpl/usart/hpl_usart.c \
$(ASF_DIR)/hpl/pmc/hpl_pmc.c \
$(ASF_DIR)/hal/src/hal_atomic.c
INC += \
$(TOP)/hw/bsp/$(BOARD) \
$(TOP)/$(ASF_DIR) \
$(TOP)/$(ASF_DIR)/config \
$(TOP)/$(ASF_DIR)/samg55/include \
$(TOP)/$(ASF_DIR)/hal/include \
$(TOP)/$(ASF_DIR)/hal/utils/include \
$(TOP)/$(ASF_DIR)/hpl/core \
$(TOP)/$(ASF_DIR)/hpl/pio \
$(TOP)/$(ASF_DIR)/hpl/pmc \
$(TOP)/$(ASF_DIR)/hri \
$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = ATSAMG55J19
# flash using edbg from https://github.com/ataradov/edbg
flash: $(BUILD)/$(PROJECT).bin
edbg --verbose -t samg55 -pv -f $<