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Update submodule
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parent
4279ad7d6e
commit
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157
cortex-a.py
157
cortex-a.py
@ -1,157 +0,0 @@
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class Armv8AException(gdb.Command):
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def __init__ (self):
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super (Armv8AException, self).__init__ ("armv8a-exception", gdb.COMMAND_USER)
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def print_data_abort(self, frame, iss):
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isv = (iss >> 23) & 0x1
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sas = (iss >> 21) & 0x3
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sse = (iss >> 20) & 0x1
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srt = (iss >> 15) & 0x1f
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sf = (iss >> 14) & 0x1
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ar = (iss >> 13) & 0x1
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vncr = (iss >> 12) & 0x1
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_set = (iss >> 10) & 0x3
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fnv = (iss >> 9) & 0x1
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ea = (iss >> 8) & 0x1
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cm = (iss >> 7) & 0x1
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s1ptw = (iss >> 6) & 0x1
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wnr = (iss >> 5) & 0x1
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dfsc = iss & 0x1f
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if isv:
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# print("isv valid", sas, sse, srt, sf, ar)
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access_sizes = ("Byte", "Halfword", "Word", "Doubleword")
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print("Access size:", access_sizes[sas])
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print("Sign extended:", "Yes" if sse else "No")
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print("Register:", hex(srt), "64-bit" if sf else "32-bit")
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print("Acquire/Release:", "Yes" if ar else "No")
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if dfsc == 0b010000:
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print("Not on translation table walk")
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if not fnv:
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value = int(frame.read_register("FAR_EL2"))
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print("FAR", hex(value))
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elif dfsc == 0b000101:
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print("translation fault level 1")
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elif dfsc == 0b010001:
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print("tag check fault")
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elif dfsc == 0b100001:
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print("alignment fault")
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else:
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print(bin(dfsc))
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print(vncr, _set, fnv, ea, cm, s1ptw, wnr, dfsc)
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def print_instruction_abort(self, frame, iss):
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_set = (iss >> 10) & 0x3
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fnv = (iss >> 9) & 0x1
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ea = (iss >> 8) & 0x1
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s1ptw = (iss >> 6) & 0x1
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ifsc = iss & 0x1f
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if ifsc == 0b010000:
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print("Not on translation table walk")
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if not fnv:
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value = int(frame.read_register("FAR_EL2"))
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print("FAR", hex(value))
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elif ifsc == 0b00101:
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print("translation fault level 1")
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elif ifsc == 0b01001:
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print("access flag fault level 1")
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# elif dfsc == 0b100001:
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# print("alignment fault")
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else:
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print(bin(ifsc))
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def invoke (self, arg, from_tty):
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frame = gdb.selected_frame()
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value = int(frame.read_register("ESR_EL2"))
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if value == 0:
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return None
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iss2 = (value >> 32) & 0x1ff
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ec = (value >> 26) & 0x3ff
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il = (value >> 25) & 0x1
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iss = value & 0xffffff
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if ec == 0b000000:
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print("Unknown fault")
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elif ec == 0b000001:
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print("Trapped WF*")
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elif ec == 0b000011:
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print("Trapped MCR or MRC")
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elif ec == 0b000100:
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print("Trapped MCRR or MRRC")
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elif ec == 0b000101:
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print("Trapped MCR or MRC")
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elif ec == 0b000110:
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print("Trapped LDC or STC")
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elif ec == 0b000111:
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print("Trapped SIMD")
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elif ec == 0b001000:
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print("Trapped VMRS")
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elif ec == 0b001001:
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print("Trapped pointer authentication")
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elif ec == 0b001010:
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print("Trapped LD64B or ST64B*")
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elif ec == 0b001100:
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print("Trapped MRRC")
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elif ec == 0b001101:
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print("Branch target exception")
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elif ec == 0b001110:
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print("Illegal execution state")
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elif ec == 0b010001:
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print("SVC instruction")
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elif ec == 0b010010:
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print("HVC instruction")
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elif ec == 0b010011:
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print("SMC instruction")
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elif ec == 0b010101:
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print("SVC instruction")
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elif ec == 0b010110:
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print("HVC instruction")
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elif ec == 0b010111:
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print("SMC instruction")
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elif ec == 0b011000:
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print("Trapped MRS, MRS or system instruction")
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elif ec == 0b011001:
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print("Trapped SVE")
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elif ec == 0b011010:
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print("Trapped ERET")
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elif ec == 0b011100:
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print("Failed pointer authentication")
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elif ec == 0b100000:
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print("Instruction abort from lower level")
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elif ec == 0b100001:
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print("Instruction abort from same level")
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self.print_instruction_abort(frame, iss)
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elif ec == 0b100010:
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print("PC alignment failure")
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elif ec == 0b100100:
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print("Data abort from lower level")
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elif ec == 0b100101:
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print("Data abort from same level")
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self.print_data_abort(frame, iss)
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elif ec == 0b100110:
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print("SP alignment fault")
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elif ec == 0b101000:
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print("32-bit floating point exception")
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elif ec == 0b101100:
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print("64-bit floating point exception")
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elif ec == 0b101111:
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print("SError interrupt")
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elif ec == 0b110000:
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print("Breakpoint from lower level")
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elif ec == 0b110001:
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print("Breakpoint from same level")
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elif ec == 0b110010:
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print("Software step from lower level")
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elif ec == 0b110011:
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print("Software step from same level")
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elif ec == 0b110100:
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print ("Watch point from same level")
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elif ec == 0b110101:
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print("Watch point from lower level")
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elif ec == 0b111000:
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print("Breakpoint in aarch32 mode")
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elif ec == 0b111010:
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print("Vector catch in aarch32")
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elif ec == 0b111100:
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print("Brk instruction in aarch64")
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print(hex(int(value)), iss2, bin(ec), il, iss)
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Armv8AException()
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@ -1 +1 @@
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Subproject commit e5343acdad77b8cf4a8d09b732a11ecef17d148a
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Subproject commit 7a8f4b7471ad4aad2e808b3a4cc88b4c23b529f2
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@ -31,6 +31,8 @@
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#include "synopsys_common.h"
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#include "broadcom/interrupts.h"
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// Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
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// We disable SOF for now until needed later on
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#define USE_SOF 0
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@ -116,10 +118,10 @@ TU_VERIFY_STATIC(sizeof(USB_OTG_GlobalTypeDef) == 0x140, "size is incorrect");
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// MACRO TYPEDEF CONSTANT ENUM
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//--------------------------------------------------------------------+
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#define RHPORT_REGS_BASE 0xfe980000
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#define RHPORT_REGS_BASE USB_OTG_GLOBAL_BASE
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#define GLOBAL_BASE(_port) ((USB_OTG_GlobalTypeDef*) RHPORT_REGS_BASE)
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#define DEVICE_BASE(_port) (USB_OTG_DeviceTypeDef *) (RHPORT_REGS_BASE + USB_OTG_DEVICE_BASE)
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#define DEVICE_BASE(_port) (USB_OTG_DeviceTypeDef *) (USB_OTG_DEVICE_BASE)
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#define OUT_EP_BASE(_port) (USB_OTG_OUTEndpointTypeDef *) (RHPORT_REGS_BASE + USB_OTG_OUT_ENDPOINT_BASE)
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#define IN_EP_BASE(_port) (USB_OTG_INEndpointTypeDef *) (RHPORT_REGS_BASE + USB_OTG_IN_ENDPOINT_BASE)
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#define FIFO_BASE(_port, _x) ((volatile uint32_t *) (RHPORT_REGS_BASE + USB_OTG_FIFO_BASE + (_x) * USB_OTG_FIFO_SIZE))
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@ -572,13 +574,13 @@ void dcd_init (uint8_t rhport)
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void dcd_int_enable (uint8_t rhport)
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{
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(void) rhport;
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// NVIC_EnableIRQ(RHPORT_IRQn);
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// BP_EnableIRQ(USB_IRQn);
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}
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void dcd_int_disable (uint8_t rhport)
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{
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(void) rhport;
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// NVIC_DisableIRQ(RHPORT_IRQn);
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// BP_DisableIRQ(USB_IRQn);
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}
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void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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@ -169,12 +169,12 @@ typedef struct
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/*!< USB registers base address */
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#define USB_OTG_FS_PERIPH_BASE 0x50000000UL
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#define USB_OTG_GLOBAL_BASE 0x00000000UL
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#define USB_OTG_DEVICE_BASE 0x00000800UL
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// #define USB_OTG_GLOBAL_BASE 0x00000000UL
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// #define USB_OTG_DEVICE_BASE 0x00000800UL
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#define USB_OTG_IN_ENDPOINT_BASE 0x00000900UL
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#define USB_OTG_OUT_ENDPOINT_BASE 0x00000B00UL
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#define USB_OTG_EP_REG_SIZE 0x00000020UL
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#define USB_OTG_HOST_BASE 0x00000400UL
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// #define USB_OTG_HOST_BASE 0x00000400UL
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#define USB_OTG_HOST_PORT_BASE 0x00000440UL
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#define USB_OTG_HOST_CHANNEL_BASE 0x00000500UL
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#define USB_OTG_HOST_CHANNEL_SIZE 0x00000020UL
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