mirror of
https://github.com/hathach/tinyusb.git
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rename dcd_pipe to dcd_edpt
This commit is contained in:
parent
43cf0fb3df
commit
3582d2301d
@ -273,14 +273,14 @@ static inline volatile uint32_t * get_reg_control_addr(uint8_t port, uint8_t phy
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return &(LPC_USB[port]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
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}
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void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
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void tusb_dcd_edpt_stall(edpt_hdl_t edpt_hdl)
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{
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volatile uint32_t * reg_control = get_reg_control_addr(edpt_hdl.port, edpt_hdl.index);
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(*reg_control) |= ENDPTCTRL_MASK_STALL << (edpt_hdl.index & 0x01 ? 16 : 0);
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}
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void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
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void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr)
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{
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volatile uint32_t * reg_control = get_reg_control_addr(port, edpt_addr2phy(edpt_addr));
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@ -289,7 +289,7 @@ void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
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(*reg_control) &= ~(ENDPTCTRL_MASK_STALL << ((edpt_addr & TUSB_DIR_DEV_TO_HOST_MASK) ? 16 : 0));
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}
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bool tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh)
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bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh)
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{
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// TODO USB1 only has 4 non-control enpoint (USB0 has 5)
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// TODO not support ISO yet
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@ -321,7 +321,7 @@ bool tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpo
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return true;
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}
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bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
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bool tusb_dcd_edpt_busy(edpt_hdl_t edpt_hdl)
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{
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dcd_qhd_t const * p_qhd = &dcd_data_ptr[edpt_hdl.port]->qhd[edpt_hdl.index];
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@ -358,12 +358,12 @@ static tusb_error_t pipe_add_xfer(edpt_hdl_t edpt_hdl, void * buffer, uint16_t t
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return TUSB_ERROR_NONE;
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}
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tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
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tusb_error_t tusb_dcd_edpt_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
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{
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return pipe_add_xfer( edpt_hdl, buffer, total_bytes, false);
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}
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tusb_error_t tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete)
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tusb_error_t tusb_dcd_edpt_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete)
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{
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ASSERT_STATUS ( pipe_add_xfer(edpt_hdl, buffer, total_bytes, int_on_complete) );
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@ -157,7 +157,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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if ( TUSB_DESC_TYPE_ENDPOINT == p_desc[DESCRIPTOR_OFFSET_TYPE])
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{ // notification endpoint if any
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VERIFY( tusb_dcd_pipe_open(port, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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VERIFY( tusb_dcd_edpt_open(port, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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(*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
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p_desc = descriptor_next(p_desc);
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@ -180,7 +180,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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edpt_hdl_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
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&p_cdc->edpt_hdl[CDC_PIPE_DATA_IN] : &p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT] ;
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ASSERT_( tusb_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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ASSERT_( tusb_dcd_edpt_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
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(*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
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p_desc = descriptor_next( p_desc );
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@ -190,7 +190,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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p_cdc->interface_number = p_interface_desc->bInterfaceNumber;
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// Prepare for incoming data
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tusb_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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tusb_dcd_edpt_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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return TUSB_ERROR_NONE;
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@ -264,7 +264,7 @@ tusb_error_t cdcd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xfer
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fifo_write_n(&_rx_ff, _tmp_rx_buf, xferred_bytes);
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// preparing for next
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tusb_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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tusb_dcd_edpt_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
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// fire callback
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tud_cdc_rx_cb(edpt_hdl.port);
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@ -279,11 +279,11 @@ void cdcd_sof(uint8_t port)
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edpt_hdl_t ep = cdcd_data[port].edpt_hdl[CDC_PIPE_DATA_IN];
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if ( !dcd_pipe_is_busy( ep ) )
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if ( !tusb_dcd_edpt_busy( ep ) )
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{
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uint16_t count = fifo_read_n(&_tx_ff, _tmp_tx_buf, sizeof(_tmp_tx_buf));
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tusb_dcd_pipe_xfer(ep, _tmp_tx_buf, count, false);
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tusb_dcd_edpt_xfer(ep, _tmp_tx_buf, count, false);
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}
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}
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@ -109,7 +109,7 @@ STATIC_VAR hidd_interface_t keyboardd_data;
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bool tud_hid_keyboard_busy(uint8_t port)
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{
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return dcd_pipe_is_busy(keyboardd_data.ept_handle);
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return tusb_dcd_edpt_busy(keyboardd_data.ept_handle);
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}
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tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_report)
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@ -118,7 +118,7 @@ tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_
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hidd_interface_t * p_kbd = &keyboardd_data; // TODO &keyboardd_data[port];
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ASSERT_STATUS( tusb_dcd_pipe_xfer(p_kbd->ept_handle, (void*) p_report, sizeof(hid_keyboard_report_t), true) ) ;
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ASSERT_STATUS( tusb_dcd_edpt_xfer(p_kbd->ept_handle, (void*) p_report, sizeof(hid_keyboard_report_t), true) ) ;
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return TUSB_ERROR_NONE;
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}
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@ -132,7 +132,7 @@ STATIC_VAR hidd_interface_t moused_data;
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bool tusbd_hid_mouse_is_busy(uint8_t port)
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{
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return dcd_pipe_is_busy(moused_data.ept_handle);
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return tusb_dcd_edpt_busy(moused_data.ept_handle);
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}
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tusb_error_t tusbd_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_report)
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@ -141,7 +141,7 @@ tusb_error_t tusbd_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_repo
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hidd_interface_t * p_mouse = &moused_data; // TODO &keyboardd_data[port];
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ASSERT_STATUS( tusb_dcd_pipe_xfer(p_mouse->ept_handle, (void*) p_report, sizeof(hid_mouse_report_t), true) ) ;
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ASSERT_STATUS( tusb_dcd_edpt_xfer(p_mouse->ept_handle, (void*) p_report, sizeof(hid_mouse_report_t), true) ) ;
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return TUSB_ERROR_NONE;
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}
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@ -280,7 +280,7 @@ tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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VERIFY(p_hid, TUSB_ERROR_FAILED);
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VERIFY( tusb_dcd_pipe_open(port, p_desc_endpoint, &p_hid->ept_handle), TUSB_ERROR_DCD_FAILED );
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VERIFY( tusb_dcd_edpt_open(port, p_desc_endpoint, &p_hid->ept_handle), TUSB_ERROR_DCD_FAILED );
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p_hid->interface_number = p_interface_desc->bInterfaceNumber;
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p_hid->p_report_desc = (p_interface_desc->bInterfaceProtocol == HID_PROTOCOL_KEYBOARD) ? tusbd_descriptor_pointers.p_hid_keyboard_report : tusbd_descriptor_pointers.p_hid_mouse_report;
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@ -101,7 +101,7 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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edpt_hdl_t * p_edpt_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_DEV_TO_HOST_MASK ) ?
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&p_msc->edpt_in : &p_msc->edpt_out;
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VERIFY( tusb_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
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VERIFY( tusb_dcd_edpt_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
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p_endpoint = (tusb_descriptor_endpoint_t const *) descriptor_next( (uint8_t const*) p_endpoint );
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}
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@ -110,7 +110,7 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
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(*p_length) += sizeof(tusb_descriptor_interface_t) + 2*sizeof(tusb_descriptor_endpoint_t);
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//------------- Queue Endpoint OUT for Command Block Wrapper -------------//
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ASSERT_STATUS( tusb_dcd_pipe_xfer(p_msc->edpt_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cmd_block_wrapper_t), true) );
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ASSERT_STATUS( tusb_dcd_edpt_xfer(p_msc->edpt_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cmd_block_wrapper_t), true) );
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return TUSB_ERROR_NONE;
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}
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@ -186,12 +186,12 @@ tusb_error_t mscd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xfer
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if ( p_buffer == NULL || actual_length == 0 )
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{ // application does not provide data to response --> possibly unsupported SCSI command
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tusb_dcd_pipe_stall(edpt_data);
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tusb_dcd_edpt_stall(edpt_data);
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p_csw->status = MSC_CSW_STATUS_FAILED;
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}else
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{
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memcpy(p_msc->scsi_data, p_buffer, actual_length);
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ASSERT_STATUS( tusb_dcd_pipe_queue_xfer( edpt_data, p_msc->scsi_data, actual_length ) );
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ASSERT_STATUS( tusb_dcd_edpt_queue_xfer( edpt_data, p_msc->scsi_data, actual_length ) );
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}
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}
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}
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@ -207,10 +207,10 @@ tusb_error_t mscd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xfer
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// Either bulk in & out can be stalled in the data phase, dcd must make sure these queued transfer will be resumed after host clear stall
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if (!is_waiting_read10_write10)
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{
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ASSERT_STATUS( tusb_dcd_pipe_xfer( p_msc->edpt_in , (uint8_t*) p_csw, sizeof(msc_cmd_status_wrapper_t), false) );
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ASSERT_STATUS( tusb_dcd_edpt_xfer( p_msc->edpt_in , (uint8_t*) p_csw, sizeof(msc_cmd_status_wrapper_t), false) );
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//------------- Queue the next CBW -------------//
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ASSERT_STATUS( tusb_dcd_pipe_xfer( p_msc->edpt_out, (uint8_t*) p_cbw, sizeof(msc_cmd_block_wrapper_t), true) );
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ASSERT_STATUS( tusb_dcd_edpt_xfer( p_msc->edpt_out, (uint8_t*) p_cbw, sizeof(msc_cmd_block_wrapper_t), true) );
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}
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return TUSB_ERROR_NONE;
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@ -241,12 +241,12 @@ static bool read10_write10_data_xfer(mscd_interface_t* p_msc)
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p_csw->data_residue = p_cbw->xfer_bytes;
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p_csw->status = MSC_CSW_STATUS_FAILED;
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tusb_dcd_pipe_stall(edpt_hdl);
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tusb_dcd_edpt_stall(edpt_hdl);
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return true;
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} else if (xferred_block < block_count)
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{
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ASSERT_STATUS( tusb_dcd_pipe_xfer( edpt_hdl, p_buffer, xferred_byte, true) );
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ASSERT_STATUS( tusb_dcd_edpt_xfer( edpt_hdl, p_buffer, xferred_byte, true) );
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// adjust lba, block_count, xfer_bytes for the next call
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p_readwrite->lba = __n2be(lba+xferred_block);
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@ -257,7 +257,7 @@ static bool read10_write10_data_xfer(mscd_interface_t* p_msc)
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}else
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{
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p_csw->status = MSC_CSW_STATUS_PASSED;
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ASSERT_STATUS( tusb_dcd_pipe_queue_xfer( edpt_hdl, p_buffer, xferred_byte) );
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ASSERT_STATUS( tusb_dcd_edpt_queue_xfer( edpt_hdl, p_buffer, xferred_byte) );
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return true;
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}
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}
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@ -412,7 +412,7 @@ bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffe
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//--------------------------------------------------------------------+
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// BULK/INTERRUPT/ISO PIPE API
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//--------------------------------------------------------------------+
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edpt_hdl_t tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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edpt_hdl_t tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
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{
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(void) port;
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@ -448,17 +448,17 @@ edpt_hdl_t tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p
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};
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}
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bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
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bool tusb_dcd_edpt_busy(edpt_hdl_t edpt_hdl)
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{
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return (dcd_data.udca[edpt_hdl.index] != NULL && !dcd_data.udca[edpt_hdl.index]->is_retired);
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}
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void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
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void tusb_dcd_edpt_stall(edpt_hdl_t edpt_hdl)
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{
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sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+edpt_hdl.index, 1, SIE_SET_ENDPOINT_STALLED_MASK);
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}
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void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
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void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr)
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{
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uint8_t ep_id = edpt_addr2phy(edpt_addr);
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@ -476,7 +476,7 @@ void dd_xfer_init(dcd_dma_descriptor_t* p_dd, void* buffer, uint16_t total_bytes
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p_dd->present_count = 0;
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}
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tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
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tusb_error_t tusb_dcd_edpt_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
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{ // NOTE for sure the qhd has no dds
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dcd_dma_descriptor_t* const p_fixed_dd = &dcd_data.dd[edpt_hdl.index][0]; // always queue with the fixed DD
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@ -487,7 +487,7 @@ tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uin
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return TUSB_ERROR_NONE;
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}
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tusb_error_t tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
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tusb_error_t tusb_dcd_edpt_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
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{
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dcd_dma_descriptor_t* const p_first_dd = &dcd_data.dd[edpt_hdl.index][0];
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@ -108,7 +108,7 @@ typedef struct ATTR_PACKED
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STATIC_ASSERT( sizeof(dcd_11u_13u_qhd_t) == 4, "size is not correct" );
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// NOTE data will be transferred as soon as dcd get request by dcd_pipe(_queue)_xfer using double buffering.
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// If there is another tusb_dcd_pipe_xfer request, the new request will be saved and executed when the first is done.
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// If there is another tusb_dcd_edpt_xfer request, the new request will be saved and executed when the first is done.
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// next_td stored the 2nd request information
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// current_td is used to keep track of number of remaining & xferred bytes of the current request.
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// queued_bytes_in_buff keep track of number of bytes queued to each buffer (in case of short packet)
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@ -428,7 +428,7 @@ static inline uint8_t edpt_phy2log(uint8_t physical_endpoint)
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//--------------------------------------------------------------------+
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// BULK/INTERRUPT/ISOCHRONOUS PIPE API
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//--------------------------------------------------------------------+
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void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
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void tusb_dcd_edpt_stall(edpt_hdl_t edpt_hdl)
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{
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dcd_data.qhd[edpt_hdl.index][0].stall = dcd_data.qhd[edpt_hdl.index][1].stall = 1;
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}
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@ -438,7 +438,7 @@ bool dcd_pipe_is_stalled(edpt_hdl_t edpt_hdl)
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return dcd_data.qhd[edpt_hdl.index][0].stall || dcd_data.qhd[edpt_hdl.index][1].stall;
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}
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void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
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void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr)
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{
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uint8_t ep_id = edpt_addr2phy(edpt_addr);
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// uint8_t active_buffer = BIT_TEST_(LPC_USB->EPINUSE, ep_id) ? 1 : 0;
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@ -456,7 +456,7 @@ void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
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}
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}
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edpt_hdl_t tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
edpt_hdl_t tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
|
||||
{
|
||||
(void) port;
|
||||
edpt_hdl_t const null_handle = { 0 };
|
||||
@ -489,7 +489,7 @@ edpt_hdl_t tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p
|
||||
};
|
||||
}
|
||||
|
||||
bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
|
||||
bool tusb_dcd_edpt_busy(edpt_hdl_t edpt_hdl)
|
||||
{
|
||||
return dcd_data.qhd[edpt_hdl.index][0].active || dcd_data.qhd[edpt_hdl.index][1].active;
|
||||
}
|
||||
@ -535,9 +535,9 @@ static void queue_xfer_in_next_td(uint8_t ep_id)
|
||||
dcd_data.next_td[ep_id].total_bytes = 0; // clear this field as it is used to indicate whehther next TD available
|
||||
}
|
||||
|
||||
tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
tusb_error_t tusb_dcd_edpt_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
|
||||
{
|
||||
ASSERT( !dcd_pipe_is_busy(edpt_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); // endpoint must not in transferring
|
||||
ASSERT( !tusb_dcd_edpt_busy(edpt_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); // endpoint must not in transferring
|
||||
|
||||
dcd_data.current_ioc = BIT_CLR_(dcd_data.current_ioc, edpt_hdl.index);
|
||||
|
||||
@ -546,9 +546,9 @@ tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uin
|
||||
return TUSB_ERROR_NONE;
|
||||
}
|
||||
|
||||
tusb_error_t tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
tusb_error_t tusb_dcd_edpt_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
|
||||
{
|
||||
if( dcd_pipe_is_busy(edpt_hdl) || dcd_pipe_is_stalled(edpt_hdl) )
|
||||
if( tusb_dcd_edpt_busy(edpt_hdl) || dcd_pipe_is_stalled(edpt_hdl) )
|
||||
{ // save this transfer data to next td if pipe is busy or already been stalled
|
||||
dcd_data.next_td[edpt_hdl.index].buff_addr_offset = addr_offset(buffer);
|
||||
dcd_data.next_td[edpt_hdl.index].total_bytes = total_bytes;
|
||||
|
@ -335,7 +335,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
|
||||
TUSB_REQUEST_TYPE_STANDARD == p_request->bmRequestType_bit.type &&
|
||||
TUSB_REQUEST_CLEAR_FEATURE == p_request->bRequest )
|
||||
{
|
||||
tusb_dcd_pipe_clear_stall(port, u16_low_u8(p_request->wIndex) );
|
||||
tusb_dcd_edpt_clear_stall(port, u16_low_u8(p_request->wIndex) );
|
||||
} else
|
||||
{
|
||||
error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
|
||||
|
@ -83,21 +83,22 @@ void tusb_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event);
|
||||
void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request);
|
||||
void tusb_dcd_xfer_complete(edpt_hdl_t edpt_hdl, uint32_t xferred_bytes, bool succeeded);
|
||||
|
||||
//------------- PIPE API -------------//
|
||||
/*------------------------------------------------------------------*/
|
||||
/* API
|
||||
*------------------------------------------------------------------*/
|
||||
//------------- Control Endpoint -------------//
|
||||
bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
|
||||
void tusb_dcd_control_stall(uint8_t port);
|
||||
|
||||
bool tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh);
|
||||
bool tusb_dcd_edpt_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh);
|
||||
tusb_error_t tusb_dcd_edpt_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
|
||||
tusb_error_t tusb_dcd_edpt_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
|
||||
|
||||
|
||||
tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
|
||||
tusb_error_t tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
|
||||
|
||||
bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl);
|
||||
bool tusb_dcd_edpt_busy(edpt_hdl_t edpt_hdl);
|
||||
|
||||
// TODO port + endpoint address are part of endpoint handle, not endpoint handle, data toggle also need to be reset
|
||||
void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl);
|
||||
void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr);
|
||||
void tusb_dcd_edpt_stall(edpt_hdl_t edpt_hdl);
|
||||
void tusb_dcd_edpt_clear_stall(uint8_t port, uint8_t edpt_addr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user