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rename lpc11_13_15 to simply lpc_usbd since it is almost used by in recent year for nxp mcu

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hathach 2019-09-01 00:51:58 +07:00
parent 0ab8829e55
commit 30f707cad2
4 changed files with 23 additions and 8 deletions
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2
hw/bsp/lpcxpresso11u68/board.mk
View File

@ -26,7 +26,7 @@ INC += \
# For TinyUSB port source
VENDOR = nxp
CHIP_FAMILY = lpc11_13_15
CHIP_FAMILY = lpc_usbd
# For freeRTOS port source
FREERTOS_PORT = ARM_CM0

2
hw/bsp/lpcxpresso1347/board.mk
View File

@ -25,7 +25,7 @@ INC += \
# For TinyUSB port source
VENDOR = nxp
CHIP_FAMILY = lpc11_13_15
CHIP_FAMILY = lpc_usbd
# For freeRTOS port source
FREERTOS_PORT = ARM_CM3

2
hw/bsp/lpcxpresso51u68/board.mk
View File

@ -30,7 +30,7 @@ LIBS += $(TOP)/hw/mcu/nxp/lpc_driver/lpc51u6x/devices/LPC51U68/libpower.a
# For TinyUSB port source
VENDOR = nxp
CHIP_FAMILY = lpc11_13_15
CHIP_FAMILY = lpc_usbd
# For freeRTOS port source
FREERTOS_PORT = ARM_CM0

25
src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c → src/portable/nxp/lpc_usbd/dcd_lpc_usbd.c
View File

@ -26,7 +26,19 @@
#include "tusb_option.h"
#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC51UXX)
/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller
* for almost their new MCUs. Currently supported and tested families are
* - LPC11Uxx
* - LPC13xx
* - LPC51Uxx
*
* For similar controller of other families, this file may require some minimal changes to work with.
* Previous MCUs such as LPC17xx, LPC40xx, LPC18xx, LPC43xx have their own driver implementation.
*/
#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
CFG_TUSB_MCU == OPT_MCU_LPC51UXX )
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX
// LPC11Uxx and LPC13xx use lpcopen
@ -53,12 +65,15 @@
#define SRAM_REGION 0x20000000
/* Although device controller are the same. DMA of
* - LPC11u can only transfer up to nbytes = 64
* - LPC13 can transfer nbytes = 1023 (maximum)
* - LPC15 can ???
* - M0/M+ can only transfer up to nbytes = 64
* - M3/M4 can transfer nbytes = 1023 (maximum)
*/
enum {
DMA_NBYTES_MAX = (CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC51UXX) ? 64 : 1023
#ifdef __ARM_ARCH_6M__ // Cortex M0/M0+
DMA_NBYTES_MAX = 64
#else
DMA_NBYTES_MAX = 1023
#endif
};
enum {