From 2e07a09b0d0a5a108b34597ee3624553b1a7e1cb Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 14 May 2019 18:34:57 +0700 Subject: [PATCH] add makefile support for lpcxpresso1347 --- .../cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject | 1 - .../lpcxpresso11u68/board_lpcxpresso11u68.c | 25 +- hw/bsp/lpcxpresso1347/board.mk | 39 ++ hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c | 84 +--- hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c | 473 ++++++++++++++++++ hw/bsp/lpcxpresso1347/lpc1347.ld | 225 +++++++++ tools/build_all.py | 2 +- 7 files changed, 772 insertions(+), 77 deletions(-) create mode 100644 hw/bsp/lpcxpresso1347/board.mk create mode 100644 hw/bsp/lpcxpresso1347/cr_startup_lpc13xx.c create mode 100644 hw/bsp/lpcxpresso1347/lpc1347.ld diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject b/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject index a3a59af71..791944a16 100644 --- a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject @@ -81,7 +81,6 @@ - diff --git a/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c b/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c index 98f259459..1a154215b 100644 --- a/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c +++ b/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c @@ -75,20 +75,18 @@ void board_init(void) // LED Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); - // BUTTON + // Button Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); - // USB - Chip_USB_Init(); // Setup PLL clock, and power + // USB: Setup PLL clock, and power + Chip_USB_Init(); } -/*------------------------------------------------------------------*/ -/* TUSB HAL MILLISECOND - *------------------------------------------------------------------*/ +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ #if CFG_TUSB_OS == OPT_OS_NONE - volatile uint32_t system_ticks = 0; - void SysTick_Handler (void) { system_ticks++; @@ -98,29 +96,20 @@ uint32_t board_millis(void) { return system_ticks; } - #endif -//--------------------------------------------------------------------+ -// LEDS -//--------------------------------------------------------------------+ + void board_led_write(bool state) { Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); } -//--------------------------------------------------------------------+ -// Buttons -//--------------------------------------------------------------------+ uint32_t board_button_read(void) { // active low return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1; } -//--------------------------------------------------------------------+ -// UART -//--------------------------------------------------------------------+ int board_uart_read(uint8_t* buf, int len) { (void) buf; diff --git a/hw/bsp/lpcxpresso1347/board.mk b/hw/bsp/lpcxpresso1347/board.mk new file mode 100644 index 000000000..09e4f4a4a --- /dev/null +++ b/hw/bsp/lpcxpresso1347/board.mk @@ -0,0 +1,39 @@ +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mcpu=cortex-m3 \ + -nostdlib \ + -DCORE_M3 \ + -D__VTOR_PRESENT=0 \ + -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ + -D__USE_LPCOPEN \ + -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ + -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/lpcxpresso1347/lpc1347.ld + +SRC_C += \ + hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/chip_13xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/clock_13xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/gpio_13xx_1.c \ + hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/iocon_13xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/sysctl_13xx.c \ + hw/mcu/nxp/lpcopen/lpc_chip_13xx/src/sysinit_13xx.c + +INC += \ + $(TOP)/hw/mcu/nxp/lpcopen/lpc_chip_13xx/inc + +# For TinyUSB port source +VENDOR = nxp +CHIP_FAMILY = lpc11_13_15 + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM3 + +# For flash-jlink target +JLINK_DEVICE = LPC1347 +JLINK_IF = swd + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c index 0435acf19..f0b4c4226 100644 --- a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c +++ b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c @@ -27,26 +27,25 @@ #include "chip.h" #include "../board.h" -#define LED_PORT 0 -#define LED_PIN 7 +#define LED_PORT 0 +#define LED_PIN 7 -static const struct { - uint8_t port; - uint8_t pin; -} buttons[] = -{ - {1, 22 }, // Joystick up - {1, 20 }, // Joystick down - {1, 23 }, // Joystick left - {1, 21 }, // Joystick right - {1, 19 }, // Joystick press - {0, 1 }, // SW3 -// {1, 4 }, // SW4 (require to remove J28) -}; +// Joytick UP if connected to LPCXpresso Base board +#define BUTTON_PORT 1 +#define BUTTON_PIN 22 -enum { - BOARD_BUTTON_COUNT = sizeof(buttons) / sizeof(buttons[0]) -}; +//static const struct { +// uint8_t port; +// uint8_t pin; +//} buttons[] = +//{ +// {1, 22 }, // Joystick up +// {1, 20 }, // Joystick down +// {1, 23 }, // Joystick left +// {1, 21 }, // Joystick right +// {1, 19 }, // Joystick press +// {0, 1 }, // SW3 +//}; /* System oscillator rate and RTC oscillator rate */ const uint32_t OscRateIn = 12000000; @@ -91,26 +90,21 @@ void board_init(void) Chip_GPIO_Init(LPC_GPIO_PORT); - //------------- LED -------------// + // LED Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LED_PORT, LED_PIN); - //------------- BUTTON -------------// -// for(uint8_t i=0; i MFlash64 + + .text : ALIGN(4) + { + *(.text*) + *(.rodata .rodata.* .constdata .constdata.*) + . = ALIGN(4); + } > MFlash64 + /* + * for exception handling/unwind - some Newlib functions (in common + * with C++ and STDC++) use this. + */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > MFlash64 + + __exidx_start = .; + + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > MFlash64 + __exidx_end = .; + + _etext = .; + + /* DATA section for RamUsb2 */ + + .data_RAM2 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM2 = .) ; + *(.ramfunc.$RAM2) + *(.ramfunc.$RamUsb2) + *(.data.$RAM2*) + *(.data.$RamUsb2*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM2 = .) ; + } > RamUsb2 AT>MFlash64 + /* DATA section for RamPeriph2 */ + + .data_RAM3 : ALIGN(4) + { + FILL(0xff) + PROVIDE(__start_data_RAM3 = .) ; + *(.ramfunc.$RAM3) + *(.ramfunc.$RamPeriph2) + *(.data.$RAM3*) + *(.data.$RamPeriph2*) + . = ALIGN(4) ; + PROVIDE(__end_data_RAM3 = .) ; + } > RamPeriph2 AT>MFlash64 + /* MAIN DATA SECTION */ + .uninit_RESERVED : ALIGN(4) + { + KEEP(*(.bss.$RESERVED*)) + . = ALIGN(4) ; + _end_uninit_RESERVED = .; + } > RamLoc8 + + /* Main DATA section (RamLoc8) */ + .data : ALIGN(4) + { + FILL(0xff) + _data = . ; + *(vtable) + *(.ramfunc*) + *(.data*) + . = ALIGN(4) ; + _edata = . ; + } > RamLoc8 AT>MFlash64 + + /* BSS section for RamUsb2 */ + .bss_RAM2 : ALIGN(4) + { + PROVIDE(__start_bss_RAM2 = .) ; + *(.bss.$RAM2*) + *(.bss.$RamUsb2*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM2 = .) ; + } > RamUsb2 + + /* BSS section for RamPeriph2 */ + .bss_RAM3 : ALIGN(4) + { + PROVIDE(__start_bss_RAM3 = .) ; + *(.bss.$RAM3*) + *(.bss.$RamPeriph2*) + . = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */ + PROVIDE(__end_bss_RAM3 = .) ; + } > RamPeriph2 + + /* MAIN BSS SECTION */ + .bss : ALIGN(4) + { + _bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4) ; + _ebss = .; + PROVIDE(end = .); + } > RamLoc8 + + /* NOINIT section for RamUsb2 */ + .noinit_RAM2 (NOLOAD) : ALIGN(4) + { + *(.noinit.$RAM2*) + *(.noinit.$RamUsb2*) + . = ALIGN(4) ; + } > RamUsb2 + + /* NOINIT section for RamPeriph2 */ + .noinit_RAM3 (NOLOAD) : ALIGN(4) + { + *(.noinit.$RAM3*) + *(.noinit.$RamPeriph2*) + . = ALIGN(4) ; + } > RamPeriph2 + + /* DEFAULT NOINIT SECTION */ + .noinit (NOLOAD): ALIGN(4) + { + _noinit = .; + *(.noinit*) + . = ALIGN(4) ; + _end_noinit = .; + } > RamLoc8 + PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .); + PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_RamLoc8 - 0); + + /* ## Create checksum value (used in startup) ## */ + PROVIDE(__valid_user_code_checksum = 0 - + (_vStackTop + + (ResetISR + 1) + + (NMI_Handler + 1) + + (HardFault_Handler + 1) + + (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */ + + (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */ + + (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */ + ) ); + + /* Provide basic symbols giving location and size of main text + * block, including initial values of RW data sections. Note that + * these will need extending to give a complete picture with + * complex images (e.g multiple Flash banks). + */ + _image_start = LOADADDR(.text); + _image_end = LOADADDR(.data) + SIZEOF(.data); + _image_size = _image_end - _image_start; +} \ No newline at end of file diff --git a/tools/build_all.py b/tools/build_all.py index 53a854486..606ed0a69 100644 --- a/tools/build_all.py +++ b/tools/build_all.py @@ -13,7 +13,7 @@ fail_count = 0 exit_status = 0 all_device_example = ["cdc_msc_hid", "msc_dual_lun", "hid_generic_inout"] -all_boards = ["metro_m0_express", "metro_m4_express", "pca10056", "feather_nrf52840_express", "stm32f407g_disc1", "lpcxpresso11u68"] +all_boards = ["metro_m0_express", "metro_m4_express", "pca10056", "feather_nrf52840_express", "stm32f407g_disc1", "lpcxpresso11u68", "lpcxpresso1347"] def build_example(example, board): subprocess.run("make -C examples/device/{} BOARD={} clean".format(example, board), shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)