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rename CFG_TUSB_CONTROLLER_0_MODE to CFG_TUSB_RHPORT0_MODE

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This commit is contained in:
hathach 2018-04-14 14:08:48 +07:00
parent 92b306d9bc
commit 29071c10b1
13 changed files with 41 additions and 41 deletions
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2
doxygen/configuration.txt
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@ -7,7 +7,7 @@
/// \brief tell the stack which mode (host/device/otg) the usb controller0 will be operated on. Possible value is
/// from \ref group_mode. Note the hardware usb controller must support the selected mode.
#define CFG_TUSB_CONTROLLER_0_MODE
#define CFG_TUSB_RHPORT0_MODE
/** USB controller in MCU often has limited access to specific RAM section. The Stack will use this macro to place internal variables
into the USB RAM section as follows. if your mcu's usb controller has no such limit, define CFG_TUSB_ATTR_USBRAM as empty macro.

4
examples/device/device_virtual_com/src/tusb_config.h
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@ -48,8 +48,8 @@
//--------------------------------------------------------------------+
//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_DEVICE)
//#define CFG_TUSB_CONTROLLER_1_MODE (OPT_MODE_DEVICE)
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE)
//#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

2
examples/device/nrf52840/src/tusb_config.h
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@ -49,7 +49,7 @@
//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
#define CFG_TUSB_MCU OPT_MCU_NRF5X
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_DEVICE)
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

4
examples/obsolete/device/src/tusb_config.h
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@ -48,8 +48,8 @@
//--------------------------------------------------------------------+
//#define CFG_TUSB_MCU will be passed from IDE/command line for easy board/mcu switching
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_DEVICE)
//#define CFG_TUSB_CONTROLLER_1_MODE (OPT_MODE_DEVICE)
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_DEVICE)
//#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

2
examples/obsolete/host/src/tusb_config.h
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@ -47,7 +47,7 @@
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
//#define CFG_TUSB_MCU will be passed from IDE for easy board/mcu switching
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_HOST)
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST)
//--------------------------------------------------------------------+
// HOST CONFIGURATION

2
hw/bsp/ea4357/board_ea4357.c
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@ -99,7 +99,7 @@ void board_init(void)
// USB0 Power: EA4357 channel B U20 GPIO26 active low (base board), P2_3 on LPC4357
scu_pinmux(0x02, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus Power
#if CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE
scu_pinmux(0x09, 5, GPIO_PDN, FUNC4); // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low.
GPIO_SetDir(5, BIT_(18), 1);
#endif

6
tests/support/tusb_config.h
View File

@ -46,8 +46,8 @@
//--------------------------------------------------------------------+
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
#define CFG_TUSB_CONTROLLER_0_MODE (OPT_MODE_HOST | OPT_MODE_DEVICE)
#define CFG_TUSB_CONTROLLER_1_MODE (OPT_MODE_NONE)
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_DEVICE)
#define CFG_TUSB_RHPORT1_MODE (OPT_MODE_NONE)
//--------------------------------------------------------------------+
// HOST CONFIGURATION
@ -65,7 +65,7 @@
// Test support
#define TEST_CONTROLLER_HOST_START_INDEX \
( ((CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)) ? 1 : 0)
( ((CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)) ? 1 : 0)
//--------------------------------------------------------------------+
// DEVICE CONFIGURATION

4
tinyusb/device/usbd.c
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@ -196,11 +196,11 @@ static tusb_error_t usbd_main_st(void);
tusb_error_t usbd_init (void)
{
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE)
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
dcd_init(0);
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE)
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
dcd_init(1);
#endif

14
tinyusb/host/ehci/ehci.c
View File

@ -61,7 +61,7 @@ CFG_TUSB_ATTR_USBRAM STATIC_VAR ehci_data_t ehci_data;
#if EHCI_PERIODIC_LIST
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE];
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma
@ -69,7 +69,7 @@ CFG_TUSB_ATTR_USBRAM STATIC_VAR ehci_data_t ehci_data;
#endif
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(4096) STATIC_VAR ehci_link_t period_frame_list1[EHCI_FRAMELIST_SIZE];
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with datalignment pragma
@ -133,11 +133,11 @@ tusb_error_t hcd_init(void)
//------------- Data Structure init -------------//
memclr_(&ehci_data, sizeof(ehci_data_t));
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
TU_ASSERT_ERR (hcd_controller_init(0));
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
TU_ASSERT_ERR (hcd_controller_init(1));
#endif
@ -794,12 +794,12 @@ static inline ehci_link_t* get_period_frame_list(uint8_t hostid)
{
switch(hostid)
{
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST)
case 0:
return period_frame_list0;
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
case 1:
return period_frame_list1;
#endif
@ -811,7 +811,7 @@ static inline ehci_link_t* get_period_frame_list(uint8_t hostid)
static inline uint8_t hostid_to_data_idx(uint8_t hostid)
{
#if (CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
#if (CONTROLLER_HOST_NUMBER == 1) && (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST)
(void) hostid;
return 0;
#else

4
tinyusb/portable/nxp/lpc43xx_lpc18xx/dcd_lpc43xx.c
View File

@ -70,11 +70,11 @@ typedef struct {
extern ATTR_WEAK dcd_data_t dcd_data0;
extern ATTR_WEAK dcd_data_t dcd_data1;
#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE)
#if (CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data0;
#endif
#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE)
#if (CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE)
CFG_TUSB_ATTR_USBRAM ATTR_ALIGNED(2048) STATIC_VAR dcd_data_t dcd_data1;
#endif

14
tinyusb/portable/nxp/lpc43xx_lpc18xx/hal_lpc43xx.c
View File

@ -84,7 +84,7 @@ bool tusb_hal_init(void)
LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
//------------- USB0 -------------//
#if CFG_TUSB_CONTROLLER_0_MODE
#if CFG_TUSB_RHPORT0_MODE
CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE); /* Disable PLL first */
VERIFY( CGU_ERROR_SUCCESS == CGU_SetPLL0()); /* the usb core require output clock = 480MHz */
CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0);
@ -93,7 +93,7 @@ bool tusb_hal_init(void)
// reset controller & set role
hal_controller_reset(0);
#if CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST
#if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST
LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB0->USBMODE_D = LPC43XX_USBMODE_DEVICE;
@ -105,17 +105,17 @@ bool tusb_hal_init(void)
#endif
//------------- USB1 -------------//
#if CFG_TUSB_CONTROLLER_1_MODE
#if CFG_TUSB_RHPORT1_MODE
// Host require to config P2_5, TODO confirm whether device mode require P2_5 or not
scu_pinmux(0x2, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2); // USB1_VBUS monitor presence, must be high for bus reset occur
/* connect CLK_USB1 to 60 MHz clock */
CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
LPC_SCU->SFSUSB = (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
LPC_SCU->SFSUSB = (CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
hal_controller_reset(1);
#if CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST
#if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST
LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
LPC_USB1->USBMODE_D = LPC43XX_USBMODE_DEVICE;
@ -129,7 +129,7 @@ bool tusb_hal_init(void)
void hal_dcd_isr(uint8_t rhport);
#if CFG_TUSB_CONTROLLER_0_MODE
#if CFG_TUSB_RHPORT0_MODE
void USB0_IRQHandler(void)
{
#if MODE_HOST_SUPPORTED
@ -142,7 +142,7 @@ void USB0_IRQHandler(void)
}
#endif
#if CFG_TUSB_CONTROLLER_1_MODE
#if CFG_TUSB_RHPORT1_MODE
void USB1_IRQHandler(void)
{
#if MODE_HOST_SUPPORTED

8
tinyusb/tusb_hal.h
View File

@ -82,11 +82,11 @@ uint32_t tusb_hal_millis(void);
// Enable all ports' interrupt
static inline void tusb_hal_int_enable_all(void)
{
#ifdef CFG_TUSB_CONTROLLER_0_MODE
#ifdef CFG_TUSB_RHPORT0_MODE
tusb_hal_int_enable(0);
#endif
#ifdef CFG_TUSB_CONTROLLER_0_MODE
#ifdef CFG_TUSB_RHPORT0_MODE
tusb_hal_int_enable(1);
#endif
}
@ -94,11 +94,11 @@ static inline void tusb_hal_int_enable_all(void)
// Disable all ports' interrupt
static inline void tusb_hal_int_disable_all(void)
{
#ifdef CFG_TUSB_CONTROLLER_0_MODE
#ifdef CFG_TUSB_RHPORT0_MODE
tusb_hal_int_disable(0);
#endif
#ifdef CFG_TUSB_CONTROLLER_0_MODE
#ifdef CFG_TUSB_RHPORT0_MODE
tusb_hal_int_disable(1);
#endif
}

16
tinyusb/tusb_option.h
View File

@ -88,21 +88,21 @@
#define OPT_MODE_NONE 0x00 ///< Disabled
/** @} */
#ifndef CFG_TUSB_CONTROLLER_0_MODE
#define CFG_TUSB_CONTROLLER_0_MODE OPT_MODE_NONE
#ifndef CFG_TUSB_RHPORT0_MODE
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_NONE
#endif
#ifndef CFG_TUSB_CONTROLLER_1_MODE
#define CFG_TUSB_CONTROLLER_1_MODE OPT_MODE_NONE
#ifndef CFG_TUSB_RHPORT1_MODE
#define CFG_TUSB_RHPORT1_MODE OPT_MODE_NONE
#endif
#define CONTROLLER_HOST_NUMBER (\
((CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST) ? 1 : 0) + \
((CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST) ? 1 : 0))
((CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST) ? 1 : 0) + \
((CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST) ? 1 : 0))
#define CONTROLLER_DEVICE_NUMBER (\
((CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_DEVICE) ? 1 : 0) + \
((CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_DEVICE) ? 1 : 0))
((CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE) ? 1 : 0) + \
((CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE) ? 1 : 0))
#define MODE_HOST_SUPPORTED (CONTROLLER_HOST_NUMBER > 0)
#define MODE_DEVICE_SUPPORTED (CONTROLLER_DEVICE_NUMBER > 0)