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Fix DCD_EVENT_XFER_COMPLETE was signaled, even after EP is closed
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dd7eb36830
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@ -556,6 +556,9 @@ static void process_bus_reset(uint8_t rhport)
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/* When pipe0.buf has not NULL, DATA stage works in progress. */
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_dcd.pipe0.buf = NULL;
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USB0->TXIE = 1; /* Enable only EP0 */
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USB0->RXIE = 0;
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/* Clear FIFO settings */
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for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
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USB0->EPIDX = i;
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@ -660,6 +663,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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regs->TXCSRL = USB_TXCSRL1_CLRDT | USB_TXCSRL1_FLUSH;
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else
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regs->TXCSRL = USB_TXCSRL1_CLRDT;
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USB0->TXIE |= TU_BIT(epn);
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} else {
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regs->RXMAXP = mps;
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regs->RXCSRH = (xfer == TUSB_XFER_ISOCHRONOUS) ? USB_RXCSRH1_ISO : 0;
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@ -667,6 +671,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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regs->RXCSRL = USB_RXCSRL1_CLRDT | USB_RXCSRL1_FLUSH;
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else
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regs->RXCSRL = USB_RXCSRL1_CLRDT;
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USB0->RXIE |= TU_BIT(epn);
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}
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/* Setup FIFO */
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@ -693,6 +698,8 @@ void dcd_edpt_close_all(uint8_t rhport)
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volatile hw_endpoint_t *regs = (volatile hw_endpoint_t *)(uintptr_t)&USB0->TXMAXP1;
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unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
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NVIC_DisableIRQ(USB0_IRQn);
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USB0->TXIE = 1; /* Enable only EP0 */
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USB0->RXIE = 0;
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for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) {
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regs->TXMAXP = 0;
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regs->TXCSRH = 0;
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@ -727,6 +734,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
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unsigned const ie = NVIC_GetEnableIRQ(USB0_IRQn);
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NVIC_DisableIRQ(USB0_IRQn);
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if (dir_in) {
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USB0->TXIE &= ~TU_BIT(epn);
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regs->TXMAXP = 0;
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regs->TXCSRH = 0;
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if (regs->TXCSRL & USB_TXCSRL1_TXRDY)
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@ -738,6 +746,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
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USB0->TXFIFOSZ = 0;
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USB0->TXFIFOADD = 0;
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} else {
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USB0->RXIE &= ~TU_BIT(epn);
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regs->RXMAXP = 0;
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regs->RXCSRH = 0;
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if (regs->RXCSRL & USB_RXCSRL1_RXRDY)
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