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iar L4
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parent
63a6fd3689
commit
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1
.github/workflows/build_iar.yml
vendored
1
.github/workflows/build_iar.yml
vendored
@ -33,6 +33,7 @@ jobs:
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- 'stm32f7'
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- 'stm32g4'
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- 'stm32h7'
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- 'stm32l4'
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steps:
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- name: Clean workspace
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run: |
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@ -1,10 +1,13 @@
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CFLAGS += \
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-DSTM32L412xx \
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l412xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l412xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32l412kb
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@ -1,10 +1,13 @@
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CFLAGS += \
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-DSTM32L476xx \
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l476xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l476xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32l476vg
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@ -1,10 +1,13 @@
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CFLAGS += \
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-DSTM32L4P5xx \
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4p5xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4p5xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32l4p5zg
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@ -2,10 +2,13 @@ CFLAGS += \
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-DHSE_VALUE=8000000 \
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-DSTM32L4R5xx \
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
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# GCC
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GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
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GCC_LD_FILE = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
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SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
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# IAR
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IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4r5xx.s
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IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4r5xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32l4r5zi
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@ -179,7 +179,8 @@ void board_init(void)
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void board_led_write(bool state)
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{
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HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
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GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
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HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
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}
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uint32_t board_button_read(void)
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@ -214,7 +215,7 @@ uint32_t board_millis(void)
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void HardFault_Handler (void)
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{
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asm("bkpt 0x10");
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__asm("BKPT #0\n");
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}
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// Required by __libc_init_array in startup code if we are compiling using
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@ -6,23 +6,36 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
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include $(TOP)/$(BOARD_PATH)/board.mk
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# --------------
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# Compiler Flags
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# --------------
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CFLAGS += \
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-DCFG_TUSB_MCU=OPT_MCU_STM32L4
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# GCC Flags
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GCC_CFLAGS += \
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-flto \
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-mthumb \
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-mabi=aapcs \
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-mcpu=cortex-m4 \
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-mfloat-abi=hard \
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-mfpu=fpv4-sp-d16 \
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-nostdlib -nostartfiles \
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-DCFG_TUSB_MCU=OPT_MCU_STM32L4
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-nostdlib -nostartfiles
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# suppress warning caused by vendor mcu driver
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CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
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GCC_CFLAGS += -Wno-error=maybe-uninitialized -Wno-error=cast-align
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# IAR Flags
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IAR_CFLAGS += --cpu cortex-m4 --fpu VFPv4
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IAR_ASFLAGS += --cpu cortex-m4 --fpu VFPv4
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# -----------------
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# Sources & Include
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# -----------------
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#src/portable/st/synopsys/dcd_synopsys.c
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SRC_C += \
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src/portable/synopsys/dwc2/dcd_dwc2.c \
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src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
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src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
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$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
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$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
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