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cdc device require SOF to operate
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4ddac8bc88
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@ -252,7 +252,7 @@ bool hal_dcd_init(uint8_t coreid)
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lpc_usb->ENDPOINTLISTADDR = (uint32_t) p_dcd->qhd; // Endpoint List Address has to be 2K alignment
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lpc_usb->USBSTS_D = lpc_usb->USBSTS_D;
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lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND /*| INT_MASK_SOF */;
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lpc_usb->USBINTR_D = INT_MASK_USB | INT_MASK_ERROR | INT_MASK_PORT_CHANGE | INT_MASK_RESET | INT_MASK_SUSPEND | INT_MASK_SOF;
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lpc_usb->USBCMD_D &= ~0x00FF0000; // Interrupt Threshold Interval = 0
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lpc_usb->USBCMD_D |= BIT_(0); // connect
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@ -595,7 +595,7 @@ void hal_dcd_isr(uint8_t coreid)
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if (int_status & INT_MASK_SOF)
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{
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// hal_dcd_bus_event(coreid, USBD_BUS_EVENT_SOF);
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hal_dcd_bus_event(coreid, USBD_BUS_EVENT_SOF);
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}
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if (int_status & INT_MASK_NAK) {}
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@ -270,6 +270,8 @@ tusb_error_t cdcd_xfer_cb(endpoint_handle_t edpt_hdl, tusb_event_t event, uint32
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void cdcd_sof(uint8_t coreid)
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{
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if ( !tud_cdc_connected(coreid) ) return;
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endpoint_handle_t ep = cdcd_data[coreid].edpt_hdl[CDC_PIPE_DATA_IN];
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if ( !dcd_pipe_is_busy( ep ) )
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@ -280,16 +282,16 @@ void cdcd_sof(uint8_t coreid)
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}
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}
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uint32_t tud_cdc_available(uint8_t coreid)
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{
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return fifo_count(&_rx_ff);
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}
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bool tud_cdc_connected(uint8_t coreid)
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{
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return cdcd_data[coreid].connected;
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}
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uint32_t tud_cdc_available(uint8_t coreid)
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{
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return fifo_count(&_rx_ff);
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}
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int tud_cdc_read_char(uint8_t coreid)
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{
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uint8_t ch;
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