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clean up dcd 43
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@ -54,10 +54,6 @@
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//--------------------------------------------------------------------+
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// MACRO CONSTANT TYPEDEF
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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typedef struct {
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dcd_qhd_t qhd[DCD_QHD_MAX] ATTR_ALIGNED(64); ///< Must be at 2K alignment
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dcd_qtd_t qtd[DCD_QTD_MAX] ATTR_ALIGNED(32);
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@ -103,7 +99,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
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void dcd_set_config(uint8_t rhport, uint8_t config_num)
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{
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// nothing to do
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}
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/// follows LPC43xx User Manual 23.10.3
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@ -147,7 +143,6 @@ static void bus_reset(uint8_t rhport)
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p_dcd->qhd[0].qtd_overlay.next = p_dcd->qhd[1].qtd_overlay.next = QTD_NEXT_INVALID;
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p_dcd->qhd[0].int_on_setup = 1; // OUT only
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}
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bool dcd_init(uint8_t rhport)
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@ -204,7 +199,6 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
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{
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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uint8_t const ep_idx = 2*epnum + dir;
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if ( epnum == 0)
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{
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@ -212,25 +206,26 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
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LPC_USB[rhport]->ENDPTCTRL[epnum] |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) );
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}else
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{
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LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (ep_idx & 0x01 ? 16 : 0);
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LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (dir ? 16 : 0);
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}
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}
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// TOOD implement later
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bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr)
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{
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return false;
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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return LPC_USB[rhport]->ENDPTCTRL[epnum] & (ENDPTCTRL_MASK_STALL << (dir ? 16 : 0));
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}
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void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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{
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uint8_t const epnum = edpt_number(ep_addr);
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uint8_t const dir = edpt_dir(ep_addr);
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uint8_t const ep_idx = 2*epnum + dir;
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// data toggle also need to be reset
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LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_TOGGLE_RESET << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0);
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LPC_USB[rhport]->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_MASK_STALL << ((ep_addr & TUSB_DIR_IN_MASK) ? 16 : 0));
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LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_TOGGLE_RESET << ( dir ? 16 : 0 );
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LPC_USB[rhport]->ENDPTCTRL[epnum] &= ~(ENDPTCTRL_MASK_STALL << ( dir ? 16 : 0));
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}
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bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
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@ -297,7 +292,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
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return true;
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}
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//--------------------------------------------------------------------+
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// ISR
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//--------------------------------------------------------------------+
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@ -315,19 +309,17 @@ void hal_dcd_isr(uint8_t rhport)
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if (int_status & INT_MASK_RESET)
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{
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bus_reset(rhport);
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dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_BUS_RESET };
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dcd_event_handler(&event, true);
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dcd_event_bus_signal(rhport, DCD_EVENT_BUS_RESET, true);
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}
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if (int_status & INT_MASK_SUSPEND)
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{
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if (lpc_usb->PORTSC1_D & PORTSC_SUSPEND_MASK)
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{ // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
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{
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// Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
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if ((lpc_usb->DEVICEADDR >> 25) & 0x0f)
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{
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dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SUSPENDED };
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dcd_event_handler(&event, true);
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dcd_event_bus_signal(rhport, DCD_EVENT_SUSPENDED, true);
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}
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}
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}
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@ -355,10 +347,7 @@ void hal_dcd_isr(uint8_t rhport)
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// 23.10.10.2 Operational model for setup transfers
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lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge
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dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED };
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event.setup_received = p_dcd->qhd[0].setup_request;
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dcd_event_handler(&event, true);
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dcd_event_setup_received(rhport, (uint8_t*) &p_dcd->qhd[0].setup_request, true);
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}
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if ( edpt_complete )
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@ -383,8 +372,7 @@ void hal_dcd_isr(uint8_t rhport)
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if (int_status & INT_MASK_SOF)
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{
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dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SOF };
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dcd_event_handler(&event, true);
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dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
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}
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if (int_status & INT_MASK_NAK) {}
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