- add cmake to samd11

- build_cmake.py always build with -DCMAKE_BUILD_TYPE=MinSizeRel
2025-03-14 04:18:56 +00:00 · 2024-05-03 12:45:41 +07:00 · 2024-05-03 12:45:41 +07:00 · 1cf68f98b3
commit 1cf68f98b3
parent 43f4317a97
15 changed files with 332 additions and 15 deletions
--- a/.github/workflows/build_cmake.yml
+++ b/.github/workflows/build_cmake.yml
@ -90,7 +90,7 @@ jobs:
        python3 tools/get_deps.py ${{ matrix.family }}

    - name: Build
-      run: python tools/build_cmake.py ${{ matrix.family }} -DCMAKE_BUILD_TYPE=MinSizeRel
+      run: python tools/build_cmake.py ${{ matrix.family }}
      env:
        PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk

@ -191,7 +191,7 @@ jobs:
          python3 tools/get_deps.py ${{ matrix.family }}

      - name: Build
-        run: python tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=clang -DCMAKE_BUILD_TYPE=MinSizeRel
+        run: python tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=clang
        env:
          PICO_SDK_PATH: ${{ github.workspace }}/pico-sdk

@ -239,7 +239,7 @@ jobs:
          python3 tools/get_deps.py ${{ matrix.family }}

      - name: Build
-        run: python tools/build_cmake.py ${{ matrix.family }} -DCMAKE_BUILD_TYPE=MinSizeRel
+        run: python tools/build_cmake.py ${{ matrix.family }}

  # ---------------------------------------
  # Hardware in the loop (HIL)
--- a/.github/workflows/build_iar.yml
+++ b/.github/workflows/build_iar.yml
@ -52,7 +52,7 @@ jobs:
        run: python3 tools/get_deps.py ${{ matrix.family }}

      - name: Build
-        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar -DCMAKE_BUILD_TYPE=MinSizeRel
+        run: python3 tools/build_cmake.py ${{ matrix.family }} -DTOOLCHAIN=iar

      - name: Test on actual hardware (hardware in the loop)
        run: |
--- a/hw/bsp/samd11/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/samd11/FreeRTOSConfig/FreeRTOSConfig.h
@ -0,0 +1,153 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "sam.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
--- a/hw/bsp/samd11/boards/cynthion_d11/board.cmake
+++ b/hw/bsp/samd11/boards/cynthion_d11/board.cmake
@ -0,0 +1,14 @@
+set(JLINK_DEVICE ATSAMD11D14)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/cynthion_d11.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD11D14AM__
+    _BOARD_REVISION_MAJOR_=1
+    _BOARD_REVISION_MINOR_=0
+    )
+
+  target_link_options(${BOARD_TARGET} PUBLIC
+    -Wl,--defsym=BOOTLOADER_SIZE=0x800
+    )
+endfunction()
--- a/hw/bsp/samd11/boards/cynthion_d11/board.mk
+++ b/hw/bsp/samd11/boards/cynthion_d11/board.mk
@ -6,7 +6,7 @@ CFLAGS += -D__SAMD11D14AM__ \
 	-D_BOARD_REVISION_MINOR_=$(BOARD_REVISION_MINOR)

 # All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/samd11d14am_flash.ld
+LD_FILE = $(BOARD_PATH)/cynthion_d11.ld

 # Default bootloader size is now 2K, allow to specify other
 ifeq ($(BOOTLOADER_SIZE), )
--- a/hw/bsp/samd11/boards/cynthion_d11/samd11d14am_flash.ld
+++ b/hw/bsp/samd11/boards/cynthion_d11/samd11d14am_flash.ld
@ -32,6 +32,8 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 SEARCH_DIR(.)

+ENTRY(Reset_Handler)
+
 /* Memory Spaces Definitions */
 MEMORY
 {
--- a/hw/bsp/samd11/boards/samd11_xplained/board.cmake
+++ b/hw/bsp/samd11/boards/samd11_xplained/board.cmake
@ -0,0 +1,8 @@
+set(JLINK_DEVICE ATSAMD11D14)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd11d14am_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD11D14AM__
+    )
+endfunction()
--- a/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld
+++ b/hw/bsp/samd11/boards/samd11_xplained/samd11d14am_flash.ld
@ -32,6 +32,8 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 SEARCH_DIR(.)

+ENTRY(Reset_Handler)
+
 /* Memory Spaces Definitions */
 MEMORY
 {
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@ -25,8 +25,12 @@
 */

 #include "sam.h"
-#include "bsp/board_api.h"
-#include "board.h"
+
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#endif

 #include "hal/include/hal_gpio.h"
 #include "hal/include/hal_init.h"
@ -36,6 +40,14 @@
 #include "hpl_pm_config.h"
 #include "hpl/pm/hpl_pm_base.h"

+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
--- a/hw/bsp/samd11/family.cmake
+++ b/hw/bsp/samd11/family.cmake
@ -0,0 +1,116 @@
+include_guard()
+
+set(MCU_VARIANT samd11)
+set(SDK_DIR ${TOP}/hw/mcu/microchip/${MCU_VARIANT})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS SAMD11 CACHE INTERNAL "")
+set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${MCU_VARIANT}.c)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/gcc/system_${MCU_VARIANT}.c
+    ${SDK_DIR}/hal/src/hal_atomic.c
+    ${SDK_DIR}/hpl/gclk/hpl_gclk.c
+    ${SDK_DIR}/hpl/pm/hpl_pm.c
+    ${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}
+    ${SDK_DIR}/config
+    ${SDK_DIR}/include
+    ${SDK_DIR}/hal/include
+    ${SDK_DIR}/hal/utils/include
+    ${SDK_DIR}/hpl/pm
+    ${SDK_DIR}/hpl/port
+    ${SDK_DIR}/hri
+    ${CMSIS_5}/CMSIS/Core/Include
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CONF_DFLL_OVERWRITE_CALIBRATION=0
+    OSC32K_OVERWRITE_CALIBRATION=0
+    CFG_EXAMPLE_MSC_READONLY
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMD11 ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+  #family_flash_openocd(${TARGET} ${OPENOCD_OPTION})
+endfunction()
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@ -1,5 +1,3 @@
-DEPS_SUBMODULES += hw/mcu/microchip
-
 include $(TOP)/$(BOARD_PATH)/board.mk
 CPU_CORE ?= cortex-m0plus

@ -22,12 +20,12 @@ LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs

 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \
-	hw/mcu/microchip/samd11/gcc/gcc/startup_samd11.c \
 	hw/mcu/microchip/samd11/gcc/system_samd11.c \
+	hw/mcu/microchip/samd11/gcc/gcc/startup_samd11.c \
+	hw/mcu/microchip/samd11/hal/src/hal_atomic.c \
 	hw/mcu/microchip/samd11/hpl/gclk/hpl_gclk.c \
 	hw/mcu/microchip/samd11/hpl/pm/hpl_pm.c \
 	hw/mcu/microchip/samd11/hpl/sysctrl/hpl_sysctrl.c \
-	hw/mcu/microchip/samd11/hal/src/hal_atomic.c

 INC += \
 	$(TOP)/$(BOARD_PATH) \
--- a/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
@ -49,7 +49,11 @@

 /* Cortex M23/M33 port configuration. */
 #define configENABLE_MPU                        0
-#define configENABLE_FPU                        1
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
 #define configENABLE_TRUSTZONE                  0
 #define configMINIMAL_SECURE_STACK_SIZE         (1024)

--- a/hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h
@ -49,7 +49,11 @@

 /* Cortex M23/M33 port configuration. */
 #define configENABLE_MPU                        0
-#define configENABLE_FPU                        1
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
 #define configENABLE_TRUSTZONE                  0
 #define configMINIMAL_SECURE_STACK_SIZE         (1024)

--- a/hw/bsp/stm32wb/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/stm32wb/FreeRTOSConfig/FreeRTOSConfig.h
@ -49,7 +49,11 @@

 /* Cortex M23/M33 port configuration. */
 #define configENABLE_MPU                        0
-#define configENABLE_FPU                        1
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
 #define configENABLE_TRUSTZONE                  0
 #define configMINIMAL_SECURE_STACK_SIZE         (1024)

--- a/tools/build_cmake.py
+++ b/tools/build_cmake.py
@ -36,7 +36,7 @@ def build_family(family, cmake_option):

        # Generate build
        r = subprocess.run(f"cmake examples -B {build_dir} -G \"Ninja\" -DFAMILY={family} -DBOARD"
-                           f"={board} {cmake_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+                           f"={board} -DCMAKE_BUILD_TYPE=MinSizeRel {cmake_option}", shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)

        # Build
        if r.returncode == 0: