mirror of
https://github.com/hathach/tinyusb.git
synced 2025-04-18 11:42:25 +00:00
update FreeRTOSConfig.h
- remove configAssert() - configCHECK_HANDLER_INSTALLATION=0 (to prevent unused-parameter error with configAssert(x)=nil
This commit is contained in:
parent
c314cb2903
commit
1a3f5f7a09
examples
device
cdc_msc_freertos/src/FreeRTOSConfig
hid_composite_freertos/src/FreeRTOSConfig
host/cdc_msc_hid_freertos/src/FreeRTOSConfig
hw/bsp
imxrt/FreeRTOSConfig
kinetis_kl/FreeRTOSConfig
lpc18/FreeRTOSConfig
lpc40/FreeRTOSConfig
lpc43/FreeRTOSConfig
lpc54/FreeRTOSConfig
lpc55/FreeRTOSConfig
mcx/FreeRTOSConfig
nrf/FreeRTOSConfig
ra/FreeRTOSConfig
samd21/FreeRTOSConfig
samd51/FreeRTOSConfig
stm32f0/FreeRTOSConfig
stm32f1/FreeRTOSConfig
stm32f4/FreeRTOSConfig
stm32f7/FreeRTOSConfig
stm32g0/FreeRTOSConfig
stm32g4/FreeRTOSConfig
stm32h5/FreeRTOSConfig
stm32h7/FreeRTOSConfig
stm32l4/FreeRTOSConfig
stm32u5/FreeRTOSConfig
@ -96,6 +96,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -130,23 +131,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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#ifdef __RX__
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#ifdef __RX__
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/* Renesas RX series */
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/* Renesas RX series */
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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@ -96,6 +96,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -130,23 +131,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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#ifdef __RX__
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#ifdef __RX__
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/* Renesas RX series */
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/* Renesas RX series */
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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@ -105,6 +105,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -139,23 +140,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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#ifdef __RX__
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#ifdef __RX__
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/* Renesas RX series */
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/* Renesas RX series */
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
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@ -81,6 +81,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -116,23 +117,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define xPortSysTickHandler SysTick_Handler
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@ -81,6 +81,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -116,23 +117,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define xPortSysTickHandler SysTick_Handler
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@ -81,6 +81,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -116,23 +117,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define xPortSysTickHandler SysTick_Handler
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@ -81,6 +81,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -116,23 +117,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define xPortSysTickHandler SysTick_Handler
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@ -81,6 +81,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -116,23 +117,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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} while(0)
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#else
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#define configASSERT( x )
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#endif
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/* FreeRTOS hooks to NVIC vectors */
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/* FreeRTOS hooks to NVIC vectors */
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#define xPortPendSVHandler PendSV_Handler
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#define xPortPendSVHandler PendSV_Handler
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#define xPortSysTickHandler SysTick_Handler
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#define xPortSysTickHandler SysTick_Handler
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@ -81,6 +81,7 @@
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#define configUSE_TICK_HOOK 0
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#define configUSE_TICK_HOOK 0
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_FOR_STACK_OVERFLOW 2
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#define configCHECK_HANDLER_INSTALLATION 0
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/* Run time and task stats gathering related definitions. */
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/* Run time and task stats gathering related definitions. */
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#define configGENERATE_RUN_TIME_STATS 0
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#define configGENERATE_RUN_TIME_STATS 0
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@ -116,23 +117,6 @@
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xEventGroupSetBitFromISR 0
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#define INCLUDE_xTimerPendFunctionCall 0
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#define INCLUDE_xTimerPendFunctionCall 0
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/* Define to trap errors during development. */
|
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// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
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#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
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#define configASSERT(_exp) \
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do {\
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -96,6 +96,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -131,23 +132,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
@ -81,6 +81,7 @@
|
|||||||
#define configUSE_TICK_HOOK 0
|
#define configUSE_TICK_HOOK 0
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||||
|
#define configCHECK_HANDLER_INSTALLATION 0
|
||||||
|
|
||||||
/* Run time and task stats gathering related definitions. */
|
/* Run time and task stats gathering related definitions. */
|
||||||
#define configGENERATE_RUN_TIME_STATS 0
|
#define configGENERATE_RUN_TIME_STATS 0
|
||||||
@ -116,23 +117,6 @@
|
|||||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||||
#define INCLUDE_xTimerPendFunctionCall 0
|
#define INCLUDE_xTimerPendFunctionCall 0
|
||||||
|
|
||||||
/* Define to trap errors during development. */
|
|
||||||
// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
|
|
||||||
#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
|
|
||||||
#define configASSERT(_exp) \
|
|
||||||
do {\
|
|
||||||
if ( !(_exp) ) { \
|
|
||||||
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
|
|
||||||
if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
|
|
||||||
taskDISABLE_INTERRUPTS(); \
|
|
||||||
__asm("BKPT #0\n"); \
|
|
||||||
}\
|
|
||||||
}\
|
|
||||||
} while(0)
|
|
||||||
#else
|
|
||||||
#define configASSERT( x )
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* FreeRTOS hooks to NVIC vectors */
|
/* FreeRTOS hooks to NVIC vectors */
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
#define xPortPendSVHandler PendSV_Handler
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
#define xPortSysTickHandler SysTick_Handler
|
||||||
|
Loading…
x
Reference in New Issue
Block a user