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https://github.com/hathach/tinyusb.git
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minor ehci rename, move code around
This commit is contained in:
hathach
parent
0da273ea79
commit
14c98dd863
@ -126,53 +126,29 @@ static inline void print_intr(uint32_t intr) {
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//--------------------------------------------------------------------+
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// PROTOTYPE
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//--------------------------------------------------------------------+
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static inline ehci_link_t* get_period_head(uint8_t rhport, uint32_t interval_ms)
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{
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(void) rhport;
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return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min32(FRAMELIST_SIZE, interval_ms) ) ];
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}
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static inline ehci_qhd_t* qhd_control(uint8_t dev_addr)
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{
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return &ehci_data.control[dev_addr].qhd;
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}
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// weak dcache for non-cacheable MCU
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TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
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TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
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TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) { (void) addr; (void) data_size; }
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static inline ehci_qhd_t* qhd_async_head(uint8_t rhport)
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{
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(void) rhport;
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// control qhd of dev0 is used as async head
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return qhd_control(0);
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}
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TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms);
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport);
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static inline ehci_qtd_t* qtd_control(uint8_t dev_addr)
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{
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return &ehci_data.control[dev_addr].qtd;
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}
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static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
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static inline ehci_qhd_t* qhd_find_free (void);
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static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_control(uint8_t dev_addr);
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd);
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_find_free (void);
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static ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr);
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static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
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static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd);
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static inline ehci_qtd_t* qtd_find_free (void);
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TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_control(uint8_t dev_addr);
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TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_find_free (void);
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static void qtd_init (ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes);
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static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type);
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static inline ehci_link_t* list_next (ehci_link_t const *p_link);
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TU_ATTR_WEAK void hcd_dcache_clean(void const* addr, uint32_t data_size) {
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(void) addr; (void) data_size;
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}
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TU_ATTR_WEAK void hcd_dcache_invalidate(void const* addr, uint32_t data_size) {
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(void) addr; (void) data_size;
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}
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TU_ATTR_WEAK void hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
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(void) addr; (void) data_size;
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}
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static void list_remove_qhd_by_daddr(ehci_link_t* list_head, uint8_t dev_addr);
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//--------------------------------------------------------------------+
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// HCD API
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@ -274,7 +250,7 @@ void hcd_device_close(uint8_t rhport, uint8_t daddr)
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}
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// Remove from async list
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list_remove_qhd_by_daddr((ehci_link_t *) qhd_async_head(rhport), daddr);
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list_remove_qhd_by_daddr((ehci_link_t *) list_get_async_head(rhport), daddr);
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// Remove from all interval period list
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for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++) {
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@ -286,37 +262,42 @@ void hcd_device_close(uint8_t rhport, uint8_t daddr)
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}
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static void init_periodic_list(uint8_t rhport) {
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(void) rhport;
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// Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only
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for ( uint32_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++ ) {
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ehci_data.period_head_arr[i].int_smask = 1; // queue head in period list must have smask non-zero
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ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive
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}
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ehci_link_t * const framelist = ehci_data.period_framelist;
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ehci_link_t * const period_1ms = get_period_head(rhport, 1u);
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// TODO EHCI_FRAMELIST_SIZE with other size than 8
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// all links --> period_head_arr[0] (1ms)
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// 0, 2, 4, 6 etc --> period_head_arr[1] (2ms)
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// 1, 5 --> period_head_arr[2] (4ms)
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// 3 --> period_head_arr[3] (8ms)
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// TODO EHCI_FRAMELIST_SIZE with other size than 8
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ehci_link_t * const framelist = ehci_data.period_framelist;
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ehci_link_t * const head_1ms = (ehci_link_t *) &ehci_data.period_head_arr[0];
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ehci_link_t * const head_2ms = (ehci_link_t *) &ehci_data.period_head_arr[1];
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ehci_link_t * const head_4ms = (ehci_link_t *) &ehci_data.period_head_arr[2];
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ehci_link_t * const head_8ms = (ehci_link_t *) &ehci_data.period_head_arr[3];
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for (uint32_t i = 0; i < FRAMELIST_SIZE; i++) {
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framelist[i].address = (uint32_t) period_1ms;
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framelist[i].address = (uint32_t) head_1ms;
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framelist[i].type = EHCI_QTYPE_QHD;
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}
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for (uint32_t i = 0; i < FRAMELIST_SIZE; i += 2) {
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list_insert(framelist + i, get_period_head(rhport, 2u), EHCI_QTYPE_QHD);
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list_insert(framelist + i, head_2ms, EHCI_QTYPE_QHD);
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}
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for (uint32_t i = 1; i < FRAMELIST_SIZE; i += 4) {
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list_insert(framelist + i, get_period_head(rhport, 4u), EHCI_QTYPE_QHD);
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list_insert(framelist + i, head_4ms, EHCI_QTYPE_QHD);
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}
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list_insert(framelist + 3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
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list_insert(framelist + 3, head_8ms, EHCI_QTYPE_QHD);
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period_1ms->terminate = 1;
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head_1ms->terminate = 1;
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}
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bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
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@ -345,7 +326,7 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
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EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER;
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//------------- Asynchronous List -------------//
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ehci_qhd_t * const async_head = qhd_async_head(rhport);
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ehci_qhd_t * const async_head = list_get_async_head(rhport);
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tu_memclr(async_head, sizeof(ehci_qhd_t));
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async_head->next.address = (uint32_t) async_head; // circular list, next is itself
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@ -426,11 +407,11 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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{
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case TUSB_XFER_CONTROL:
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case TUSB_XFER_BULK:
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list_head = (ehci_link_t*) qhd_async_head(rhport);
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list_head = (ehci_link_t*) list_get_async_head(rhport);
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break;
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case TUSB_XFER_INTERRUPT:
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list_head = get_period_head(rhport, p_qhd->interval_ms);
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list_head = list_get_period_head(rhport, p_qhd->interval_ms);
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break;
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case TUSB_XFER_ISOCHRONOUS:
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@ -439,10 +420,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
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default: break;
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}
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TU_ASSERT(list_head);
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// TODO might need to disable async/period list
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list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD);
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hcd_dcache_clean(p_qhd, sizeof(ehci_qhd_t));
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@ -622,8 +601,8 @@ void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
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TU_ATTR_ALWAYS_INLINE static inline
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void period_list_xfer_complete_isr(uint8_t rhport, uint32_t interval_ms)
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{
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uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
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ehci_link_t next_link = * get_period_head(rhport, interval_ms);
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uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
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ehci_link_t next_link = *list_get_period_head(rhport, interval_ms);
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while (!next_link.terminate) {
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if (interval_ms > 1 && period_1ms_addr == tu_align32(next_link.address)) {
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@ -721,7 +700,7 @@ TU_ATTR_ALWAYS_INLINE static inline
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void xfer_error_isr(uint8_t rhport)
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{
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//------------- async list -------------//
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ehci_qhd_t * const async_head = qhd_async_head(rhport);
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ehci_qhd_t * const async_head = list_get_async_head(rhport);
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ehci_qhd_t *p_qhd = async_head;
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do
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{
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@ -731,10 +710,10 @@ void xfer_error_isr(uint8_t rhport)
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}while(p_qhd != async_head); // async list traversal, stop if loop around
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//------------- TODO refractor period list -------------//
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uint32_t const period_1ms_addr = (uint32_t) get_period_head(rhport, 1u);
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uint32_t const period_1ms_addr = (uint32_t) list_get_period_head(rhport, 1u);
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for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
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{
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ehci_link_t next_item = * get_period_head(rhport, interval_ms);
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ehci_link_t next_item = *list_get_period_head(rhport, interval_ms);
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// TODO abstract max loop guard for period
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while( !next_item.terminate &&
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@ -801,7 +780,7 @@ void hcd_int_handler(uint8_t rhport)
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//------------- some QTD/SITD/ITD with IOC set is completed -------------//
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if (int_status & EHCI_INT_MASK_NXP_ASYNC) {
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async_list_xfer_complete_isr(qhd_async_head(rhport));
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async_list_xfer_complete_isr(list_get_async_head(rhport));
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regs->status = EHCI_INT_MASK_NXP_ASYNC; // Acknowledge
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}
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@ -828,35 +807,62 @@ void hcd_int_handler(uint8_t rhport)
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}
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//--------------------------------------------------------------------+
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// HELPER
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// List Managing Helper
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//--------------------------------------------------------------------+
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// Get head of periodic list
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TU_ATTR_ALWAYS_INLINE static inline ehci_link_t* list_get_period_head(uint8_t rhport, uint32_t interval_ms) {
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(void) rhport;
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return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min32(FRAMELIST_SIZE, interval_ms) ) ];
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}
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//------------- queue head helper -------------//
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static inline ehci_qhd_t* qhd_find_free (void)
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// Get head of async list
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* list_get_async_head(uint8_t rhport) {
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(void) rhport;
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return qhd_control(0); // control qhd of dev0 is used as async head
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}
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// insert at head
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static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
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{
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for (uint32_t i=0; i<QHD_MAX; i++)
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{
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new->address = current->address;
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current->address = ((uint32_t) new) | (new_type << 1);
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}
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static inline ehci_link_t* list_next(ehci_link_t const *p_link)
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{
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return (ehci_link_t*) tu_align32(p_link->address);
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}
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//--------------------------------------------------------------------+
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// Queue Header helper
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//--------------------------------------------------------------------+
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// Get queue head for control transfer (always available)
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t* qhd_control(uint8_t dev_addr) {
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return &ehci_data.control[dev_addr].qhd;
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}
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// Find a free queue head
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t *qhd_find_free(void) {
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for ( uint32_t i = 0; i < QHD_MAX; i++ ) {
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if ( !ehci_data.qhd_pool[i].used ) return &ehci_data.qhd_pool[i];
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}
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return NULL;
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}
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static inline ehci_qhd_t* qhd_next(ehci_qhd_t const * p_qhd)
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{
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return (ehci_qhd_t*) tu_align32(p_qhd->next.address);
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// Next queue head link
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TU_ATTR_ALWAYS_INLINE static inline ehci_qhd_t *qhd_next(ehci_qhd_t const *p_qhd) {
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return (ehci_qhd_t *) tu_align32(p_qhd->next.address);
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}
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static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
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{
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ehci_qhd_t* qhd_pool = ehci_data.qhd_pool;
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// Get queue head from address
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static ehci_qhd_t *qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) {
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ehci_qhd_t *qhd_pool = ehci_data.qhd_pool;
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for(uint32_t i=0; i<QHD_MAX; i++)
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{
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for ( uint32_t i = 0; i < QHD_MAX; i++ ) {
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if ( (qhd_pool[i].dev_addr == dev_addr) &&
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ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) )
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{
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ep_addr == tu_edpt_addr(qhd_pool[i].ep_number, qhd_pool[i].pid) ) {
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return &qhd_pool[i];
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}
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}
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@ -864,6 +870,7 @@ static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr)
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return NULL;
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}
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// Init queue head with endpoint descriptor
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static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
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{
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// address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise)
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@ -938,6 +945,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
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}
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}
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// Attach a TD to queue head
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static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) {
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qhd->attached_qtd = qtd;
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qhd->attached_buffer = qtd->buffer[0];
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@ -949,9 +957,16 @@ static void qhd_attach_qtd(ehci_qhd_t *qhd, ehci_qtd_t *qtd) {
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hcd_dcache_clean_invalidate(qhd, sizeof(ehci_qhd_t));
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}
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//--------------------------------------------------------------------+
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// Queue TD helper
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//--------------------------------------------------------------------+
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//------------- TD helper -------------//
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static inline ehci_qtd_t *qtd_find_free(void) {
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// Get TD for control transfer (always available)
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TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t* qtd_control(uint8_t dev_addr) {
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return &ehci_data.control[dev_addr].qtd;
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}
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TU_ATTR_ALWAYS_INLINE static inline ehci_qtd_t *qtd_find_free(void) {
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for (uint32_t i = 0; i < QTD_MAX; i++) {
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if (!ehci_data.qtd_pool[i].used) return &ehci_data.qtd_pool[i];
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}
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@ -979,18 +994,4 @@ static void qtd_init(ehci_qtd_t* qtd, void const* buffer, uint16_t total_bytes)
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}
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}
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//------------- List Managing Helper -------------//
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// insert at head
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static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type)
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{
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new->address = current->address;
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current->address = ((uint32_t) new) | (new_type << 1);
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}
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static inline ehci_link_t* list_next(ehci_link_t const *p_link)
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{
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return (ehci_link_t*) tu_align32(p_link->address);
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}
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#endif
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