add ch32v203 nano to hil pool

This commit is contained in:
hathach 2024-08-08 21:38:49 +07:00
parent 1ea38ebe13
commit 0d44977b54
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GPG Key ID: 26FAB84F615C3C52
2 changed files with 37 additions and 0 deletions

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@ -146,6 +146,36 @@ def flash_openocd(board, firmware):
return ret
def flash_openocd_wch(board, firmware):
# Content of the wch-riscv.cfg file
cfg_content = """
adapter driver wlinke
adapter speed 6000
transport select sdi
wlink_set_address 0x00000000
set _CHIPNAME wch_riscv
sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x20000000 -work-area-size 10000 -work-area-backup 1
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
echo "Ready for Remote Connections"
"""
f_wch = f"wch-riscv_{board['uid']}.cfg"
if not os.path.exists(f_wch):
with open(f_wch, 'w') as file:
file.write(cfg_content)
ret = run_cmd(f'openocd_wch -c "adapter serial {board["flasher_sn"]}" -f {f_wch} -c "program {firmware}.elf reset exit"')
return ret
def flash_wlink_rs(board, firmware):
# wlink use index for probe selection and lacking usb serial support
ret = run_cmd(f'wlink flash {firmware}.elf')

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@ -57,6 +57,13 @@
"flasher": "openocd",
"flasher_sn": "066FFF495087534867063844",
"flasher_args": "-f interface/stlink.cfg -f target/stm32g0x.cfg"
},
{
"name": "nanoch32v203",
"uid": "CDAB277B0FBC03E339E339E3",
"flasher": "openocd_wch",
"flasher_sn": "EBCA8F0670AF",
"flasher_args": ""
}
],
"boards-skip": [