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hathach 2022-02-25 23:04:39 +07:00
parent 89115253da
commit 0997589c45
4 changed files with 5 additions and 7 deletions
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6
src/common/tusb_mcu_attr.h
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@ -27,7 +27,7 @@
#ifndef TUSB_MCU_ATTR_H_
#define TUSB_MCU_ATTR_H_
/* Attribute includes
/* USB Controller Attributes for Device, Host or MCU (both)
* - ENDPOINT_MAX: max (logical) number of endpoint
* - ENDPOINT_EXCLUSIVE_NUMBER: endpoint number with different direction IN and OUT aren't allowed,
* e.g EP1 OUT & EP1 IN cannot exist together
@ -45,7 +45,7 @@
#elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
// TODO USB0 has 6, USB1 has 4
#define DCD_ATTR_CONTROLLER_CHIPIDEA_HS
#define MCU_ATTR_CONTROLLER_CHIPIDEA_HS
#define DCD_ATTR_ENDPOINT_MAX 6
#define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS
@ -63,7 +63,7 @@
#define DCD_ATTR_ENDPOINT_MAX 6
#elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX)
#define DCD_ATTR_CONTROLLER_CHIPIDEA_HS
#define MCU_ATTR_CONTROLLER_CHIPIDEA_HS
#define DCD_ATTR_ENDPOINT_MAX 8
#define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS

2
src/portable/chipidea/ci_hs/dcd_ci_hs.c
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@ -26,7 +26,7 @@
#include "tusb_option.h"
#if CFG_TUD_ENABLED && defined(DCD_ATTR_CONTROLLER_CHIPIDEA_HS)
#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS)
//--------------------------------------------------------------------+
// INCLUDE

2
src/portable/ehci/ehci.c
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@ -45,7 +45,7 @@
#define EHCI_DBG 2
// Framelist size as small as possible to save SRAM
#ifdef HCD_ATTR_EHCI
#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS
// NXP Transdimension: 8 elements
#define FRAMELIST_SIZE_BIT_VALUE 7u
#define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \

2
src/tusb_option.h
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@ -220,8 +220,6 @@
#define CFG_TUD_ENABLED ( TUD_RHPORT_MODE & OPT_MODE_DEVICE )
#define TUD_OPT_HIGH_SPEED ( (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (DCD_ATTR_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)) )
// CFG_TUD_SPEED OPT_MODE_HIGH_SPEED
//------------- Roothub as Host -------------//
#if (CFG_TUSB_RHPORT0_MODE) & OPT_MODE_HOST