mirror/tinyusb
1
0
Fork 0
mirror of https://github.com/hathach/tinyusb.git synced 2025-02-20 18:40:57 +00:00
Code Issues Packages Projects Releases Wiki Activity

generalize renesas LINK core driver

Browse Source 
create local register access struct and move mcu specific code
	in preparation of support for other mcu families that use the LINK usb core

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
This commit is contained in:
Rafael Silva 2022-03-09 11:52:39 +00:00
parent dcadbf3364
commit 03777f4a46
6 changed files with 2034 additions and 488 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
hw/bsp/rx/boards/gr_citrus/gr_citrus.c
View File

@ -201,6 +201,11 @@ void board_init(void)
IEN(SCI0, RXI0) = 1;
IEN(SCI0, TXI0) = 1;
IEN(SCI0, TEI0) = 1;
/* Enable USB0 */
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
MSTP(USB0) = 0;
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
}
//--------------------------------------------------------------------+

5
hw/bsp/rx/boards/rx65n_target/rx65n_target.c
View File

@ -248,6 +248,11 @@ void board_init(void)
IEN(ICU,GROUPBL0) = 1;
EN(SCI5, TEI5) = 1;
/* Enable USB0 */
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
MSTP(USB0) = 0;
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
/* setup USBI0 interrupt. */
IR(USB0, USBI0) = 0;
IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;

357
src/portable/renesas/link/dcd_link.c
View File

@ -31,79 +31,29 @@
// We disable SOF for now until needed later on
#define USE_SOF 0
#if CFG_TUD_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \
CFG_TUSB_MCU == OPT_MCU_RX65X || \
CFG_TUSB_MCU == OPT_MCU_RX72N )
#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N)
#include "device/dcd.h"
#include "iodefine.h"
#include "link_type.h"
#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
#include "link_rx.h"
#else
#error "Unsupported MCU"
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
#define SYSTEM_PRCR_PRC1 (1<<1)
#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
#define USB_FIFOSEL_TX ((uint16_t)(1u<<5))
#define USB_FIFOSEL_BIGEND ((uint16_t)(1u<<8))
#define USB_FIFOSEL_MBW_8 ((uint16_t)(0u<<10))
#define USB_FIFOSEL_MBW_16 ((uint16_t)(1u<<10))
#define USB_IS0_CTSQ ((uint16_t)(7u))
#define USB_IS0_DVSQ ((uint16_t)(7u<<4))
#define USB_IS0_VALID ((uint16_t)(1u<<3))
#define USB_IS0_BRDY ((uint16_t)(1u<<8))
#define USB_IS0_NRDY ((uint16_t)(1u<<9))
#define USB_IS0_BEMP ((uint16_t)(1u<<10))
#define USB_IS0_CTRT ((uint16_t)(1u<<11))
#define USB_IS0_DVST ((uint16_t)(1u<<12))
#define USB_IS0_SOFR ((uint16_t)(1u<<13))
#define USB_IS0_RESM ((uint16_t)(1u<<14))
#define USB_IS0_VBINT ((uint16_t)(1u<<15))
#define USB_IS1_SACK ((uint16_t)(1u<<4))
#define USB_IS1_SIGN ((uint16_t)(1u<<5))
#define USB_IS1_EOFERR ((uint16_t)(1u<<6))
#define USB_IS1_ATTCH ((uint16_t)(1u<<11))
#define USB_IS1_DTCH ((uint16_t)(1u<<12))
#define USB_IS1_BCHG ((uint16_t)(1u<<14))
#define USB_IS1_OVRCR ((uint16_t)(1u<<15))
/* LINK core registers */
#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
#define USB_IS0_CTSQ_MSK (7u)
#define USB_IS0_CTSQ_SETUP (1u)
#define USB_IS0_DVSQ_DEF (1u<<4)
#define USB_IS0_DVSQ_ADDR (2u<<4)
#define USB_IS0_DVSQ_SUSP0 (4u<<4)
#define USB_IS0_DVSQ_SUSP1 (5u<<4)
#define USB_IS0_DVSQ_SUSP2 (6u<<4)
#define USB_IS0_DVSQ_SUSP3 (7u<<4)
#define USB_PIPECTR_PID_NAK (0u)
#define USB_PIPECTR_PID_BUF (1u)
#define USB_PIPECTR_PID_STALL (2u)
#define USB_PIPECTR_CCPL (1u<<2)
#define USB_PIPECTR_SQMON (1u<<6)
#define USB_PIPECTR_SQCLR (1u<<8)
#define USB_PIPECTR_ACLRM (1u<<9)
#define USB_PIPECTR_INBUFM (1u<<14)
#define USB_PIPECTR_BSTS (1u<<15)
#define USB_FIFOCTR_DTLN (0x1FF)
#define USB_FIFOCTR_FRDY (1u<<13)
#define USB_FIFOCTR_BCLR (1u<<14)
#define USB_FIFOCTR_BVAL (1u<<15)
#define USB_PIPECFG_SHTNAK (1u<<7)
#define USB_PIPECFG_DBLB (1u<<9)
#define USB_PIPECFG_BULK (1u<<14)
#define USB_PIPECFG_ISO (3u<<14)
#define USB_PIPECFG_INT (2u<<14)
#define FIFO_REQ_CLR (1u)
#define FIFO_COMPLETE (1u<<1)
// Start of definition of packed structs (used by the CCRX toolchain)
/* Start of definition of packed structs (used by the CCRX toolchain) */
TU_ATTR_PACKED_BEGIN
TU_ATTR_BIT_FIELD_ORDER_BEGIN
typedef struct {
typedef struct TU_ATTR_PACKED {
union {
struct {
uint16_t : 8;
@ -116,7 +66,7 @@ typedef struct {
uint16_t TRN;
} reg_pipetre_t;
typedef union {
typedef union TU_ATTR_PACKED {
struct {
volatile uint16_t u8: 8;
volatile uint16_t : 0;
@ -150,28 +100,6 @@ typedef struct
//--------------------------------------------------------------------+
static dcd_data_t _dcd;
static uint32_t disable_interrupt(void)
{
uint32_t pswi;
#if defined(__CCRX__)
pswi = get_psw() & 0x010000;
clrpsw_i();
#else
pswi = __builtin_rx_mvfc(0) & 0x010000;
__builtin_rx_clrpsw('I');
#endif
return pswi;
}
static void enable_interrupt(uint32_t pswi)
{
#if defined(__CCRX__)
set_psw(get_psw() | pswi);
#else
__builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
#endif
}
static unsigned find_pipe(unsigned xfer)
{
switch (xfer) {
@ -202,22 +130,18 @@ static unsigned find_pipe(unsigned xfer)
static volatile uint16_t* get_pipectr(unsigned num)
{
volatile uint16_t *ctr = NULL;
if (num) {
ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
ctr += num - 1;
return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
} else {
ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
return (volatile uint16_t*)&(LINK_REG->DCPCTR);
}
return ctr;
}
static volatile reg_pipetre_t* get_pipetre(unsigned num)
{
volatile reg_pipetre_t* tre = NULL;
if ((1 <= num) && (num <= 5)) {
tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD;
tre += num - 1;
tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
}
return tre;
}
@ -225,36 +149,31 @@ static volatile reg_pipetre_t* get_pipetre(unsigned num)
static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr)
{
(void)rhport;
volatile uint16_t *ctr = NULL;
const unsigned epn = tu_edpt_number(ep_addr);
const unsigned epn = tu_edpt_number(ep_addr);
if (epn) {
const unsigned dir = tu_edpt_dir(ep_addr);
const unsigned num = _dcd.ep[dir][epn];
if (num) {
ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
ctr += num - 1;
}
return get_pipectr(num);
} else {
ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
return get_pipectr(0);
}
return ctr;
}
static unsigned edpt0_max_packet_size(void)
{
return USB0.DCPMAXP.BIT.MXPS;
return LINK_REG->DCPMAXP_b.MXPS;
}
static unsigned edpt_max_packet_size(unsigned num)
{
USB0.PIPESEL.WORD = num;
return USB0.PIPEMAXP.WORD;
LINK_REG->PIPESEL = num;
return LINK_REG->PIPEMAXP;
}
static inline void pipe_wait_for_ready(unsigned num)
{
while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
while (!USB0.D0FIFOCTR.BIT.FRDY) ;
while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
}
static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@ -316,13 +235,14 @@ static bool pipe0_xfer_in(void)
void *buf = pipe->buf;
if (len) {
if (pipe->ff) {
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.CFIFO.WORD, len, TUSB_DIR_IN);
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_IN);
} else {
pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
}
if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
if (len < mps)
LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
pipe->remaining = rem - len;
return false;
}
@ -333,18 +253,19 @@ static bool pipe0_xfer_out(void)
const unsigned rem = pipe->remaining;
const unsigned mps = edpt0_max_packet_size();
const unsigned vld = USB0.CFIFOCTR.BIT.DTLN;
const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
void *buf = pipe->buf;
if (len) {
if (pipe->ff) {
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.CFIFO.WORD, len, TUSB_DIR_OUT);
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->CFIFO, len, TUSB_DIR_OUT);
} else {
pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
}
if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
if (len < mps)
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
pipe->remaining = rem - len;
if ((len < mps) || (rem == len)) {
pipe->buf = NULL;
@ -363,22 +284,23 @@ static bool pipe_xfer_in(unsigned num)
return true;
}
USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
const unsigned mps = edpt_max_packet_size(num);
pipe_wait_for_ready(num);
const unsigned len = TU_MIN(rem, mps);
void *buf = pipe->buf;
if (len) {
if (pipe->ff) {
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.D0FIFO.WORD, len, TUSB_DIR_IN);
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_IN);
} else {
pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
}
if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
if (len < mps)
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
pipe->remaining = rem - len;
return false;
}
@ -388,24 +310,25 @@ static bool pipe_xfer_out(unsigned num)
pipe_state_t *pipe = &_dcd.pipe[num];
const unsigned rem = pipe->remaining;
USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8;
LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
const unsigned mps = edpt_max_packet_size(num);
pipe_wait_for_ready(num);
const unsigned vld = USB0.D0FIFOCTR.BIT.DTLN;
const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN;
const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
void *buf = pipe->buf;
if (len) {
if (pipe->ff) {
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&USB0.D0FIFO.WORD, len, TUSB_DIR_OUT);
pipe_read_write_packet_ff((tu_fifo_t*)buf, (volatile void*)&LINK_REG->D0FIFO, len, TUSB_DIR_OUT);
} else {
pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
}
if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
pipe->remaining = rem - len;
if (len < mps)
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
pipe->remaining = rem - len;
if ((len < mps) || (rem == len)) {
pipe->buf = NULL;
return NULL != buf;
@ -416,13 +339,13 @@ static bool pipe_xfer_out(unsigned num)
static void process_setup_packet(uint8_t rhport)
{
uint16_t setup_packet[4];
if (0 == (USB0.INTSTS0.WORD & USB_IS0_VALID)) return;
USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
setup_packet[0] = tu_le16toh(USB0.USBREQ.WORD);
setup_packet[1] = USB0.USBVAL;
setup_packet[2] = USB0.USBINDX;
setup_packet[3] = USB0.USBLENG;
USB0.INTSTS0.WORD = ~USB_IS0_VALID;
if (0 == (LINK_REG->INTSTS0 & USB_IS0_VALID)) return;
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
setup_packet[0] = tu_le16toh(LINK_REG->USBREQ);
setup_packet[1] = LINK_REG->USBVAL;
setup_packet[2] = LINK_REG->USBINDX;
setup_packet[3] = LINK_REG->USBLENG;
LINK_REG->INTSTS0 = ~USB_IS0_VALID;
dcd_event_setup_received(rhport, (const uint8_t*)&setup_packet[0], true);
}
@ -430,7 +353,7 @@ static void process_status_completion(uint8_t rhport)
{
uint8_t ep_addr;
/* Check the data stage direction */
if (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) {
if (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) {
/* IN transfer. */
ep_addr = tu_edpt_addr(0, TUSB_DIR_IN);
} else {
@ -444,11 +367,12 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
{
/* configure fifo direction and access unit settings */
if (ep_addr) { /* IN, 2 bytes */
USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ;
} else { /* OUT, a byte */
USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8;
while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ;
LINK_REG->CFIFOSEL =
USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ;
} else { /* OUT, a byte */
LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ;
}
pipe_state_t *pipe = &_dcd.pipe[0];
@ -458,14 +382,14 @@ static bool process_pipe0_xfer(int buffer_type, uint8_t ep_addr, void* buffer, u
if (total_bytes) {
pipe->buf = buffer;
if (ep_addr) { /* IN */
TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80));
TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
pipe0_xfer_in();
}
USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
} else {
/* ZLP */
pipe->buf = NULL;
USB0.DCPCTR.WORD = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
LINK_REG->DCPCTR = USB_PIPECTR_CCPL | USB_PIPECTR_PID_BUF;
}
return true;
}
@ -487,11 +411,11 @@ static bool process_pipe_xfer(int buffer_type, uint8_t ep_addr, void* buffer, ui
if (total_bytes) {
pipe_xfer_in(num);
} else { /* ZLP */
USB0.D0FIFOSEL.WORD = num;
LINK_REG->D0FIFOSEL = num;
pipe_wait_for_ready(num);
USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
}
} else {
#if defined(__CCRX__)
@ -558,18 +482,18 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
static void process_bus_reset(uint8_t rhport)
{
USB0.BEMPENB.WORD = 1;
USB0.BRDYENB.WORD = 1;
USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
USB0.D1FIFOSEL.WORD = 0;
while (USB0.D1FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1CTR.WORD));
volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t)(&USB0.PIPE1TRE.WORD));
LINK_REG->BEMPENB = 1;
LINK_REG->BRDYENB = 1;
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
LINK_REG->D1FIFOSEL = 0;
while (LINK_REG->D1FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_CTR[0]));
volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&LINK_REG->PIPE_TR[0].E));
for (int i = 1; i <= 5; ++i) {
USB0.PIPESEL.WORD = i;
USB0.PIPECFG.WORD = 0;
LINK_REG->PIPESEL = i;
LINK_REG->PIPECFG = 0;
*ctr = USB_PIPECTR_ACLRM;
*ctr = 0;
++ctr;
@ -577,8 +501,8 @@ static void process_bus_reset(uint8_t rhport)
tre += 2;
}
for (int i = 6; i <= 9; ++i) {
USB0.PIPESEL.WORD = i;
USB0.PIPECFG.WORD = 0;
LINK_REG->PIPESEL = i;
LINK_REG->PIPECFG = 0;
*ctr = USB_PIPECTR_ACLRM;
*ctr = 0;
++ctr;
@ -589,7 +513,7 @@ static void process_bus_reset(uint8_t rhport)
static void process_set_address(uint8_t rhport)
{
const uint32_t addr = USB0.USBADDR.BIT.USBADDR;
const uint32_t addr = LINK_REG->USBADDR_b.USBADDR;
if (!addr) return;
const tusb_control_request_t setup_packet = {
#if defined(__CCRX__)
@ -611,56 +535,39 @@ static void process_set_address(uint8_t rhport)
void dcd_init(uint8_t rhport)
{
(void)rhport;
/* Enable USB0 */
uint32_t pswi = disable_interrupt();
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
MSTP(USB0) = 0;
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
enable_interrupt(pswi);
USB0.SYSCFG.BIT.SCKE = 1;
while (!USB0.SYSCFG.BIT.SCKE) ;
USB0.SYSCFG.BIT.DRPD = 0;
USB0.SYSCFG.BIT.DCFM = 0;
USB0.SYSCFG.BIT.USBE = 1;
USB.DPUSR0R.BIT.FIXPHY0 = 0u; /* USB0 Transceiver Output fixed */
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
USB0.PHYSLEW.LONG = 0x5;
IR(PERIB, INTB185) = 0;
#else
IR(USB0, USBI0) = 0;
#endif
LINK_REG->SYSCFG_b.SCKE = 1;
while (!LINK_REG->SYSCFG_b.SCKE) ;
LINK_REG->SYSCFG_b.DRPD = 0;
LINK_REG->SYSCFG_b.DCFM = 0;
LINK_REG->SYSCFG_b.USBE = 1;
// MCU specific PHY init
link_phy_init();
LINK_REG->PHYSLEW = 0x5;
LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* USB_BASE Transceiver Output fixed */
/* Setup default control pipe */
USB0.DCPMAXP.BIT.MXPS = 64;
USB0.INTENB0.WORD = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP |
USB_IS0_DVST | USB_IS0_CTRT | (USE_SOF ? USB_IS0_SOFR: 0) | USB_IS0_RESM;
USB0.BEMPENB.WORD = 1;
USB0.BRDYENB.WORD = 1;
LINK_REG->DCPMAXP_b.MXPS = 64;
LINK_REG->INTENB0 = USB_IS0_VBINT | USB_IS0_BRDY | USB_IS0_BEMP | USB_IS0_DVST | USB_IS0_CTRT |
(USE_SOF ? USB_IS0_SOFR : 0) | USB_IS0_RESM;
LINK_REG->BEMPENB = 1;
LINK_REG->BRDYENB = 1;
if (USB0.INTSTS0.BIT.VBSTS) {
if (LINK_REG->INTSTS0_b.VBSTS) {
dcd_connect(rhport);
}
}
void dcd_int_enable(uint8_t rhport)
{
(void)rhport;
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
IEN(PERIB, INTB185) = 1;
#else
IEN(USB0, USBI0) = 1;
#endif
link_int_enable(rhport);
}
void dcd_int_disable(uint8_t rhport)
{
(void)rhport;
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
IEN(PERIB, INTB185) = 0;
#else
IEN(USB0, USBI0) = 0;
#endif
link_int_disable(rhport);
}
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
@ -672,19 +579,19 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
void dcd_remote_wakeup(uint8_t rhport)
{
(void)rhport;
USB0.DVSTCTR0.BIT.WKUP = 1;
LINK_REG->DVSTCTR0_b.WKUP = 1;
}
void dcd_connect(uint8_t rhport)
{
(void)rhport;
USB0.SYSCFG.BIT.DPRPU = 1;
LINK_REG->SYSCFG_b.DPRPU = 1;
}
void dcd_disconnect(uint8_t rhport)
{
(void)rhport;
USB0.SYSCFG.BIT.DPRPU = 0;
LINK_REG->SYSCFG_b.DPRPU = 0;
}
void dcd_sof_enable(uint8_t rhport, bool en)
@ -720,8 +627,8 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
/* setup pipe */
dcd_int_disable(rhport);
USB0.PIPESEL.WORD = num;
USB0.PIPEMAXP.WORD = mps;
LINK_REG->PIPESEL = num;
LINK_REG->PIPEMAXP = mps;
volatile uint16_t *ctr = get_pipectr(num);
*ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
*ctr = 0;
@ -733,13 +640,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
} else {
cfg |= (USB_PIPECFG_ISO | USB_PIPECFG_DBLB);
}
USB0.PIPECFG.WORD = cfg;
USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num);
USB0.BRDYENB.WORD |= TU_BIT(num);
LINK_REG->PIPECFG = cfg;
LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
LINK_REG->BRDYENB |= TU_BIT(num);
if (dir || (xfer != TUSB_XFER_BULK)) {
*ctr = USB_PIPECTR_PID_BUF;
}
// TU_LOG1("O %d %x %x\r\n", USB0.PIPESEL.WORD, USB0.PIPECFG.WORD, USB0.PIPEMAXP.WORD);
// TU_LOG1("O %d %x %x\r\n", LINK_REG->PIPESEL, LINK_REG->PIPECFG, LINK_REG->PIPEMAXP);
dcd_int_enable(rhport);
return true;
@ -764,11 +671,11 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
const unsigned dir = tu_edpt_dir(ep_addr);
const unsigned num = _dcd.ep[dir][epn];
USB0.BRDYENB.WORD &= ~TU_BIT(num);
LINK_REG->BRDYENB &= ~TU_BIT(num);
volatile uint16_t *ctr = get_pipectr(num);
*ctr = 0;
USB0.PIPESEL.WORD = num;
USB0.PIPECFG.WORD = 0;
LINK_REG->PIPESEL = num;
LINK_REG->PIPECFG = 0;
_dcd.pipe[num].ep = 0;
_dcd.ep[dir][epn] = 0;
}
@ -815,8 +722,8 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
*ctr = USB_PIPECTR_PID_BUF;
} else {
const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
USB0.PIPESEL.WORD = num;
if (USB0.PIPECFG.BIT.TYPE != 1) {
LINK_REG->PIPESEL = num;
if (LINK_REG->PIPECFG_b.TYPE != 1) {
*ctr = USB_PIPECTR_PID_BUF;
}
}
@ -830,11 +737,11 @@ void dcd_int_handler(uint8_t rhport)
{
(void)rhport;
unsigned is0 = USB0.INTSTS0.WORD;
unsigned is0 = LINK_REG->INTSTS0;
/* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
USB0.INTSTS0.WORD = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
LINK_REG->INTSTS0 = ~((USB_IS0_CTRT | USB_IS0_DVST | USB_IS0_SOFR | USB_IS0_RESM | USB_IS0_VBINT) & is0) | USB_IS0_VALID;
if (is0 & USB_IS0_VBINT) {
if (USB0.INTSTS0.BIT.VBSTS) {
if (LINK_REG->INTSTS0_b.VBSTS) {
dcd_connect(rhport);
} else {
dcd_disconnect(rhport);
@ -843,14 +750,14 @@ void dcd_int_handler(uint8_t rhport)
if (is0 & USB_IS0_RESM) {
dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
#if (0==USE_SOF)
USB0.INTENB0.BIT.SOFE = 0;
LINK_REG->INTENB0_b.SOFE = 0;
#endif
}
if ((is0 & USB_IS0_SOFR) && USB0.INTENB0.BIT.SOFE) {
if ((is0 & USB_IS0_SOFR) && LINK_REG->INTENB0_b.SOFE) {
// USBD will exit suspended mode when SOF event is received
dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
#if (0==USE_SOF)
USB0.INTENB0.BIT.SOFE = 0;
#if (0 == USE_SOF)
LINK_REG->INTENB0_b.SOFE = 0;
#endif
}
if (is0 & USB_IS0_DVST) {
@ -867,7 +774,7 @@ void dcd_int_handler(uint8_t rhport)
case USB_IS0_DVSQ_SUSP3:
dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
#if (0==USE_SOF)
USB0.INTENB0.BIT.SOFE = 1;
LINK_REG->INTENB0_b.SOFE = 1;
#endif
default:
break;
@ -883,17 +790,17 @@ void dcd_int_handler(uint8_t rhport)
}
}
if (is0 & USB_IS0_BEMP) {
const unsigned s = USB0.BEMPSTS.WORD;
USB0.BEMPSTS.WORD = 0;
const unsigned s = LINK_REG->BEMPSTS;
LINK_REG->BEMPSTS = 0;
if (s & 1) {
process_pipe0_bemp(rhport);
}
}
if (is0 & USB_IS0_BRDY) {
const unsigned m = USB0.BRDYENB.WORD;
unsigned s = USB0.BRDYSTS.WORD & m;
const unsigned m = LINK_REG->BRDYENB;
unsigned s = LINK_REG->BRDYSTS & m;
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
USB0.BRDYSTS.WORD = ~s;
LINK_REG->BRDYSTS = ~s;
while (s) {
#if defined(__CCRX__)
static const int Mod37BitPosition[] = {

421
src/portable/renesas/link/hcd_link.c
View File

@ -27,86 +27,28 @@
#include "tusb_option.h"
#if CFG_TUH_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_RX63X || \
CFG_TUSB_MCU == OPT_MCU_RX65X || \
CFG_TUSB_MCU == OPT_MCU_RX72N )
#if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X || CFG_TUSB_MCU == OPT_MCU_RX72N)
#include "host/hcd.h"
#include "iodefine.h"
#include "link_type.h"
#if TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N)
#include "link_rx.h"
#else
#error "Unsupported MCU"
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
#define SYSTEM_PRCR_PRC1 (1<<1)
#define SYSTEM_PRCR_PRKEY (0xA5u<<8)
#define USB_DVSTCTR0_LOW (1u)
#define USB_DVSTCTR0_FULL (2u)
/* LINK core registers */
#define LINK_REG ((LINK_REG_t*)LINK_REG_BASE)
#define USB_FIFOSEL_TX ((uint16_t)(1u<<5))
#define USB_FIFOSEL_BIGEND ((uint16_t)(1u<<8))
#define USB_FIFOSEL_MBW_8 ((uint16_t)(0u<<10))
#define USB_FIFOSEL_MBW_16 ((uint16_t)(1u<<10))
#define USB_IS0_CTSQ ((uint16_t)(7u))
#define USB_IS0_DVSQ ((uint16_t)(7u<<4))
#define USB_IS0_VALID ((uint16_t)(1u<<3))
#define USB_IS0_BRDY ((uint16_t)(1u<<8))
#define USB_IS0_NRDY ((uint16_t)(1u<<9))
#define USB_IS0_BEMP ((uint16_t)(1u<<10))
#define USB_IS0_CTRT ((uint16_t)(1u<<11))
#define USB_IS0_DVST ((uint16_t)(1u<<12))
#define USB_IS0_SOFR ((uint16_t)(1u<<13))
#define USB_IS0_RESM ((uint16_t)(1u<<14))
#define USB_IS0_VBINT ((uint16_t)(1u<<15))
#define USB_IS1_SACK ((uint16_t)(1u<<4))
#define USB_IS1_SIGN ((uint16_t)(1u<<5))
#define USB_IS1_EOFERR ((uint16_t)(1u<<6))
#define USB_IS1_ATTCH ((uint16_t)(1u<<11))
#define USB_IS1_DTCH ((uint16_t)(1u<<12))
#define USB_IS1_BCHG ((uint16_t)(1u<<14))
#define USB_IS1_OVRCR ((uint16_t)(1u<<15))
#define USB_IS0_CTSQ_MSK (7u)
#define USB_IS0_CTSQ_SETUP (1u)
#define USB_IS0_DVSQ_DEF (1u<<4)
#define USB_IS0_DVSQ_ADDR (2u<<4)
#define USB_IS0_DVSQ_SUSP0 (4u<<4)
#define USB_IS0_DVSQ_SUSP1 (5u<<4)
#define USB_IS0_DVSQ_SUSP2 (6u<<4)
#define USB_IS0_DVSQ_SUSP3 (7u<<4)
#define USB_PIPECTR_PID_MSK (3u)
#define USB_PIPECTR_PID_NAK (0u)
#define USB_PIPECTR_PID_BUF (1u)
#define USB_PIPECTR_PID_STALL (2u)
#define USB_PIPECTR_CCPL (1u<<2)
#define USB_PIPECTR_SQMON (1u<<6)
#define USB_PIPECTR_SQCLR (1u<<8)
#define USB_PIPECTR_ACLRM (1u<<9)
#define USB_PIPECTR_INBUFM (1u<<14)
#define USB_PIPECTR_BSTS (1u<<15)
#define USB_FIFOCTR_DTLN (0x1FF)
#define USB_FIFOCTR_FRDY (1u<<13)
#define USB_FIFOCTR_BCLR (1u<<14)
#define USB_FIFOCTR_BVAL (1u<<15)
#define USB_PIPECFG_SHTNAK (1u<<7)
#define USB_PIPECFG_DBLB (1u<<9)
#define USB_PIPECFG_BULK (1u<<14)
#define USB_PIPECFG_ISO (3u<<14)
#define USB_PIPECFG_INT (2u<<14)
#define USB_DEVADD_LOW (1u<<6)
#define USB_DEVADD_FULL (2u<<6)
#define FIFO_REQ_CLR (1u)
#define FIFO_COMPLETE (1u<<1)
// Start of definition of packed structs (used by the CCRX toolchain)
TU_ATTR_PACKED_BEGIN
TU_ATTR_BIT_FIELD_ORDER_BEGIN
typedef struct {
typedef struct TU_ATTR_PACKED {
union {
struct {
uint16_t : 8;
@ -119,7 +61,7 @@ typedef struct {
uint16_t TRN;
} reg_pipetre_t;
typedef union {
typedef union TU_ATTR_PACKED {
struct {
volatile uint16_t u8: 8;
volatile uint16_t : 0;
@ -127,8 +69,7 @@ typedef union {
volatile uint16_t u16;
} hw_fifo_t;
typedef struct TU_ATTR_PACKED
{
typedef struct TU_ATTR_PACKED {
void *buf; /* the start address of a transfer data buffer */
uint16_t length; /* the number of bytes in the buffer */
uint16_t remaining; /* the number of bytes remaining in the buffer */
@ -156,28 +97,6 @@ typedef struct
//--------------------------------------------------------------------+
static hcd_data_t _hcd;
static uint32_t disable_interrupt(void)
{
uint32_t pswi;
#if defined(__CCRX__)
pswi = get_psw() & 0x010000;
clrpsw_i();
#else
pswi = __builtin_rx_mvfc(0) & 0x010000;
__builtin_rx_clrpsw('I');
#endif
return pswi;
}
static void enable_interrupt(uint32_t pswi)
{
#if defined(__CCRX__)
set_psw(get_psw() | pswi);
#else
__builtin_rx_mvtc(0, __builtin_rx_mvfc(0) | pswi);
#endif
}
static unsigned find_pipe(unsigned xfer)
{
switch (xfer) {
@ -208,58 +127,49 @@ static unsigned find_pipe(unsigned xfer)
static volatile uint16_t* get_pipectr(unsigned num)
{
volatile uint16_t *ctr = NULL;
if (num) {
ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
ctr += num - 1;
return (volatile uint16_t*)&(LINK_REG->PIPE_CTR[num - 1]);
} else {
ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
return (volatile uint16_t*)&(LINK_REG->DCPCTR);
}
return ctr;
}
static volatile reg_pipetre_t* get_pipetre(unsigned num)
{
volatile reg_pipetre_t* tre = NULL;
if ((1 <= num) && (num <= 5)) {
tre = (volatile reg_pipetre_t*)&USB0.PIPE1TRE.WORD;
tre += num - 1;
tre = (volatile reg_pipetre_t*)&(LINK_REG->PIPE_TR[num - 1].E);
}
return tre;
}
static volatile uint16_t* addr_to_pipectr(uint8_t dev_addr, unsigned ep_addr)
{
volatile uint16_t *ctr = NULL;
const unsigned epn = tu_edpt_number(ep_addr);
const unsigned epn = tu_edpt_number(ep_addr);
if (epn) {
const unsigned dir_in = tu_edpt_dir(ep_addr);
const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1];
if (num) {
ctr = (volatile uint16_t*)&USB0.PIPE1CTR.WORD;
ctr += num - 1;
}
const unsigned num = _hcd.ep[dev_addr][dir_in][epn - 1];
return get_pipectr(num);
} else {
ctr = (volatile uint16_t*)&USB0.DCPCTR.WORD;
return get_pipectr(0);
}
return ctr;
}
static unsigned edpt0_max_packet_size(void)
{
return USB0.DCPMAXP.BIT.MXPS;
return LINK_REG->DCPMAXP_b.MXPS;
}
static unsigned edpt_max_packet_size(unsigned num)
{
USB0.PIPESEL.WORD = num;
return USB0.PIPEMAXP.BIT.MXPS;
LINK_REG->PIPESEL = num;
return LINK_REG->PIPEMAXP_b.MXPS;
}
static inline void pipe_wait_for_ready(unsigned num)
{
while (USB0.D0FIFOSEL.BIT.CURPIPE != num) ;
while (!USB0.D0FIFOCTR.BIT.FRDY) ;
while (LINK_REG->D0FIFOSEL_b.CURPIPE != num) ;
while (!LINK_REG->D0FIFOCTR_b.FRDY) ;
}
static void pipe_write_packet(void *buf, volatile void *fifo, unsigned len)
@ -290,21 +200,22 @@ static bool pipe0_xfer_in(void)
const unsigned rem = pipe->remaining;
const unsigned mps = edpt0_max_packet_size();
const unsigned vld = USB0.CFIFOCTR.BIT.DTLN;
const unsigned vld = LINK_REG->CFIFOCTR_b.DTLN;
const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
void *buf = pipe->buf;
if (len) {
USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
pipe_read_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
pipe_read_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BCLR;
if (len < mps)
LINK_REG->CFIFOCTR = USB_FIFOCTR_BCLR;
pipe->remaining = rem - len;
if ((len < mps) || (rem == len)) {
pipe->buf = NULL;
return true;
}
USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
return false;
}
@ -320,10 +231,11 @@ static bool pipe0_xfer_out(void)
const unsigned len = TU_MIN(mps, rem);
void *buf = pipe->buf;
if (len) {
pipe_write_packet(buf, (volatile void*)&USB0.CFIFO.WORD, len);
pipe_write_packet(buf, (volatile void*)&LINK_REG->CFIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
if (len < mps) USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
if (len < mps)
LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
pipe->remaining = rem - len;
return false;
}
@ -333,20 +245,21 @@ static bool pipe_xfer_in(unsigned num)
pipe_state_t *pipe = &_hcd.pipe[num];
const unsigned rem = pipe->remaining;
USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_8;
LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_8;
const unsigned mps = edpt_max_packet_size(num);
pipe_wait_for_ready(num);
const unsigned vld = USB0.D0FIFOCTR.BIT.DTLN;
const unsigned vld = LINK_REG->D0FIFOCTR_b.DTLN;
const unsigned len = TU_MIN(TU_MIN(rem, mps), vld);
void *buf = pipe->buf;
if (len) {
pipe_read_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
pipe_read_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BCLR;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
pipe->remaining = rem - len;
if (len < mps)
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BCLR;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
pipe->remaining = rem - len;
if ((len < mps) || (rem == len)) {
pipe->buf = NULL;
return NULL != buf;
@ -364,18 +277,19 @@ static bool pipe_xfer_out(unsigned num)
return true;
}
USB0.D0FIFOSEL.WORD = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
LINK_REG->D0FIFOSEL = num | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
const unsigned mps = edpt_max_packet_size(num);
pipe_wait_for_ready(num);
const unsigned len = TU_MIN(rem, mps);
void *buf = pipe->buf;
if (len) {
pipe_write_packet(buf, (volatile void*)&USB0.D0FIFO.WORD, len);
pipe_write_packet(buf, (volatile void*)&LINK_REG->D0FIFO, len);
pipe->buf = (uint8_t*)buf + len;
}
if (len < mps) USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
if (len < mps)
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) ; /* if CURPIPE bits changes, check written value */
pipe->remaining = rem - len;
return false;
}
@ -387,11 +301,12 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
/* configure fifo direction and access unit settings */
if (dir_in) { /* IN, a byte */
USB0.CFIFOSEL.WORD = USB_FIFOSEL_MBW_8;
while (USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX) ;
} else { /* OUT, 2 bytes */
USB0.CFIFOSEL.WORD = USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
while (!(USB0.CFIFOSEL.WORD & USB_FIFOSEL_TX)) ;
LINK_REG->CFIFOSEL = USB_FIFOSEL_MBW_8;
while (LINK_REG->CFIFOSEL & USB_FIFOSEL_TX) ;
} else { /* OUT, 2 bytes */
LINK_REG->CFIFOSEL =
USB_FIFOSEL_TX | USB_FIFOSEL_MBW_16 | (TU_BYTE_ORDER == TU_BIG_ENDIAN ? USB_FIFOSEL_BIGEND : 0);
while (!(LINK_REG->CFIFOSEL & USB_FIFOSEL_TX)) ;
}
pipe_state_t *pipe = &_hcd.pipe[0];
@ -401,25 +316,25 @@ static bool process_pipe0_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer,
if (buflen) {
pipe->buf = buffer;
if (!dir_in) { /* OUT */
TU_ASSERT(USB0.DCPCTR.BIT.BSTS && (USB0.USBREQ.WORD & 0x80));
TU_ASSERT(LINK_REG->DCPCTR_b.BSTS && (LINK_REG->USBREQ & 0x80));
pipe0_xfer_out();
}
} else { /* ZLP */
pipe->buf = NULL;
if (!dir_in) { /* OUT */
USB0.CFIFOCTR.WORD = USB_FIFOCTR_BVAL;
LINK_REG->CFIFOCTR = USB_FIFOCTR_BVAL;
}
if (dir_in == USB0.DCPCFG.BIT.DIR) {
TU_ASSERT(USB_PIPECTR_PID_NAK == USB0.DCPCTR.BIT.PID);
USB0.DCPCTR.BIT.SQSET = 1;
USB0.DCPCFG.BIT.DIR = dir_in ^ 1;
if (dir_in == LINK_REG->DCPCFG_b.DIR) {
TU_ASSERT(USB_PIPECTR_PID_NAK == LINK_REG->DCPCTR_b.PID);
LINK_REG->DCPCTR_b.SQSET = 1;
LINK_REG->DCPCFG_b.DIR = dir_in ^ 1;
}
}
USB0.DCPCTR.WORD = USB_PIPECTR_PID_BUF;
LINK_REG->DCPCTR = USB_PIPECTR_PID_BUF;
return true;
}
static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, uint16_t buflen)
static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void *buffer, uint16_t buflen)
{
const unsigned epn = tu_edpt_number(ep_addr);
const unsigned dir_in = tu_edpt_dir(ep_addr);
@ -435,11 +350,11 @@ static bool process_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, void* buffer, u
if (buflen) {
pipe_xfer_out(num);
} else { /* ZLP */
USB0.D0FIFOSEL.WORD = num;
LINK_REG->D0FIFOSEL = num;
pipe_wait_for_ready(num);
USB0.D0FIFOCTR.WORD = USB_FIFOCTR_BVAL;
USB0.D0FIFOSEL.WORD = 0;
while (USB0.D0FIFOSEL.BIT.CURPIPE) ; /* if CURPIPE bits changes, check written value */
LINK_REG->D0FIFOCTR = USB_FIFOCTR_BVAL;
LINK_REG->D0FIFOSEL = 0;
while (LINK_REG->D0FIFOSEL_b.CURPIPE) continue; /* if CURPIPE bits changes, check written value */
}
} else {
volatile uint16_t *ctr = get_pipectr(num);
@ -520,69 +435,51 @@ static void process_pipe_brdy(uint8_t rhport, unsigned num)
}
}
/*------------------------------------------------------------------*/
/* Host API
*------------------------------------------------------------------*/
bool hcd_init(uint8_t rhport)
{
(void)rhport;
/* Enable USB0 */
uint32_t pswi = disable_interrupt();
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
MSTP(USB0) = 0;
SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
enable_interrupt(pswi);
USB0.SYSCFG.BIT.SCKE = 1;
while (!USB0.SYSCFG.BIT.SCKE) ;
USB0.SYSCFG.BIT.DPRPU = 0;
USB0.SYSCFG.BIT.DRPD = 0;
USB0.SYSCFG.BIT.DCFM = 1;
USB0.DVSTCTR0.BIT.VBUSEN = 1;
LINK_REG->SYSCFG_b.SCKE = 1;
while (!LINK_REG->SYSCFG_b.SCKE) ;
LINK_REG->SYSCFG_b.DPRPU = 0;
LINK_REG->SYSCFG_b.DRPD = 0;
LINK_REG->SYSCFG_b.DCFM = 1;
USB0.SYSCFG.BIT.DRPD = 1;
LINK_REG->DVSTCTR0_b.VBUSEN = 1;
LINK_REG->SYSCFG_b.DRPD = 1;
for (volatile int i = 0; i < 30000; ++i) ;
USB0.SYSCFG.BIT.USBE = 1;
LINK_REG->SYSCFG_b.USBE = 1;
USB.DPUSR0R.BIT.FIXPHY0 = 0u; /* USB0 Transceiver Output fixed */
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
USB0.PHYSLEW.LONG = 0x5;
IR(PERIB, INTB185) = 0;
#else
IR(USB0, USBI0) = 0;
#endif
// MCU specific PHY init
link_phy_init();
LINK_REG->PHYSLEW = 0x5;
LINK_REG->DPUSR0R_FS_b.FIXPHY0 = 0u; /* Transceiver Output fixed */
/* Setup default control pipe */
USB0.DCPCFG.WORD = USB_PIPECFG_SHTNAK;
USB0.DCPMAXP.WORD = 64;
USB0.INTENB0.WORD = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP;
USB0.INTENB1.WORD = USB_IS1_SACK | USB_IS1_SIGN |
USB_IS1_ATTCH | USB_IS1_DTCH;
USB0.BEMPENB.WORD = 1;
USB0.NRDYENB.WORD = 1;
USB0.BRDYENB.WORD = 1;
LINK_REG->DCPCFG = USB_PIPECFG_SHTNAK;
LINK_REG->DCPMAXP = 64;
LINK_REG->INTENB0 = USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP;
LINK_REG->INTENB1 = USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH;
LINK_REG->BEMPENB = 1;
LINK_REG->NRDYENB = 1;
LINK_REG->BRDYENB = 1;
return true;
}
void hcd_int_enable(uint8_t rhport)
{
(void)rhport;
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
IEN(PERIB, INTB185) = 1;
#else
IEN(USB0, USBI0) = 1;
#endif
link_int_enable(rhport);
}
void hcd_int_disable(uint8_t rhport)
{
(void)rhport;
#if ( CFG_TUSB_MCU == OPT_MCU_RX72N )
IEN(PERIB, INTB185) = 0;
#else
IEN(USB0, USBI0) = 0;
#endif
link_int_disable(rhport);
}
uint32_t hcd_frame_number(uint8_t rhport)
@ -591,7 +488,7 @@ uint32_t hcd_frame_number(uint8_t rhport)
/* The device must be reset at least once after connection
* in order to start the frame counter. */
if (_hcd.need_reset) hcd_port_reset(rhport);
return USB0.FRMNUM.BIT.FRNM;
return LINK_REG->FRMNUM_b.FRNM;
}
/*--------------------------------------------------------------------+
@ -600,23 +497,23 @@ uint32_t hcd_frame_number(uint8_t rhport)
bool hcd_port_connect_status(uint8_t rhport)
{
(void)rhport;
return USB0.INTSTS1.BIT.ATTCH ? true: false;
return LINK_REG->INTSTS1_b.ATTCH ? true : false;
}
void hcd_port_reset(uint8_t rhport)
{
USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
while (USB0.DCPCTR.BIT.PBUSY) ;
LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
while (LINK_REG->DCPCTR_b.PBUSY) ;
hcd_int_disable(rhport);
USB0.DVSTCTR0.BIT.UACT = 0;
if (USB0.DCPCTR.BIT.SUREQ)
USB0.DCPCTR.BIT.SUREQCLR = 1;
LINK_REG->DVSTCTR0_b.UACT = 0;
if (LINK_REG->DCPCTR_b.SUREQ)
LINK_REG->DCPCTR_b.SUREQCLR = 1;
hcd_int_enable(rhport);
/* Reset should be asserted 10-20ms. */
USB0.DVSTCTR0.BIT.USBRST = 1;
LINK_REG->DVSTCTR0_b.USBRST = 1;
for (volatile int i = 0; i < 2400000; ++i) ;
USB0.DVSTCTR0.BIT.USBRST = 0;
USB0.DVSTCTR0.BIT.UACT = 1;
LINK_REG->DVSTCTR0_b.USBRST = 0;
LINK_REG->DVSTCTR0_b.UACT = 1;
_hcd.need_reset = false;
}
@ -628,7 +525,7 @@ void hcd_port_reset_end(uint8_t rhport)
tusb_speed_t hcd_port_speed_get(uint8_t rhport)
{
(void)rhport;
switch (USB0.DVSTCTR0.BIT.RHST) {
switch (LINK_REG->DVSTCTR0_b.RHST) {
default: return TUSB_SPEED_INVALID;
case USB_DVSTCTR0_FULL: return TUSB_SPEED_FULL;
case USB_DVSTCTR0_LOW: return TUSB_SPEED_LOW;
@ -647,13 +544,13 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
unsigned num = *ep;
if (!num || dev_addr != _hcd.pipe[num].dev) continue;
ctr = (uint16_t volatile*)&USB0.PIPE1CTR.WORD + num - 1;
ctr = (uint16_t volatile*)&LINK_REG->PIPE_CTR[num - 1];
*ctr = 0;
USB0.NRDYENB.WORD &= ~TU_BIT(num);
USB0.BRDYENB.WORD &= ~TU_BIT(num);
USB0.PIPESEL.WORD = num;
USB0.PIPECFG.WORD = 0;
USB0.PIPEMAXP.WORD = 0;
LINK_REG->NRDYENB &= ~TU_BIT(num);
LINK_REG->BRDYENB &= ~TU_BIT(num);
LINK_REG->PIPESEL = num;
LINK_REG->PIPECFG = 0;
LINK_REG->PIPEMAXP = 0;
_hcd.pipe[num].ep = 0;
_hcd.pipe[num].dev = 0;
@ -667,36 +564,36 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
{
(void)rhport;
// TU_LOG1("S %d %x\n", dev_addr, USB0.DCPCTR.WORD);
// TU_LOG1("S %d %x\n", dev_addr, LINK_REG->DCPCTR);
TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
TU_ASSERT(0 == USB0.DCPCTR.BIT.SUREQ);
TU_ASSERT(0 == LINK_REG->DCPCTR_b.SUREQ);
USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
_hcd.pipe[0].buf = NULL;
_hcd.pipe[0].length = 8;
_hcd.pipe[0].buf = NULL;
_hcd.pipe[0].length = 8;
_hcd.pipe[0].remaining = 0;
_hcd.pipe[0].dev = dev_addr;
_hcd.pipe[0].dev = dev_addr;
while (USB0.DCPCTR.BIT.PBUSY) ;
USB0.DCPMAXP.WORD = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
while (LINK_REG->DCPCTR_b.PBUSY) ;
LINK_REG->DCPMAXP = (dev_addr << 12) | _hcd.ctl_mps[dev_addr];
/* Set direction in advance for DATA stage */
uint8_t const bmRequesttype = setup_packet[0];
USB0.DCPCFG.BIT.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
LINK_REG->DCPCFG_b.DIR = tu_edpt_dir(bmRequesttype) ? 0: 1;
uint16_t const* p = (uint16_t const*)(uintptr_t)&setup_packet[0];
USB0.USBREQ.WORD = tu_htole16(p[0]);
USB0.USBVAL = p[1];
USB0.USBINDX = p[2];
USB0.USBLENG = p[3];
LINK_REG->USBREQ = tu_htole16(p[0]);
LINK_REG->USBVAL = p[1];
LINK_REG->USBINDX = p[2];
LINK_REG->USBLENG = p[3];
USB0.DCPCTR.BIT.SUREQ = 1;
LINK_REG->DCPCTR_b.SUREQ = 1;
return true;
}
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc)
{
(void)rhport;
TU_ASSERT(dev_addr < 6); /* USBa can only handle addresses from 0 to 5. */
@ -705,13 +602,13 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
const unsigned epn = tu_edpt_number(ep_addr);
const unsigned mps = tu_edpt_packet_size(ep_desc);
if (0 == epn) {
USB0.DCPCTR.WORD = USB_PIPECTR_PID_NAK;
LINK_REG->DCPCTR = USB_PIPECTR_PID_NAK;
hcd_devtree_info_t devtree;
hcd_devtree_get_info(dev_addr, &devtree);
uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t)&USB0.DEVADD0.WORD;
uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &LINK_REG->DEVADD[0];
devadd += dev_addr;
while (USB0.DCPCTR.BIT.PBUSY) ;
USB0.DCPMAXP.WORD = (dev_addr << 12) | mps;
while (LINK_REG->DCPCTR_b.PBUSY) ;
LINK_REG->DCPMAXP = (dev_addr << 12) | mps;
*devadd = (TUSB_SPEED_FULL == devtree.speed) ? USB_DEVADD_FULL : USB_DEVADD_LOW;
_hcd.ctl_mps[dev_addr] = mps;
return true;
@ -731,8 +628,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
/* setup pipe */
hcd_int_disable(rhport);
USB0.PIPESEL.WORD = num;
USB0.PIPEMAXP.WORD = (dev_addr << 12) | mps;
LINK_REG->PIPESEL = num;
LINK_REG->PIPEMAXP = (dev_addr << 12) | mps;
volatile uint16_t *ctr = get_pipectr(num);
*ctr = USB_PIPECTR_ACLRM | USB_PIPECTR_SQCLR;
*ctr = 0;
@ -744,10 +641,10 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
} else {
cfg |= USB_PIPECFG_ISO | USB_PIPECFG_DBLB;
}
USB0.PIPECFG.WORD = cfg;
USB0.BRDYSTS.WORD = 0x1FFu ^ TU_BIT(num);
USB0.NRDYENB.WORD |= TU_BIT(num);
USB0.BRDYENB.WORD |= TU_BIT(num);
LINK_REG->PIPECFG = cfg;
LINK_REG->BRDYSTS = 0x1FFu ^ TU_BIT(num);
LINK_REG->NRDYENB |= TU_BIT(num);
LINK_REG->BRDYENB |= TU_BIT(num);
if (!dir_in) {
*ctr = USB_PIPECTR_PID_BUF;
}
@ -799,52 +696,50 @@ void hcd_int_handler(uint8_t rhport)
20, 8, 19, 18};
#endif
unsigned is1 = USB0.INTSTS1.WORD;
unsigned is0 = USB0.INTSTS0.WORD;
unsigned is1 = LINK_REG->INTSTS1;
unsigned is0 = LINK_REG->INTSTS0;
/* clear active bits except VALID (don't write 0 to already cleared bits according to the HW manual) */
USB0.INTSTS1.WORD = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1);
USB0.INTSTS0.WORD = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0);
LINK_REG->INTSTS1 = ~((USB_IS1_SACK | USB_IS1_SIGN | USB_IS1_ATTCH | USB_IS1_DTCH) & is1);
LINK_REG->INTSTS0 = ~((USB_IS0_BRDY | USB_IS0_NRDY | USB_IS0_BEMP) & is0);
// TU_LOG1("IS %04x %04x\n", is0, is1);
is1 &= USB0.INTENB1.WORD;
is0 &= USB0.INTENB0.WORD;
is1 &= LINK_REG->INTENB1;
is0 &= LINK_REG->INTENB0;
if (is1 & USB_IS1_SACK) {
/* Set DATA1 in advance for the next transfer. */
USB0.DCPCTR.BIT.SQSET = 1;
hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL,
tu_edpt_addr(0, TUSB_DIR_OUT),
8, XFER_RESULT_SUCCESS, true);
LINK_REG->DCPCTR_b.SQSET = 1;
hcd_event_xfer_complete(
LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_SUCCESS, true);
}
if (is1 & USB_IS1_SIGN) {
hcd_event_xfer_complete(USB0.DCPMAXP.BIT.DEVSEL,
tu_edpt_addr(0, TUSB_DIR_OUT),
8, XFER_RESULT_FAILED, true);
hcd_event_xfer_complete(
LINK_REG->DCPMAXP_b.DEVSEL, tu_edpt_addr(0, TUSB_DIR_OUT), 8, XFER_RESULT_FAILED, true);
}
if (is1 & USB_IS1_ATTCH) {
USB0.DVSTCTR0.BIT.UACT = 1;
LINK_REG->DVSTCTR0_b.UACT = 1;
_hcd.need_reset = true;
USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_ATTCH) | USB_IS1_DTCH;
LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_ATTCH) | USB_IS1_DTCH;
hcd_event_device_attach(rhport, true);
}
if (is1 & USB_IS1_DTCH) {
USB0.DVSTCTR0.BIT.UACT = 0;
if (USB0.DCPCTR.BIT.SUREQ)
USB0.DCPCTR.BIT.SUREQCLR = 1;
USB0.INTENB1.WORD = (USB0.INTENB1.WORD & ~USB_IS1_DTCH) | USB_IS1_ATTCH;
LINK_REG->DVSTCTR0_b.UACT = 0;
if (LINK_REG->DCPCTR_b.SUREQ)
LINK_REG->DCPCTR_b.SUREQCLR = 1;
LINK_REG->INTENB1 = (LINK_REG->INTENB1 & ~USB_IS1_DTCH) | USB_IS1_ATTCH;
hcd_event_device_remove(rhport, true);
}
if (is0 & USB_IS0_BEMP) {
const unsigned s = USB0.BEMPSTS.WORD;
USB0.BEMPSTS.WORD = 0;
const unsigned s = LINK_REG->BEMPSTS;
LINK_REG->BEMPSTS = 0;
if (s & 1) {
process_pipe0_bemp(rhport);
}
}
if (is0 & USB_IS0_NRDY) {
const unsigned m = USB0.NRDYENB.WORD;
unsigned s = USB0.NRDYSTS.WORD & m;
USB0.NRDYSTS.WORD = ~s;
const unsigned m = LINK_REG->NRDYENB;
unsigned s = LINK_REG->NRDYSTS & m;
LINK_REG->NRDYSTS = ~s;
while (s) {
#if defined(__CCRX__)
const unsigned num = Mod37BitPosition[(-s & s) % 37];
@ -856,10 +751,10 @@ void hcd_int_handler(uint8_t rhport)
}
}
if (is0 & USB_IS0_BRDY) {
const unsigned m = USB0.BRDYENB.WORD;
unsigned s = USB0.BRDYSTS.WORD & m;
const unsigned m = LINK_REG->BRDYENB;
unsigned s = LINK_REG->BRDYSTS & m;
/* clear active bits (don't write 0 to already cleared bits according to the HW manual) */
USB0.BRDYSTS.WORD = ~s;
LINK_REG->BRDYSTS = ~s;
while (s) {
#if defined(__CCRX__)
const unsigned num = Mod37BitPosition[(-s & s) % 37];

76
src/portable/renesas/link/link_rx.h Normal file
View File

@ -0,0 +1,76 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2020 Koji Kitayama
* Portions copyrighted (c) 2021 Roland Winistoerfer
* Copyright (c) 2022 Rafael Silva (@perigoso)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#ifndef _LINK_RX_H_
#define _LINK_RX_H_
#ifdef __cplusplus
extern "C" {
#endif
#include "link_type.h"
#include "iodefine.h"
#define LINK_REG_BASE (0x000A0000)
static inline void link_int_enable(uint8_t rhport)
{
(void) rhport;
#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
IEN(PERIB, INTB185) = 1;
#else
IEN(USB0, USBI0) = 1;
#endif
}
static inline void link_int_disable(uint8_t rhport)
{
(void) rhport;
#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
IEN(PERIB, INTB185) = 0;
#else
IEN(USB0, USBI0) = 0;
#endif
}
// MCU specific PHY init
static inline void link_phy_init(void)
{
#if (CFG_TUSB_MCU == OPT_MCU_RX72N)
IR(PERIB, INTB185) = 0;
#else
IR(USB0, USBI0) = 0;
#endif
}
#ifdef __cplusplus
}
#endif
#endif /* _LINK_RX_H_ */

1658
src/portable/renesas/link/link_type.h Normal file
View File

File diff suppressed because it is too large Load Diff