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update descriptor, enhance ep in transfer
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759fa76280
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0316e0ecd4
@ -86,12 +86,32 @@ enum
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#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
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// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
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// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
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// Note: since CDC EP ( 1 & 2), HID (4) are spot-on, thus we only need to force
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// endpoint number for MSC to 5
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#define EPNUM_MSC 0x05
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// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ...
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#define EPNUM_CDC_NOTIF 0x81
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#define EPNUM_CDC_OUT 0x02
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#define EPNUM_CDC_IN 0x82
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#define EPNUM_MSC_OUT 0x05
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#define EPNUM_MSC_IN 0x85
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#elif CFG_TUSB_MCU == OPT_MCU_SAMG
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// SAMG doesn't support a same endpoint number with IN and OUT
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// e.g EP1 OUT & EP1 IN cannot exist together
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#define EPNUM_CDC_NOTIF 0x81
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#define EPNUM_CDC_OUT 0x02
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#define EPNUM_CDC_IN 0x83
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#define EPNUM_MSC_OUT 0x04
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#define EPNUM_MSC_IN 0x85
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#else
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#define EPNUM_MSC 0x03
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#define EPNUM_CDC_NOTIF 0x81
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#define EPNUM_CDC_OUT 0x02
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#define EPNUM_CDC_IN 0x82
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#define EPNUM_MSC_OUT 0x03
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#define EPNUM_MSC_IN 0x83
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#endif
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uint8_t const desc_configuration[] =
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@ -100,10 +120,10 @@ uint8_t const desc_configuration[] =
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TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
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// Interface number, string index, EP notification address and size, EP data address (out, in) and size.
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, 0x81, 8, 0x02, 0x82, 64),
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TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 64),
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// Interface number, string index, EP Out & EP In address, EP size
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TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC, 0x80 | EPNUM_MSC, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
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TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
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};
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@ -70,6 +70,17 @@ void xfer_packet_done(xfer_desc_t* xfer)
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xfer->actual_len += xact_len;
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}
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//------------- Transaction helpers -------------//
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static uint16_t xact_in(uint8_t epnum, xfer_desc_t* xfer)
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{
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uint16_t const xact_len = xfer_packet_len(xfer);
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// Write data to fifo
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for(uint16_t i=0; i<xact_len; i++) UDP->UDP_FDR[epnum] = (uint32_t) xfer->buffer[i];
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return xact_len;
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}
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/*------------------------------------------------------------------*/
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/* Device API
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*------------------------------------------------------------------*/
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@ -165,7 +176,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
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}
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// Configure endpoint's registers according to descriptor
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// SAMG doesnt support using a same endpoint with IN and OUT
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// SAMG doesn't support a same endpoint number with IN and OUT
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// e.g EP1 OUT & EP1 IN cannot exist together
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bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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{
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@ -201,31 +212,26 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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xfer_desc_t* xfer = &_dcd_xfer[epnum];
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xfer_begin(xfer, buffer, total_bytes);
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uint16_t const xact_len = xfer_packet_len(xfer);
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// control endpoint
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// Configure DIR bit for control endpoint
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if ( epnum == 0 )
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{
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if (dir == TUSB_DIR_OUT)
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{
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// Clear DIR bit
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UDP->UDP_CSR[0] &= ~UDP_CSR_DIR_Msk;
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}else
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{
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// Set DIR bit if needed
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// Set DIR bit
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UDP->UDP_CSR[0] |= UDP_CSR_DIR_Msk;
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// Write data to fifo
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for(uint16_t i=0; i<xact_len; i++) UDP->UDP_FDR[0] = (uint32_t) buffer[i];
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// TX ready for transfer
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UDP->UDP_CSR[0] |= UDP_CSR_TXPKTRDY_Msk;
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}
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}
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}else
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if (dir == TUSB_DIR_IN)
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{
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return false;
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xact_in(epnum, xfer);
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// TX ready for transfer
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UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
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}
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return true;
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@ -312,10 +318,17 @@ void dcd_isr(uint8_t rhport)
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// Endpoint IN
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if (UDP->UDP_CSR[epnum] & UDP_CSR_TXCOMP_Msk)
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{
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uint16_t xact_len = xfer_packet_len(xfer);
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xfer_packet_done(xfer);
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dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xact_len, XFER_RESULT_SUCCESS, true);
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if ( xact_in(epnum, xfer) )
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{
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// TX ready for transfer
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UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
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}else
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{
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// xfer is complete
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dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, XFER_RESULT_SUCCESS, true);
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}
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// Clear TX Complete bit
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UDP->UDP_CSR[0] &= ~UDP_CSR_TXCOMP_Msk;
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