mirror of
https://github.com/RPCS3/rpcs3.git
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479 lines
11 KiB
C
479 lines
11 KiB
C
/* CpuArch.c -- CPU specific code
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2021-07-13 : Igor Pavlov : Public domain */
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#include "Precomp.h"
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#include "CpuArch.h"
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#ifdef MY_CPU_X86_OR_AMD64
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#if (defined(_MSC_VER) && !defined(MY_CPU_AMD64)) || defined(__GNUC__)
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#define USE_ASM
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#endif
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#if !defined(USE_ASM) && _MSC_VER >= 1500
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#include <intrin.h>
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#endif
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#if defined(USE_ASM) && !defined(MY_CPU_AMD64)
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static UInt32 CheckFlag(UInt32 flag)
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{
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#ifdef _MSC_VER
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__asm pushfd;
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__asm pop EAX;
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__asm mov EDX, EAX;
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__asm xor EAX, flag;
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__asm push EAX;
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__asm popfd;
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__asm pushfd;
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__asm pop EAX;
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__asm xor EAX, EDX;
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__asm push EDX;
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__asm popfd;
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__asm and flag, EAX;
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#else
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__asm__ __volatile__ (
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"pushf\n\t"
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"pop %%EAX\n\t"
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"movl %%EAX,%%EDX\n\t"
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"xorl %0,%%EAX\n\t"
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"push %%EAX\n\t"
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"popf\n\t"
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"pushf\n\t"
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"pop %%EAX\n\t"
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"xorl %%EDX,%%EAX\n\t"
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"push %%EDX\n\t"
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"popf\n\t"
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"andl %%EAX, %0\n\t":
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"=c" (flag) : "c" (flag) :
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"%eax", "%edx");
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#endif
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return flag;
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}
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#define CHECK_CPUID_IS_SUPPORTED if (CheckFlag(1 << 18) == 0 || CheckFlag(1 << 21) == 0) return False;
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#else
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#define CHECK_CPUID_IS_SUPPORTED
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#endif
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#ifndef USE_ASM
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#ifdef _MSC_VER
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#if _MSC_VER >= 1600
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#define MY__cpuidex __cpuidex
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#else
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/*
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__cpuid (function == 4) requires subfunction number in ECX.
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MSDN: The __cpuid intrinsic clears the ECX register before calling the cpuid instruction.
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__cpuid() in new MSVC clears ECX.
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__cpuid() in old MSVC (14.00) doesn't clear ECX
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We still can use __cpuid for low (function) values that don't require ECX,
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but __cpuid() in old MSVC will be incorrect for some function values: (function == 4).
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So here we use the hack for old MSVC to send (subFunction) in ECX register to cpuid instruction,
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where ECX value is first parameter for FAST_CALL / NO_INLINE function,
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So the caller of MY__cpuidex_HACK() sets ECX as subFunction, and
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old MSVC for __cpuid() doesn't change ECX and cpuid instruction gets (subFunction) value.
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DON'T remove MY_NO_INLINE and MY_FAST_CALL for MY__cpuidex_HACK() !!!
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*/
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static
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MY_NO_INLINE
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void MY_FAST_CALL MY__cpuidex_HACK(UInt32 subFunction, int *CPUInfo, UInt32 function)
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{
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UNUSED_VAR(subFunction);
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__cpuid(CPUInfo, function);
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}
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#define MY__cpuidex(info, func, func2) MY__cpuidex_HACK(func2, info, func)
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#pragma message("======== MY__cpuidex_HACK WAS USED ========")
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#endif
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#else
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#define MY__cpuidex(info, func, func2) __cpuid(info, func)
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#pragma message("======== (INCORRECT ?) cpuid WAS USED ========")
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#endif
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#endif
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void MyCPUID(UInt32 function, UInt32 *a, UInt32 *b, UInt32 *c, UInt32 *d)
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{
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#ifdef USE_ASM
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#ifdef _MSC_VER
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UInt32 a2, b2, c2, d2;
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__asm xor EBX, EBX;
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__asm xor ECX, ECX;
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__asm xor EDX, EDX;
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__asm mov EAX, function;
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__asm cpuid;
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__asm mov a2, EAX;
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__asm mov b2, EBX;
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__asm mov c2, ECX;
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__asm mov d2, EDX;
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*a = a2;
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*b = b2;
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*c = c2;
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*d = d2;
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#else
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__asm__ __volatile__ (
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#if defined(MY_CPU_AMD64) && defined(__PIC__)
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"mov %%rbx, %%rdi;"
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"cpuid;"
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"xchg %%rbx, %%rdi;"
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: "=a" (*a) ,
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"=D" (*b) ,
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#elif defined(MY_CPU_X86) && defined(__PIC__)
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"mov %%ebx, %%edi;"
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"cpuid;"
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"xchgl %%ebx, %%edi;"
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: "=a" (*a) ,
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"=D" (*b) ,
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#else
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"cpuid"
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: "=a" (*a) ,
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"=b" (*b) ,
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#endif
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"=c" (*c) ,
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"=d" (*d)
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: "0" (function), "c"(0) ) ;
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#endif
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#else
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int CPUInfo[4];
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MY__cpuidex(CPUInfo, (int)function, 0);
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*a = (UInt32)CPUInfo[0];
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*b = (UInt32)CPUInfo[1];
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*c = (UInt32)CPUInfo[2];
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*d = (UInt32)CPUInfo[3];
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#endif
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}
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BoolInt x86cpuid_CheckAndRead(Cx86cpuid *p)
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{
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CHECK_CPUID_IS_SUPPORTED
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MyCPUID(0, &p->maxFunc, &p->vendor[0], &p->vendor[2], &p->vendor[1]);
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MyCPUID(1, &p->ver, &p->b, &p->c, &p->d);
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return True;
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}
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static const UInt32 kVendors[][3] =
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{
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{ 0x756E6547, 0x49656E69, 0x6C65746E},
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{ 0x68747541, 0x69746E65, 0x444D4163},
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{ 0x746E6543, 0x48727561, 0x736C7561}
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};
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int x86cpuid_GetFirm(const Cx86cpuid *p)
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{
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unsigned i;
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for (i = 0; i < sizeof(kVendors) / sizeof(kVendors[i]); i++)
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{
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const UInt32 *v = kVendors[i];
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if (v[0] == p->vendor[0] &&
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v[1] == p->vendor[1] &&
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v[2] == p->vendor[2])
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return (int)i;
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}
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return -1;
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}
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BoolInt CPU_Is_InOrder()
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{
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Cx86cpuid p;
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int firm;
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UInt32 family, model;
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if (!x86cpuid_CheckAndRead(&p))
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return True;
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family = x86cpuid_GetFamily(p.ver);
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model = x86cpuid_GetModel(p.ver);
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firm = x86cpuid_GetFirm(&p);
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switch (firm)
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{
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case CPU_FIRM_INTEL: return (family < 6 || (family == 6 && (
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/* In-Order Atom CPU */
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model == 0x1C /* 45 nm, N4xx, D4xx, N5xx, D5xx, 230, 330 */
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|| model == 0x26 /* 45 nm, Z6xx */
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|| model == 0x27 /* 32 nm, Z2460 */
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|| model == 0x35 /* 32 nm, Z2760 */
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|| model == 0x36 /* 32 nm, N2xxx, D2xxx */
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)));
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case CPU_FIRM_AMD: return (family < 5 || (family == 5 && (model < 6 || model == 0xA)));
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case CPU_FIRM_VIA: return (family < 6 || (family == 6 && model < 0xF));
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}
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return True;
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}
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#if !defined(MY_CPU_AMD64) && defined(_WIN32)
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#include <Windows.h>
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static BoolInt CPU_Sys_Is_SSE_Supported()
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{
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OSVERSIONINFO vi;
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vi.dwOSVersionInfoSize = sizeof(vi);
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if (!GetVersionEx(&vi))
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return False;
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return (vi.dwMajorVersion >= 5);
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}
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#define CHECK_SYS_SSE_SUPPORT if (!CPU_Sys_Is_SSE_Supported()) return False;
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#else
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#define CHECK_SYS_SSE_SUPPORT
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#endif
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static UInt32 X86_CPUID_ECX_Get_Flags()
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{
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Cx86cpuid p;
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CHECK_SYS_SSE_SUPPORT
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if (!x86cpuid_CheckAndRead(&p))
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return 0;
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return p.c;
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}
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BoolInt CPU_IsSupported_AES()
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{
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return (X86_CPUID_ECX_Get_Flags() >> 25) & 1;
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}
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BoolInt CPU_IsSupported_SSSE3()
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{
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return (X86_CPUID_ECX_Get_Flags() >> 9) & 1;
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}
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BoolInt CPU_IsSupported_SSE41()
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{
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return (X86_CPUID_ECX_Get_Flags() >> 19) & 1;
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}
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BoolInt CPU_IsSupported_SHA()
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{
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Cx86cpuid p;
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CHECK_SYS_SSE_SUPPORT
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if (!x86cpuid_CheckAndRead(&p))
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return False;
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if (p.maxFunc < 7)
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return False;
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{
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UInt32 d[4] = { 0 };
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MyCPUID(7, &d[0], &d[1], &d[2], &d[3]);
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return (d[1] >> 29) & 1;
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}
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}
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// #include <stdio.h>
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#ifdef _WIN32
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#include <Windows.h>
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#endif
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BoolInt CPU_IsSupported_AVX2()
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{
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Cx86cpuid p;
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CHECK_SYS_SSE_SUPPORT
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#ifdef _WIN32
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#define MY__PF_XSAVE_ENABLED 17
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if (!IsProcessorFeaturePresent(MY__PF_XSAVE_ENABLED))
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return False;
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#endif
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if (!x86cpuid_CheckAndRead(&p))
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return False;
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if (p.maxFunc < 7)
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return False;
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{
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UInt32 d[4] = { 0 };
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MyCPUID(7, &d[0], &d[1], &d[2], &d[3]);
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// printf("\ncpuid(7): ebx=%8x ecx=%8x\n", d[1], d[2]);
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return 1
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& (d[1] >> 5); // avx2
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}
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}
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BoolInt CPU_IsSupported_VAES_AVX2()
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{
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Cx86cpuid p;
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CHECK_SYS_SSE_SUPPORT
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#ifdef _WIN32
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#define MY__PF_XSAVE_ENABLED 17
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if (!IsProcessorFeaturePresent(MY__PF_XSAVE_ENABLED))
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return False;
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#endif
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if (!x86cpuid_CheckAndRead(&p))
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return False;
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if (p.maxFunc < 7)
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return False;
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{
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UInt32 d[4] = { 0 };
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MyCPUID(7, &d[0], &d[1], &d[2], &d[3]);
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// printf("\ncpuid(7): ebx=%8x ecx=%8x\n", d[1], d[2]);
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return 1
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& (d[1] >> 5) // avx2
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// & (d[1] >> 31) // avx512vl
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& (d[2] >> 9); // vaes // VEX-256/EVEX
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}
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}
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BoolInt CPU_IsSupported_PageGB()
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{
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Cx86cpuid cpuid;
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if (!x86cpuid_CheckAndRead(&cpuid))
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return False;
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{
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UInt32 d[4] = { 0 };
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MyCPUID(0x80000000, &d[0], &d[1], &d[2], &d[3]);
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if (d[0] < 0x80000001)
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return False;
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}
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{
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UInt32 d[4] = { 0 };
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MyCPUID(0x80000001, &d[0], &d[1], &d[2], &d[3]);
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return (d[3] >> 26) & 1;
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}
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}
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#elif defined(MY_CPU_ARM_OR_ARM64)
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#ifdef _WIN32
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#include <Windows.h>
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BoolInt CPU_IsSupported_CRC32() { return IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
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BoolInt CPU_IsSupported_CRYPTO() { return IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
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BoolInt CPU_IsSupported_NEON() { return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) ? 1 : 0; }
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#else
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#if defined(__APPLE__)
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/*
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#include <stdio.h>
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#include <string.h>
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static void Print_sysctlbyname(const char *name)
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{
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size_t bufSize = 256;
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char buf[256];
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int res = sysctlbyname(name, &buf, &bufSize, NULL, 0);
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{
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int i;
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printf("\nres = %d : %s : '%s' : bufSize = %d, numeric", res, name, buf, (unsigned)bufSize);
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for (i = 0; i < 20; i++)
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printf(" %2x", (unsigned)(Byte)buf[i]);
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}
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}
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*/
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static BoolInt My_sysctlbyname_Get_BoolInt(const char *name)
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{
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UInt32 val = 0;
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if (My_sysctlbyname_Get_UInt32(name, &val) == 0 && val == 1)
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return 1;
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return 0;
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}
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/*
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Print_sysctlbyname("hw.pagesize");
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Print_sysctlbyname("machdep.cpu.brand_string");
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*/
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BoolInt CPU_IsSupported_CRC32(void)
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{
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return My_sysctlbyname_Get_BoolInt("hw.optional.armv8_crc32");
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}
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BoolInt CPU_IsSupported_NEON(void)
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{
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return My_sysctlbyname_Get_BoolInt("hw.optional.neon");
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}
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#ifdef MY_CPU_ARM64
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#define APPLE_CRYPTO_SUPPORT_VAL 1
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#else
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#define APPLE_CRYPTO_SUPPORT_VAL 0
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#endif
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BoolInt CPU_IsSupported_SHA1(void) { return APPLE_CRYPTO_SUPPORT_VAL; }
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BoolInt CPU_IsSupported_SHA2(void) { return APPLE_CRYPTO_SUPPORT_VAL; }
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BoolInt CPU_IsSupported_AES (void) { return APPLE_CRYPTO_SUPPORT_VAL; }
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#else // __APPLE__
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#include <sys/auxv.h>
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#define USE_HWCAP
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#ifdef USE_HWCAP
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#include <asm/hwcap.h>
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#define MY_HWCAP_CHECK_FUNC_2(name1, name2) \
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BoolInt CPU_IsSupported_ ## name1() { return (getauxval(AT_HWCAP) & (HWCAP_ ## name2)) ? 1 : 0; }
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#ifdef MY_CPU_ARM64
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#define MY_HWCAP_CHECK_FUNC(name) \
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MY_HWCAP_CHECK_FUNC_2(name, name)
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MY_HWCAP_CHECK_FUNC_2(NEON, ASIMD)
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// MY_HWCAP_CHECK_FUNC (ASIMD)
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#elif defined(MY_CPU_ARM)
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#define MY_HWCAP_CHECK_FUNC(name) \
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BoolInt CPU_IsSupported_ ## name() { return (getauxval(AT_HWCAP2) & (HWCAP2_ ## name)) ? 1 : 0; }
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MY_HWCAP_CHECK_FUNC_2(NEON, NEON)
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#endif
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#else // USE_HWCAP
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#define MY_HWCAP_CHECK_FUNC(name) \
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BoolInt CPU_IsSupported_ ## name() { return 0; }
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MY_HWCAP_CHECK_FUNC(NEON)
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#endif // USE_HWCAP
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MY_HWCAP_CHECK_FUNC (CRC32)
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MY_HWCAP_CHECK_FUNC (SHA1)
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MY_HWCAP_CHECK_FUNC (SHA2)
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MY_HWCAP_CHECK_FUNC (AES)
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#endif // __APPLE__
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#endif // _WIN32
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#endif // MY_CPU_ARM_OR_ARM64
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#ifdef __APPLE__
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#include <sys/sysctl.h>
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int My_sysctlbyname_Get(const char *name, void *buf, size_t *bufSize)
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{
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return sysctlbyname(name, buf, bufSize, NULL, 0);
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}
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int My_sysctlbyname_Get_UInt32(const char *name, UInt32 *val)
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{
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size_t bufSize = sizeof(*val);
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int res = My_sysctlbyname_Get(name, val, &bufSize);
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if (res == 0 && bufSize != sizeof(*val))
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return EFAULT;
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return res;
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}
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#endif
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