From fb4e64d15e2b82bf1133add3c57af84d295be70f Mon Sep 17 00:00:00 2001
From: Eladash <18193363+elad335@users.noreply.github.com>
Date: Tue, 26 Mar 2024 15:32:21 +0200
Subject: [PATCH] Savestates/SPU: Extend RCHCNT safe returns

---
 rpcs3/Emu/Cell/SPULLVMRecompiler.cpp | 35 ++++++++++++++++++----------
 1 file changed, 23 insertions(+), 12 deletions(-)

diff --git a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
index 30b58e6b46..5ee411f57b 100644
--- a/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
+++ b/rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
@@ -2921,6 +2921,29 @@ public:
 			return;
 		}
 
+		switch (op.ra)
+		{
+		case SPU_WrOutMbox:
+		case SPU_WrOutIntrMbox:
+		case SPU_RdSigNotify1:
+		case SPU_RdSigNotify2:
+		case SPU_RdInMbox:
+		case SPU_RdEventStat:
+		{
+			if (g_cfg.savestate.compatible_mode)
+			{
+				ensure_gpr_stores();
+				check_state(m_pos, false);
+			}
+
+			break;
+		}
+		default:
+		{
+			break;
+		}
+		}
+
 		switch (op.ra)
 		{
 		case SPU_WrOutMbox:
@@ -2971,12 +2994,6 @@ public:
 		}
 		case SPU_RdInMbox:
 		{
-			if (g_cfg.savestate.compatible_mode)
-			{
-				ensure_gpr_stores();
-				check_state(m_pos, false);
-			}
-
 			const auto value = m_ir->CreateLoad(get_type<u32>(), spu_ptr<u32>(&spu_thread::ch_in_mbox));
 			value->setAtomic(llvm::AtomicOrdering::Acquire);
 			res.value = value;
@@ -2986,12 +3003,6 @@ public:
 		}
 		case SPU_RdEventStat:
 		{
-			if (g_cfg.savestate.compatible_mode)
-			{
-				ensure_gpr_stores();
-				check_state(m_pos, false);
-			}
-
 			const auto mask = m_ir->CreateTrunc(m_ir->CreateLShr(m_ir->CreateLoad(get_type<u64>(), spu_ptr<u64>(&spu_thread::ch_events)), 32), get_type<u32>());
 			res.value = call("spu_get_events", &exec_get_events, m_thread, mask);
 			break;