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aarch64 - Decode CPU brand information
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kd-11
kd-11
parent
1c16ada670
commit
f5173ca9bf
@ -392,6 +392,7 @@ target_sources(rpcs3_emu PRIVATE
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if(CMAKE_SYSTEM_PROCESSOR MATCHES "arm64|aarch64")
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target_sources(rpcs3_emu PRIVATE
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CPU/Backends/AArch64/AArch64ASM.cpp
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CPU/Backends/AArch64/AArch64Common.cpp
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CPU/Backends/AArch64/AArch64JIT.cpp
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CPU/Backends/AArch64/AArch64Signal.cpp
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)
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197
rpcs3/Emu/CPU/Backends/AArch64/AArch64Common.cpp
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197
rpcs3/Emu/CPU/Backends/AArch64/AArch64Common.cpp
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@ -0,0 +1,197 @@
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#include "stdafx.h"
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#include "AArch64Common.h"
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#include <thread>
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#include <map>
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namespace aarch64
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{
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struct cpu_entry_t
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{
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u32 vendor;
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u32 part;
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const char* arch;
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const char* family;
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const char* name;
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};
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struct cpu_vendor_t
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{
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u32 id;
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const char* name;
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const char* short_name;
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};
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static cpu_vendor_t s_vendors_list[] =
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{
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{ 0x41, "Arm Limited.", "ARM" },
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{ 0x42, "Broadcom Corporation.", "Broadcom" },
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{ 0x43, "Cavium Inc.", "Cavium" },
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{ 0x44, "Digital Equipment Corporation.", "DEC" },
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{ 0x46, "Fujitsu Ltd.", "Fujitsu" },
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{ 0x49, "Infineon Technologies AG.", "Infineon" },
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{ 0x4D, "Motorola or Freescale Semiconductor Inc.", "Motorola" },
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{ 0x4E, "NVIDIA Corporation.", "NVIDIA" },
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{ 0x50, "Applied Micro Circuits Corporation.", "AMCC" },
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{ 0x51, "Qualcomm Inc.", "Qualcomm" },
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{ 0x56, "Marvell International Ltd.", "Marvell" },
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{ 0x69, "Intel Corporation.", "Intel" },
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{ 0xC0, "Ampere Computing", "Ampere" },
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// Unofficial but existing in the wild
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{ 0x61, "Apple Inc.", "Apple" },
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};
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static cpu_entry_t s_cpu_list[] =
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{
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// ARM
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{ 0x41, 0xd01, "armv8-a+crc+simd", "", "Cortex-A32" },
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{ 0x41, 0xd04, "armv8-a+crc+simd", "", "Cortex-A35" },
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{ 0x41, 0xd03, "armv8-a+crc+simd", "", "Cortex-A53" },
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{ 0x41, 0xd07, "armv8-a+crc+simd", "", "Cortex-A57" },
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{ 0x41, 0xd08, "armv8-a+crc+simd", "", "Cortex-A72" },
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{ 0x41, 0xd09, "armv8-a+crc+simd", "", "Cortex-A73" },
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{ 0x41, 0xd05, "armv8.2-a+fp16+dotprod", "", "Cortex-A55" },
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{ 0x41, 0xd0a, "armv8.2-a+fp16+dotprod", "", "Cortex-A75" },
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{ 0x41, 0xd0b, "armv8.2-a+fp16+dotprod", "", "Cortex-A76" },
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{ 0x41, 0xd0e, "armv8.2-a+fp16+dotprod", "", "Cortex-A76ae" },
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{ 0x41, 0xd0d, "armv8.2-a+fp16+dotprod", "", "Cortex-A77" },
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{ 0x41, 0xd41, "armv8.2-a+fp16+dotprod", "", "Cortex-A78" },
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{ 0x41, 0xd42, "armv8.2-a+fp16+dotprod", "", "Cortex-A78ae" },
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{ 0x41, 0xd4b, "armv8.2-a+fp16+dotprod", "", "Cortex-A78c" },
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{ 0x41, 0xd47, "armv9-a+fp16+bf16+i8mm", "", "Cortex-A710" },
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{ 0x41, 0xd44, "armv8.2-a+fp16+dotprod", "", "Cortex-X1" },
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{ 0x41, 0xd4c, "armv8.2-a+fp16+dotprod", "", "Cortex-X1c" },
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{ 0x41, 0xd0c, "armv8.2-a+fp16+dotprod", "", "Neoverse-N1" },
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{ 0x41, 0xd40, "armv8.4-a+fp16+bf16+i8mm", "", "Neoverse-V1" },
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{ 0x41, 0xd49, "armv8.5-a+fp16+bf16+i8mm", "", "Neoverse-N2" },
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{ 0x41, 0xd23, "armv8.1-m.main+pacbti+mve.fp+fp.dp", "", "Cortex-M85" },
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{ 0x41, 0xd13, "armv8-r+crc+simd", "", "Cortex-R52" },
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{ 0x41, 0xd16, "armv8-r+crc+simd", "", "Cortex-R52+" },
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// APPLE
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{ 0x61, 0x22, "armv8.5-a", "M1", "Firestorm" },
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{ 0x61, 0x23, "armv8.5-a", "M1", "IceStorm" },
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{ 0x61, 0x28, "armv8.5-a", "M1 Max", "Firestorm" },
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{ 0x61, 0x28, "armv8.5-a", "M1 Max", "Icestorm" },
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{ 0x61, 0x24, "armv8.5-a", "M1 Pro", "Firestorm" },
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{ 0x61, 0x25, "armv8.5-a", "M1 Pro", "Icestorm" },
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{ 0x61, 0x32, "armv8.5-a", "M2", "Avalanche" },
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{ 0x61, 0x32, "armv8.5-a", "M2", "Blizzard" },
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// QUALCOMM
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{ 0x51, 0x01, "armv8.5-a", "Snapdragon", "X-Elite" },
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};
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static const cpu_vendor_t* find_cpu_vendor(u64 id)
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{
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for (const auto& vendor : s_vendors_list)
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{
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if (id == vendor.id)
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{
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return &vendor;
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}
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}
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return nullptr;
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}
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static const cpu_entry_t* find_cpu_part(u64 vendor, u64 part)
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{
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for (const auto& cpu : s_cpu_list)
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{
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if (cpu.vendor == vendor && cpu.part == part)
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{
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return &cpu;
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}
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}
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return nullptr;
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}
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// Read main ID register
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static u64 read_MIDR_EL1(u32 cpu_id)
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{
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#if defined(__linux__)
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std::string path = fmt::format("/sys/devices/system/cpu/cpu%u/regs/identification/midr_el1", cpu_id);
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if (!fs::is_file(path))
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{
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return umax;
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}
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std::string value;
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if (!fs::file(path, fs::read).read(value, 18))
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{
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return 0;
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}
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return std::stoull(value, nullptr, 16);
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#else
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// Unimplemented
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return 0;
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#endif
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}
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std::string get_cpu_brand()
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{
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// Fetch vendor and part numbers. ARM CPUs often have more than 1 architecture on the SoC, so we check all of them.
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std::map<u64, int> core_layout;
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for (u32 i = 0; i < std::thread::hardware_concurrency(); ++i)
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{
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const auto midr = read_MIDR_EL1(i);
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if (midr == umax)
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{
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break;
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}
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core_layout[midr]++;
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}
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if (core_layout.empty())
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{
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return "Unidentified CPU";
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}
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std::string vendor_name;
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std::string part_family;
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std::vector<std::string> core_names;
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for (const auto& [midr, count] : core_layout)
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{
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const auto implementer_id = (midr >> 24) & 0xff;
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const auto part_id = (midr >> 4) & 0xfff;
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if (vendor_name.empty())
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{
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const auto vendor_info = find_cpu_vendor(implementer_id);
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vendor_name = vendor_info ? vendor_info->short_name : "Unknown";
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}
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const auto part_info = find_cpu_part(implementer_id, part_id);
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if (!part_info)
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{
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core_names.push_back(fmt::format("%dx\"Unidentified cores\"", count));
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continue;
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}
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if (part_family.empty() && part_info->family)
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{
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part_family = part_info->family;
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}
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core_names.push_back(fmt::format("%dx\"%s\"", count, part_info->name));
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}
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// Assemble everything
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std::string result = vendor_name + " ";
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std::string suffix;
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if (!part_family.empty())
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{
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// Since we have a known family name, the core layout is just extra info.
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// Wrap core layout in brackets.
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result += part_family + " (";
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suffix = ")";
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}
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result += fmt::merge(core_names, " + ");
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result += suffix;
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return result;
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}
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}
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@ -36,4 +36,6 @@ namespace aarch64
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{
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"xzr", ".", "sp"
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};
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std::string get_cpu_brand();
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}
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@ -4,6 +4,10 @@
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#include "Emu/vfs_config.h"
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#include "Utilities/Thread.h"
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#if defined(ARCH_ARM64)
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#include "Emu/CPU/Backends/AArch64/AArch64Common.h"
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#endif
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#ifdef _WIN32
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#include "windows.h"
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#include "sysinfoapi.h"
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@ -387,9 +391,8 @@ u32 utils::get_rep_movsb_threshold()
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std::string utils::get_cpu_brand()
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{
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std::string brand;
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#if defined(ARCH_X64)
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std::string brand;
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if (get_cpuid(0x80000000, 0)[0] >= 0x80000004)
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{
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for (u32 i = 0; i < 3; i++)
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@ -401,9 +404,6 @@ std::string utils::get_cpu_brand()
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{
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brand = "Unknown CPU";
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}
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#else
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brand = "Unidentified CPU";
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#endif
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brand.erase(brand.find_last_not_of('\0') + 1);
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brand.erase(brand.find_last_not_of(' ') + 1);
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@ -415,6 +415,12 @@ std::string utils::get_cpu_brand()
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}
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return brand;
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#elif defined(ARCH_ARM64)
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static const auto g_cpu_brand = aarch64::get_cpu_brand();
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return g_cpu_brand;
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#else
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return "Unidentified CPU";
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#endif
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}
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std::string utils::get_system_info()
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