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PPU Precise: Fix FMADDS, FMSUBS, FNMSUBS, FNMADDS
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@ -4708,7 +4708,7 @@ bool ppu_interpreter_fast::FMADDS(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter_precise::FMADDS(ppu_thread& ppu, ppu_opcode_t op)
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{
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const f64 res = ppu.fpr[op.frd] = f32(ppu.fpr[op.fra] * ppu.fpr[op.frc] + ppu.fpr[op.frb]);
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const f64 res = ppu.fpr[op.frd] = f32(std::fma(ppu.fpr[op.fra], ppu.fpr[op.frc], ppu.fpr[op.frb]));
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ppu_fpcc_set(ppu, res, 0., op.rc);
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return true;
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}
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@ -4721,7 +4721,7 @@ bool ppu_interpreter_fast::FMSUBS(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter_precise::FMSUBS(ppu_thread& ppu, ppu_opcode_t op)
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{
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const f64 res = ppu.fpr[op.frd] = f32(ppu.fpr[op.fra] * ppu.fpr[op.frc] - ppu.fpr[op.frb]);
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const f64 res = ppu.fpr[op.frd] = f32(std::fma(ppu.fpr[op.fra], ppu.fpr[op.frc], -ppu.fpr[op.frb]));
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ppu_fpcc_set(ppu, res, 0., op.rc);
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return true;
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}
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@ -4734,7 +4734,7 @@ bool ppu_interpreter_fast::FNMSUBS(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter_precise::FNMSUBS(ppu_thread& ppu, ppu_opcode_t op)
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{
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const f64 res = ppu.fpr[op.frd] = f32(-(ppu.fpr[op.fra] * ppu.fpr[op.frc] - ppu.fpr[op.frb]));
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const f64 res = ppu.fpr[op.frd] = f32(-std::fma(ppu.fpr[op.fra], ppu.fpr[op.frc], -ppu.fpr[op.frb]));
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ppu_fpcc_set(ppu, res, 0., op.rc);
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return true;
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}
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@ -4747,7 +4747,7 @@ bool ppu_interpreter_fast::FNMADDS(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter_precise::FNMADDS(ppu_thread& ppu, ppu_opcode_t op)
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{
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const f64 res = ppu.fpr[op.frd] = f32(-(ppu.fpr[op.fra] * ppu.fpr[op.frc] + ppu.fpr[op.frb]));
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const f64 res = ppu.fpr[op.frd] = f32(-std::fma(ppu.fpr[op.fra], ppu.fpr[op.frc], ppu.fpr[op.frb]));
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ppu_fpcc_set(ppu, res, 0., op.rc);
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return true;
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}
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