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VP: add few opcodes comment for vec/sca (#1750)
This commit is contained in:
raven02
Ivan
parent
4260f68f85
commit
db27ea923d
@ -268,11 +268,11 @@ template<typename T> std::string FragmentProgramDecompiler::GetSRC(T src)
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switch (src.reg_type)
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{
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case 0: //tmp
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case RSX_FP_REGISTER_TYPE_TEMP:
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ret += AddReg(src.tmp_reg_index, src.fp16);
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break;
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case 1: //input
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case RSX_FP_REGISTER_TYPE_INPUT:
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{
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static const std::string reg_table[] =
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{
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@ -302,11 +302,11 @@ template<typename T> std::string FragmentProgramDecompiler::GetSRC(T src)
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}
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break;
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case 2: //const
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case RSX_FP_REGISTER_TYPE_CONSTANT:
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ret += AddConst();
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break;
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case 3: // ??? Used by a few games, what is it?
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case RSX_FP_REGISTER_TYPE_UNKNOWN: // ??? Used by a few games, what is it?
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LOG_ERROR(RSX, "Src type 3 used, please report this to a developer.");
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break;
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@ -73,10 +73,10 @@ std::string VertexProgramDecompiler::GetSRC(const u32 n)
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switch (src[n].reg_type)
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{
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case 1: //temp
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case RSX_VP_REGISTER_TYPE_TEMP:
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ret += m_parr.AddParam(PF_PARAM_NONE, getFloatTypeName(4), "tmp" + std::to_string(src[n].tmp_src));
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break;
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case 2: //input
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case RSX_VP_REGISTER_TYPE_INPUT:
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if (d1.input_src < (sizeof(reg_table) / sizeof(reg_table[0])))
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{
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ret += m_parr.AddParam(PF_PARAM_IN, getFloatTypeName(4), reg_table[d1.input_src], d1.input_src);
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@ -87,7 +87,7 @@ std::string VertexProgramDecompiler::GetSRC(const u32 n)
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ret += m_parr.AddParam(PF_PARAM_IN, getFloatTypeName(4), "in_unk", d1.input_src);
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}
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break;
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case 3: //const
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case RSX_VP_REGISTER_TYPE_CONSTANT:
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m_parr.AddParam(PF_PARAM_UNIFORM, getFloatTypeName(4), std::string("vc[468]"));
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ret += std::string("vc[") + std::to_string(d1.const_src) + (d3.index_const ? " + " + AddAddrReg() : "") + "]";
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break;
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@ -2,7 +2,15 @@
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#include "GCM.h"
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#include "RSXTexture.h"
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enum
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enum register_type
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{
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RSX_FP_REGISTER_TYPE_TEMP = 0,
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RSX_FP_REGISTER_TYPE_INPUT = 1,
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RSX_FP_REGISTER_TYPE_CONSTANT = 2,
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RSX_FP_REGISTER_TYPE_UNKNOWN = 3,
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};
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enum fp_opcode
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{
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RSX_FP_OPCODE_NOP = 0x00, // No-Operation
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RSX_FP_OPCODE_MOV = 0x01, // Move
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@ -1,56 +1,63 @@
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#pragma once
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enum vp_reg_type
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{
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RSX_VP_REGISTER_TYPE_TEMP = 1,
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RSX_VP_REGISTER_TYPE_INPUT = 2,
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RSX_VP_REGISTER_TYPE_CONSTANT = 3,
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};
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enum sca_opcode
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{
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RSX_SCA_OPCODE_NOP = 0x00,
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RSX_SCA_OPCODE_MOV = 0x01,
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RSX_SCA_OPCODE_RCP = 0x02,
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RSX_SCA_OPCODE_RCC = 0x03,
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RSX_SCA_OPCODE_RSQ = 0x04,
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RSX_SCA_OPCODE_EXP = 0x05,
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RSX_SCA_OPCODE_LOG = 0x06,
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RSX_SCA_OPCODE_LIT = 0x07,
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RSX_SCA_OPCODE_BRA = 0x08,
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RSX_SCA_OPCODE_BRI = 0x09,
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RSX_SCA_OPCODE_CAL = 0x0a,
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RSX_SCA_OPCODE_CLI = 0x0b,
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RSX_SCA_OPCODE_RET = 0x0c,
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RSX_SCA_OPCODE_LG2 = 0x0d,
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RSX_SCA_OPCODE_EX2 = 0x0e,
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RSX_SCA_OPCODE_SIN = 0x0f,
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RSX_SCA_OPCODE_COS = 0x10,
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RSX_SCA_OPCODE_BRB = 0x11,
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RSX_SCA_OPCODE_CLB = 0x12,
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RSX_SCA_OPCODE_PSH = 0x13,
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RSX_SCA_OPCODE_POP = 0x14
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RSX_SCA_OPCODE_NOP = 0x00, // No-Operation
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RSX_SCA_OPCODE_MOV = 0x01, // Move (copy)
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RSX_SCA_OPCODE_RCP = 0x02, // Reciprocal
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RSX_SCA_OPCODE_RCC = 0x03, // Reciprocal clamped
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RSX_SCA_OPCODE_RSQ = 0x04, // Reciprocal square root
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RSX_SCA_OPCODE_EXP = 0x05, // Exponential base 2 (low-precision)
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RSX_SCA_OPCODE_LOG = 0x06, // Logarithm base 2 (low-precision)
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RSX_SCA_OPCODE_LIT = 0x07, // Lighting calculation
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RSX_SCA_OPCODE_BRA = 0x08, // Branch
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RSX_SCA_OPCODE_BRI = 0x09, // Branch by CC register
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RSX_SCA_OPCODE_CAL = 0x0a, // Subroutine call
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RSX_SCA_OPCODE_CLI = 0x0b, // Subroutine call by CC register
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RSX_SCA_OPCODE_RET = 0x0c, // Return from subroutine
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RSX_SCA_OPCODE_LG2 = 0x0d, // Logarithm base 2
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RSX_SCA_OPCODE_EX2 = 0x0e, // Exponential base 2
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RSX_SCA_OPCODE_SIN = 0x0f, // Sine function
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RSX_SCA_OPCODE_COS = 0x10, // Cosine function
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RSX_SCA_OPCODE_BRB = 0x11, // Branch by Boolean constant
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RSX_SCA_OPCODE_CLB = 0x12, // Subroutine call by Boolean constant
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RSX_SCA_OPCODE_PSH = 0x13, // Push onto stack
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RSX_SCA_OPCODE_POP = 0x14, // Pop from stack
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};
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enum vec_opcode
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{
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RSX_VEC_OPCODE_NOP = 0x00,
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RSX_VEC_OPCODE_MOV = 0x01,
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RSX_VEC_OPCODE_MUL = 0x02,
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RSX_VEC_OPCODE_ADD = 0x03,
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RSX_VEC_OPCODE_MAD = 0x04,
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RSX_VEC_OPCODE_DP3 = 0x05,
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RSX_VEC_OPCODE_DPH = 0x06,
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RSX_VEC_OPCODE_DP4 = 0x07,
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RSX_VEC_OPCODE_DST = 0x08,
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RSX_VEC_OPCODE_MIN = 0x09,
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RSX_VEC_OPCODE_MAX = 0x0a,
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RSX_VEC_OPCODE_SLT = 0x0b,
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RSX_VEC_OPCODE_SGE = 0x0c,
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RSX_VEC_OPCODE_ARL = 0x0d,
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RSX_VEC_OPCODE_FRC = 0x0e,
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RSX_VEC_OPCODE_FLR = 0x0f,
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RSX_VEC_OPCODE_SEQ = 0x10,
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RSX_VEC_OPCODE_SFL = 0x11,
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RSX_VEC_OPCODE_SGT = 0x12,
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RSX_VEC_OPCODE_SLE = 0x13,
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RSX_VEC_OPCODE_SNE = 0x14,
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RSX_VEC_OPCODE_STR = 0x15,
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RSX_VEC_OPCODE_SSG = 0x16,
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RSX_VEC_OPCODE_TXL = 0x19
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RSX_VEC_OPCODE_NOP = 0x00, // No-Operation
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RSX_VEC_OPCODE_MOV = 0x01, // Move
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RSX_VEC_OPCODE_MUL = 0x02, // Multiply
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RSX_VEC_OPCODE_ADD = 0x03, // Addition
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RSX_VEC_OPCODE_MAD = 0x04, // Multiply-Add
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RSX_VEC_OPCODE_DP3 = 0x05, // 3-component Dot Product
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RSX_VEC_OPCODE_DPH = 0x06, // Homogeneous Dot Product
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RSX_VEC_OPCODE_DP4 = 0x07, // 4-component Dot Product
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RSX_VEC_OPCODE_DST = 0x08, // Calculate distance vector
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RSX_VEC_OPCODE_MIN = 0x09, // Minimum
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RSX_VEC_OPCODE_MAX = 0x0a, // Maximum
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RSX_VEC_OPCODE_SLT = 0x0b, // Set-If-LessThan
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RSX_VEC_OPCODE_SGE = 0x0c, // Set-If-GreaterEqual
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RSX_VEC_OPCODE_ARL = 0x0d, // Load to address register (round down)
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RSX_VEC_OPCODE_FRC = 0x0e, // Extract fractional part (fraction)
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RSX_VEC_OPCODE_FLR = 0x0f, // Round down (floor)
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RSX_VEC_OPCODE_SEQ = 0x10, // Set-If-Equal
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RSX_VEC_OPCODE_SFL = 0x11, // Set-If-False
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RSX_VEC_OPCODE_SGT = 0x12, // Set-If-GreaterThan
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RSX_VEC_OPCODE_SLE = 0x13, // Set-If-LessEqual
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RSX_VEC_OPCODE_SNE = 0x14, // Set-If-NotEqual
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RSX_VEC_OPCODE_STR = 0x15, // Set-If-True
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RSX_VEC_OPCODE_SSG = 0x16, // Convert postive values to 1 and negative values to -1
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RSX_VEC_OPCODE_TXL = 0x19, // Texture fetch
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};
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union D0
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