From d3ff67ffb510cc6a5109bd909df36fe7efc6c0f7 Mon Sep 17 00:00:00 2001 From: kd-11 Date: Sun, 13 Jun 2021 23:34:01 +0300 Subject: [PATCH] rsx: Pass vertex attributes streamed via register write in PS3-correct format - TODO: Optimize this, we can avoid the double bswap in FIFO and then in attribute push Not very important since nobody is doing register push in high-performance path. --- rpcs3/Emu/RSX/Program/GLSLCommon.cpp | 5 +++-- rpcs3/Emu/RSX/RSXThread.cpp | 21 ++++----------------- rpcs3/Emu/RSX/rsx_methods.cpp | 13 +++---------- 3 files changed, 10 insertions(+), 29 deletions(-) diff --git a/rpcs3/Emu/RSX/Program/GLSLCommon.cpp b/rpcs3/Emu/RSX/Program/GLSLCommon.cpp index 370c949f8d..891b4b9055 100644 --- a/rpcs3/Emu/RSX/Program/GLSLCommon.cpp +++ b/rpcs3/Emu/RSX/Program/GLSLCommon.cpp @@ -341,9 +341,10 @@ namespace glsl " ret.xy = unpackHalf2x16(tmp.x);\n" " ret.zw = unpackHalf2x16(tmp.y);\n" " }\n" - " else if (desc.type == VTX_FMT_UINT8 || desc.type == VTX_FMT_UNORM8)\n" + " else if (elem_size == 1) //(desc.type == VTX_FMT_UINT8 || desc.type == VTX_FMT_UNORM8)\n" " {\n" - " ret = vec4(desc.swap_bytes? result.wzyx : result);\n" + " // Ignore bswap on single byte channels\n" + " ret = vec4(result);\n" " }\n" " else //if (desc.type == VTX_FMT_COMP32)\n" " {\n" diff --git a/rpcs3/Emu/RSX/RSXThread.cpp b/rpcs3/Emu/RSX/RSXThread.cpp index 3521944d29..09028022fa 100644 --- a/rpcs3/Emu/RSX/RSXThread.cpp +++ b/rpcs3/Emu/RSX/RSXThread.cpp @@ -2279,27 +2279,14 @@ namespace rsx } } //end attribute placement check - // If data is passed via registers, it is already received in little endian - const bool is_be_type = (layout.attribute_placement[index] != attribute_buffer_placement::transient); - bool to_swap_bytes = is_be_type; - - switch (type) + // Special compressed 4 components into one 4-byte value. Decoded as one value. + if (type == rsx::vertex_base_type::cmp) { - case rsx::vertex_base_type::cmp: - // Compressed 4 components into one 4-byte value size = 1; - break; - case rsx::vertex_base_type::ub: - case rsx::vertex_base_type::ub256: - // These are single byte formats, but inverted order (BGRA vs ARGB) when passed via registers - to_swap_bytes = (layout.attribute_placement[index] == attribute_buffer_placement::transient); - break; - default: - break; } - if (to_swap_bytes) attrib1 |= swap_storage_mask; - + // All data is passed in in PS3-native order (BE) so swap flag should be set + attrib1 |= swap_storage_mask; attrib0 |= (static_cast(type) << 24); attrib0 |= (size << 27); attrib1 |= offset_in_block[index]; diff --git a/rpcs3/Emu/RSX/rsx_methods.cpp b/rpcs3/Emu/RSX/rsx_methods.cpp index fb4dcaa238..33defa05da 100644 --- a/rpcs3/Emu/RSX/rsx_methods.cpp +++ b/rpcs3/Emu/RSX/rsx_methods.cpp @@ -263,16 +263,8 @@ namespace rsx const auto vtype = vertex_data_type_from_element_type::type; ensure(vtype != rsx::vertex_base_type::cmp); - switch (vtype) - { - case rsx::vertex_base_type::ub: - case rsx::vertex_base_type::ub256: - // Get BE data - arg = std::bit_cast>(arg); - break; - default: - break; - } + // Get BE data + arg = std::bit_cast>(arg); if (rsx->in_begin_end) { @@ -398,6 +390,7 @@ namespace rsx void draw_inline_array(thread* /*rsx*/, u32 /*reg*/, u32 arg) { + arg = std::bit_cast>(arg); rsx::method_registers.current_draw_clause.command = rsx::draw_command::inlined_array; rsx::method_registers.current_draw_clause.inline_vertex_array.push_back(arg); }